Hmmm. You're right. My bad; I confused it with (I suspect) the E4000 VCO, and it really doesn't make sense given the wider channel bandwidth of a DVB signal.
At 8 bits, 225 Msps isn't going to fit down USB2 though :(
On Mon, Aug 19, 2013 at 08:47:20PM -0700, jdow wrote:
That doesn't necessarily square with "7-bit ADC for RF signals level measurement". It's unclear to me where it would get the signal with enough levels that a 7-bit ADC would get used. You'd have to decimate down to 225 Msps or so in order to get 7 bits of data.
{^_^} Joanne/W6MKU
On 2013/08/19 20:17, David Basden wrote:
The RTL2382U has an ADC onboard; The dongles don't use a seperate ADC. The main other component is the tuner.
The RTL2382U uses a sigma-delta ADC, so it samples at a much higher rate than it needs, but only at 1 bit. It then trades the high sample rate for higher dynamic range. (Think reverse PWM, although that is a huge oversimplification).
http://www.maximintegrated.com/app-notes/index.mvp/id/1870
The crystal is to drive the clock of the RTL2832U. It's almost certainly running a single 1 bit sample per clock.
If you were to get the samples at the 28.8Msps rate, they would be 1 bit samples, which you would still have to filter and downsample for most uses. I'm not aware of any way to get the samples out at that rate.
David
On Mon, Aug 19, 2013 at 11:44:51PM -0300, Lucas Ingles wrote:
Hello to all,
Please, can someone help me to understand how RTL2832U samples signals? I know it has two ADCs, one for the I (in-phase) component and other ADC for the Q (quadrature) component.
In http://superkuh.com/rtlsdr.html the author states the signal is sampled initially at 28.8 Msps and then re sampled to present whatever sample rate is desired.
But http://www.realtek.com.tw/products/productsView.aspx?Langid=1&PFid=35&am... says that 28.8MHz is the frequency of the crystal, not the ADC.
I am confused with that, can someone help me? If RTL2832U is able to sample at 28.8Msps, why don't use the maximum sample rate? Maybe USB limitations?
Also, all ADCs used in RTL-SDR dongles are inside RTL2832U? Or we have external ADCs?
Thanks very much in advance, Lucas Ingles
Am Dienstag, den 20.08.2013, 14:24 +1000 schrieb David Basden:
As far as I understand it, sampling really happens at 28.8MHz with probably 8 bits per channel. These ADCs are integrated in the RTL2832U chip. After sampling, the samples are filtered using a symmetric FIR filter (I reported how that filter is programmed around a year ago on this list), then resampled to four times the user ADC. At that stage, a second FIR anti-alias filter which seems ot be fixed (or running on default coefficients all the time) kicks in before down-sampling to the requested sample rate.
The 7-bit ADC quoted by jdow is also present on the chip, but it is a low-bandwidth ADC. Some tuner chips, like the FC0012 (one of my dongles has that chip) have a wide-bandwidth rectifier indicating the total RF level at the input, but only an analog output but no digital provision to read that level. The 7-bit ADC is used to measure the RF level to set the RF gain for the tuner.
The 3.2MSps limit is definitely caused by the USB interface in the RTL chips, actually, in my experience, already 2.88MHz is sometimes dropping samples. It seems (from comments in the vendor-provided DVB-T driver) like there might be a way to run that chip in USB isochronous mode instead of bulk mode, but I have no idea whether that would require strap modification, or just fiddling with some registers in the USB interface section.
On Mon, Aug 19, 2013 at 08:47:20PM -0700, jdow wrote:
That doesn't necessarily square with "7-bit ADC for RF signals level measurement". It's unclear to me where it would get the signal with enough levels that a 7-bit ADC would get used. You'd have to decimate down to 225 Msps or so in order to get 7 bits of data.
{^_^} Joanne/W6MKU
Regards, Michael Karcher
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David Basden -
Michael Karcher