Re: How RTL-SDR samples signals

That doesn't necessarily square with "7-bit ADC for RF signals level measurement". It's unclear to me where it would get the signal with enough levels that a 7-bit ADC would get used. You'd have to decimate down to 225 Msps or so in order to get 7 bits of data. {^_^} Joanne/W6MKU On 2013/08/19 20:17, David Basden wrote: >The RTL2382U has an ADC onboard; The dongles don't use a seperate >ADC. The main other component is the tuner. > >The RTL2382U uses a sigma-delta ADC, so it samples at a much higher >rate than it needs, but only at 1 bit. It then trades the high >sample rate for higher dynamic range. (Think reverse PWM, although >that is a huge oversimplification). > > >http://www.maximintegrated.com/app-notes/index.mvp/id/1870 > >The crystal is to drive the clock of the RTL2832U. It's almost certainly >running a single 1 bit sample per clock. > >If you were to get the samples at the 28.8Msps rate, they would be 1 bit >samples, which you would still have to filter and downsample for most >uses. I'm not aware of any way to get the samples out at that rate. > >David > >On Mon, Aug 19, 2013 at 11:44:51PM -0300, Lucas Ingles wrote: >>Hello to all, >> >>Please, can someone help me to understand how RTL2832U samples signals? >>I know it has two ADCs, one for the I (in-phase) component and other ADC >>for the Q (quadrature) component. >> >>In http://superkuh.com/rtlsdr.html the author states the signal is sampled >>initially at 28.8 Msps and then re sampled to present whatever sample rate >>is desired. >> >>But >>http://www.realtek.com.tw/products/productsView.aspx?Langid=1&PFid=35&Level=4&Conn=3&ProdID=257 >>says >>that 28.8MHz is the frequency of the crystal, not the ADC. >> >>I am confused with that, can someone help me? >>If RTL2832U is able to sample at 28.8Msps, why don't use the maximum sample >>rate? Maybe USB limitations? >> >>Also, all ADCs used in RTL-SDR dongles are inside RTL2832U? Or we have >>external ADCs? >> >>Thanks very much in advance, >>Lucas Ingles >