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Hello everybody,
since we found out that the Atmel SAM3U SSC interface is only capable of transporting 500ksps worth of I/Q data, we heard a lot of complaining because of the too narrow bandwith. Especially compared to the rtl-sdr with about 2msps, our 500ksps was bit contrained. The fact, that the OsmoSDR is much more sensitive to very small signals and brings a 14bit ADC instead of 8bits did not really compensate for the bandwidth loss.
Also the mismatch between E4000 output resistance and ADC input brought some unwanted spectral effects.
Instead of just releasing stuff, we decided to fix both issues: I now have a prototype with simple stack-on-board, that adds two op-amps to decouple the E4000 from the ADC and lower the impedance and also this board connecteds the available FPGA pins to the MCI (SD-Card) interface of the Atmel SAM3U.
For this to get working, we had to rewrite major parts of the ARM firmware and the FPGA VHDL code. Today this work is completed and I can report success: The OsmoSDR now delivers up to 4msps at 14bits. Also the strange peaks around Niquist/zero frequency are gone.
Find a screenshot of SDRangelove recording a DAB signal at 2msps (SDRangelove needs some more love until it can cope with 4msps in realtime - but we have verified that 4msps works without dropped samples using the builtin FPGA test mode).
http://www.cdaniel.de/download/osmosdr-dab-2mhz.png
We will now integrate the changes into the OsmoSDR mainboard and reroute the now free SSC pins to the pin headers instead of the MCI interface. Also we will add the opamps.
For the already produced OsmoSDR boards, we will have more of the prototype stack-on-top-boards.
We will keep you in the loop!
Best regards, Christian
PS: Regarding the DAB screenshot: - - The horizontal lines are correct - DAB uses a so called "pilot symbol", which only has energy on a few carriers. That's why it looks like a pause in the signal. - - The vertical line is also correct - DAB does not use the middle carrier to avoid I/Q offset problems on the transmitter side.
- -- - --------------------------------------------------- | maintech # Dipl. Inf (FH) Christian Daniel | | GmbH ### Otto-Hahn-Str. 15 · D-97204 Höchberg | - --------------------------------------------------- | AG Würzburg, HRB 8790 Tax-ID DE242279645 | - --------------------------------------------------- | http://www.maintech.de cd@maintech.de | - ---------------------------------------------------
Hi,
First off: Just awesome ! :)
Also the strange peaks around Niquist/zero frequency are gone.
I guess those were due to the impedance mismatch ?
Did you also do a gain of 2 in there to boost the elonics output to use the ADC full range ?
That's gorgeous :p
Is there a manual DC offset corrected somewhere or is that the raw data from the DAC ?
For the already produced OsmoSDR boards, we will have more of the prototype stack-on-top-boards.
Do you already have the schematics ?
Cheers,
Sylvain
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Hi Sylvain,
thanks for the thumbs up :)
On 17.10.2012 19:18, Sylvain Munaut wrote:
Hi,
First off: Just awesome ! :)
Also the strange peaks around Niquist/zero frequency are gone.
I guess those were due to the impedance mismatch ?
Yes, I think so, too. Every time the ADC opened the sample-and-hold circuit (low impedance), the high impedance of the E4000 caused a voltage drop. This means that the signal was overlaid with something exactly the frequency of the sample rate. Since this happened on I and Q equally, I assume this to be a pretty maths exercise for any communications engineering student. For the rest of us it is just a signal at the Niquist frequency, which appears either on the outer limits of the spectrum or at zero... At zero we would assume it to be a DC offset - but it isn't and that's why it wasn't easily compensated for or at least our algorithms didn't work very good.
Did you also do a gain of 2 in there to boost the elonics output to use the ADC full range ?
Yeppa, the impedance compensating op amps also have a gain of two. To be more precise, they have a I2C controlled potentiometer and the gain can be changed. This also makes it possible to do a hardware DC offset compensation and IQ imbalance compensation. However with the impedance mismatch gone, I think, this is not really needed anymore - the DC offset is quite simple to fix in software and the imbalance as well. Also adders/multipliers are in the FPGA datapath and we can do it there as well. The values are not so big that we absolutely need to do it on the analog side.
That's gorgeous :p
Is there a manual DC offset corrected somewhere or is that the raw data from the DAC ?
You can see the DC offset compensation is switched off, but I forgot to also switch off the IQ imbalance compensation. To tell the truth there are some effects in the middle - much lower now, but still. Also routing the SDIO signal over wires or my stack-on-PCB is not a good idea. The noise is everywhere...
For the already produced OsmoSDR boards, we will have more of the prototype stack-on-top-boards.
Do you already have the schematics ?
Yes of course. I will clean up my stuff and do a major check in tonight.
Cheers, Sylvain
Cheers :) Christian
- -- - --------------------------------------------------- | maintech # Dipl. Inf (FH) Christian Daniel | | GmbH ### Otto-Hahn-Str. 15 · D-97204 Höchberg | - --------------------------------------------------- | AG Würzburg, HRB 8790 Tax-ID DE242279645 | - --------------------------------------------------- | http://www.maintech.de cd@maintech.de | - ---------------------------------------------------
Hello ,
that are really good news. How can i get such a upgrade board ?
Best regards,
Ronny Kunze
Am 17.10.2012 18:55, schrieb Christian Daniel -- maintech GmbH:
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Hello everybody,
since we found out that the Atmel SAM3U SSC interface is only capable of transporting 500ksps worth of I/Q data, we heard a lot of complaining because of the too narrow bandwith. Especially compared to the rtl-sdr with about 2msps, our 500ksps was bit contrained. The fact, that the OsmoSDR is much more sensitive to very small signals and brings a 14bit ADC instead of 8bits did not really compensate for the bandwidth loss.
Also the mismatch between E4000 output resistance and ADC input brought some unwanted spectral effects.
Instead of just releasing stuff, we decided to fix both issues: I now have a prototype with simple stack-on-board, that adds two op-amps to decouple the E4000 from the ADC and lower the impedance and also this board connecteds the available FPGA pins to the MCI (SD-Card) interface of the Atmel SAM3U.
For this to get working, we had to rewrite major parts of the ARM firmware and the FPGA VHDL code. Today this work is completed and I can report success: The OsmoSDR now delivers up to 4msps at 14bits. Also the strange peaks around Niquist/zero frequency are gone.
Find a screenshot of SDRangelove recording a DAB signal at 2msps (SDRangelove needs some more love until it can cope with 4msps in realtime - but we have verified that 4msps works without dropped samples using the builtin FPGA test mode).
http://www.cdaniel.de/download/osmosdr-dab-2mhz.png
We will now integrate the changes into the OsmoSDR mainboard and reroute the now free SSC pins to the pin headers instead of the MCI interface. Also we will add the opamps.
For the already produced OsmoSDR boards, we will have more of the prototype stack-on-top-boards.
We will keep you in the loop!
Best regards, Christian
PS: Regarding the DAB screenshot:
- The horizontal lines are correct - DAB uses a so called "pilot
symbol", which only has energy on a few carriers. That's why it looks like a pause in the signal.
- The vertical line is also correct - DAB does not use the middle
carrier to avoid I/Q offset problems on the transmitter side.
| maintech # Dipl. Inf (FH) Christian Daniel | | GmbH ### Otto-Hahn-Str. 15 · D-97204 Höchberg |
| AG Würzburg, HRB 8790 Tax-ID DE242279645 |
| http://www.maintech.de cd@maintech.de |
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Hello,
right now I have exactly one prototype. But we have more PCBs and we will populate them to fix the boards in the wild. When I have them ready, I will post it here.
Best regards, Christian
On 18.10.2012 06:44, Ronny Kunze wrote:
Hello ,
that are really good news. How can i get such a upgrade board ?
Best regards,
Ronny Kunze
Am 17.10.2012 18:55, schrieb Christian Daniel -- maintech GmbH: Hello everybody,
since we found out that the Atmel SAM3U SSC interface is only capable of transporting 500ksps worth of I/Q data, we heard a lot of complaining because of the too narrow bandwith. Especially compared to the rtl-sdr with about 2msps, our 500ksps was bit contrained. The fact, that the OsmoSDR is much more sensitive to very small signals and brings a 14bit ADC instead of 8bits did not really compensate for the bandwidth loss.
Also the mismatch between E4000 output resistance and ADC input brought some unwanted spectral effects.
Instead of just releasing stuff, we decided to fix both issues: I now have a prototype with simple stack-on-board, that adds two op-amps to decouple the E4000 from the ADC and lower the impedance and also this board connecteds the available FPGA pins to the MCI (SD-Card) interface of the Atmel SAM3U.
For this to get working, we had to rewrite major parts of the ARM firmware and the FPGA VHDL code. Today this work is completed and I can report success: The OsmoSDR now delivers up to 4msps at 14bits. Also the strange peaks around Niquist/zero frequency are gone.
Find a screenshot of SDRangelove recording a DAB signal at 2msps (SDRangelove needs some more love until it can cope with 4msps in realtime - but we have verified that 4msps works without dropped samples using the builtin FPGA test mode).
http://www.cdaniel.de/download/osmosdr-dab-2mhz.png
We will now integrate the changes into the OsmoSDR mainboard and reroute the now free SSC pins to the pin headers instead of the MCI interface. Also we will add the opamps.
For the already produced OsmoSDR boards, we will have more of the prototype stack-on-top-boards.
We will keep you in the loop!
Best regards, Christian
PS: Regarding the DAB screenshot: - The horizontal lines are correct - DAB uses a so called "pilot symbol", which only has energy on a few carriers. That's why it looks like a pause in the signal. - The vertical line is also correct - DAB does not use the middle carrier to avoid I/Q offset problems on the transmitter side.
-- - --------------------------------------------------- | maintech # Dipl. Inf (FH) Christian Daniel | | GmbH ### Otto-Hahn-Str. 15 · D-97204 Höchberg | --------------------------------------------------- | AG Würzburg, HRB 8790 Tax-ID DE242279645 | --------------------------------------------------- | http://www.maintech.de cd@maintech.de |
- -- - --------------------------------------------------- | maintech # Dipl. Inf (FH) Christian Daniel | | GmbH ### Otto-Hahn-Str. 15 · D-97204 Höchberg | - --------------------------------------------------- | AG Würzburg, HRB 8790 Tax-ID DE242279645 | - --------------------------------------------------- | http://www.maintech.de cd@maintech.de | - ---------------------------------------------------
Hi Christian,
On Thu, Oct 18, 2012 at 06:37:27PM +0200, Christian Daniel -- maintech GmbH wrote:
right now I have exactly one prototype. But we have more PCBs and we will populate them to fix the boards in the wild. When I have them ready, I will post it here.
is there any update on those upgrade boards? We have some people interested in buying OsmoSDR boards from the sysmocom shop, but obviously they would want to buy it in a bundle with the upgrade board, rather than buy/order them separetely.
Also, we have the existing users/owners who would appreciate an option to upgrade.
Regards, Harald
Hi Christian,
thanks for all your work and the major update.
On Wed, Oct 17, 2012 at 06:55:42PM +0200, Christian Daniel -- maintech GmbH wrote:
For this to get working, we had to rewrite major parts of the ARM firmware and the FPGA VHDL code. Today this work is completed and I can report success: The OsmoSDR now delivers up to 4msps at 14bits. Also the strange peaks around Niquist/zero frequency are gone.
great!
We will now integrate the changes into the OsmoSDR mainboard and reroute the now free SSC pins to the pin headers instead of the MCI interface. Also we will add the opamps.
Are you going to do more or less full re-route of the board? If yes, it might be worth designing the size such that it can fit into a standard-size (shielded metal) case. This doesn't mean that everyone would have to operate it in such a case, but at least it would be nice if an off-the-shelf case could be used.
For the already produced OsmoSDR boards, we will have more of the prototype stack-on-top-boards.
do those boards only address the opamp / matching, or actually the SD/MMC interface between FPGA and SAM3U?
Regards, Harald
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Hi Harald!
On 18.10.2012 11:53, Harald Welte wrote:
Hi Christian,
thanks for all your work and the major update.
On Wed, Oct 17, 2012 at 06:55:42PM +0200, Christian Daniel -- maintech GmbH wrote:
For this to get working, we had to rewrite major parts of the ARM firmware and the FPGA VHDL code. Today this work is completed and I can report success: The OsmoSDR now delivers up to 4msps at 14bits. Also the strange peaks around Niquist/zero frequency are gone.
great!
We will now integrate the changes into the OsmoSDR mainboard and reroute the now free SSC pins to the pin headers instead of the MCI interface. Also we will add the opamps.
Are you going to do more or less full re-route of the board? If yes, it might be worth designing the size such that it can fit into a standard-size (shielded metal) case. This doesn't mean that everyone would have to operate it in such a case, but at least it would be nice if an off-the-shelf case could be used.
A full re-routing will not be necessary, but the metal case is high on our priority list. Especially since I found a spectral line in the GPS range, which is kind of annoying when testing the GPS synchronisation stuff (it works when I put the OsmoSDR in a cookie box :).
For the already produced OsmoSDR boards, we will have more of the prototype stack-on-top-boards.
do those boards only address the opamp / matching, or actually the SD/MMC interface between FPGA and SAM3U?
Both, but you can test the SDIO interface alone if you put six wires on the connectors between SAM3U and the FPGA. Schematics will go to git tonight.
Regards, Harald
Regards :) Christian
- -- - --------------------------------------------------- | maintech # Dipl. Inf (FH) Christian Daniel | | GmbH ### Otto-Hahn-Str. 15 · D-97204 Höchberg | - --------------------------------------------------- | AG Würzburg, HRB 8790 Tax-ID DE242279645 | - --------------------------------------------------- | http://www.maintech.de cd@maintech.de | - ---------------------------------------------------
-
Christian Daniel -- maintech GmbH -
Harald Welte -
Ronny Kunze -
Sylvain Munaut