RE: stroboscopic (aka equivalent time sampling) using EZCAP DVB dongle ?

The E4000 Tuner offers a stepping stone into the world of SDRs. It does the heavy lifting, significantly reducing the size, cost, and complexity of a SDR. It does not do any programmable signal processing, which is where SDRs are strongest. Quantization has been left out of the discussion because the RTL2832 is so bad at it (to conserve size and cost). The RTL2832 hamstrings the usefulness of the E4000 significantly narrowing the application of DSP. If you want high fidelity reception, you must apply a high fidelity ADC. The Tuner Dongle offers a low cost opportunity for an enterprising hacker to jump ahead and produce a product worth pursuing. As is it is very limited. Also, GSM is very narrowband voice. Data is wideband and complex, Data is where the Gold is, mining it takes better tools which the RTL2832 prevents application to the reception. Typical low price ADC ...The ADC12DS105 is a dual 12-Bit, 105 Msps A/D Converter http://www.ti.com/product/adc12ds105 Price $31 http://www.ti.com/tool/adc12ds105lfeb Design Kit $495, Accessories include a USB Interface http://www.ti.com/solution/software-defined-radio-sdr-diagram http://www.ti.com/lit/an/slaa407/slaa407.pdf How to Select the (Best Minimum) Sampling Rate The selection of sampling rate is also important for ADCs. Fast encode clocks offer the advantage of making analog filtering significantly easier. Given a fixed signal bandwidth, a higher encode rate increases the allowable transition band. This allows lower order filters to be used to reduce cost, or, if higher order filters are still used, greater stop band rejection can potentially be realized. Another advantage with increasing clock speeds is processing gain. Processing gain is achieved when the signal of interest is oversampled and then digitally filtered. Processing gain occurs when noise outside the band of interest is digitally removed, which results in improved in-band SNR. Processing gain can be easily determined using Equation 1. This equation determines the increase in SNR over and above the SNR of the converter alone. Processing Gain = 10log10 (Half of the sample rate/ filter BW) Also, when selecting the sampling rate, the user must consider the second and third harmonics (HD2 and HD3). These harmonics must lie outside the band of interest. These can be filtered using the digital filter inside the DDC/DSP. That means, frequency planning also becomes important when designing a SDR system. -----Original Message----- From: osmocom-sdr-bounces(a)lists.osmocom.org [mailto:osmocom-sdr-bounces@lists.osmocom.org] On Behalf Of Sylvain Munaut Sent: Sunday, July 08, 2012 10:29 AM Cc: osmocom-sdr(a)lists.osmocom.org Subject: Re: stroboscopic (aka equivalent time sampling) using EZCAP DVB dongle ? This is IQ signal you don't need twice the bandwidth, you only need once. So a 8 Msps IQ would be adequate to represent a 8 MHz bandwidth. No you don't. You want a concrete example: Most GSM phone are demodulating a phase modulated signal by sampling at exactly one sample per symbol (so they're even sampling _lower_ than the actual signal bandwidth) And although oversampling is useful in certain case to analyze signal, it's essentially useless if the signal has _already_ been filtered like it is in the E4000 case. If the IQ output has only 8 MHz of useful content at the output, you can oversample all you want, it won't bring back what the E4000 discarded ... Those antialiasing filter you mention, they're in the E4000 ! 2) I didn't say bigger / better SDR would be useless ... I'm just saying if you're spending hundreds / thousands on better ADC and better PC interface you might as well ditch the E4000 and use a better RF front end as well. The spectral output of the E4000 is far from being "clean", there is distortions / LO leakage / random spurs / 28.8M clock leakage / ... etc ... Oh and Elonics declared bankrupcy so the E4000 supply is fading ... Cheers, Sylvain