Hi,
I've received 10pcs of OHM4048052GG010020-26.0M today. Andrey Sviyazov
- could you measure their performance and test UmTRX with them?
--
Regards,
Alexander Chemeris.
CEO, Fairwaves LLC / ООО УмРадио
http://fairwaves.ru
We need a picture of UmTRX in action for the Open Hardware Summit
web-site. Andrey Sviyazov - could you bring your UmTRX (the one with
an enclosure) to the hackerspace to make a picture of it with
antennas?
--
Regards,
Alexander Chemeris.
CEO, Fairwaves LLC / ООО УмРадио
http://fairwaves.ru
Sorry, that was meant to be sent to the mailing list :)
Best regards,
Andrey Sviyazov.
---------- Forwarded message ----------
From: Andrey Sviyazov <andreysviyaz(a)gmail.com>
Date: 2012/7/18
Subject: LMS TxLO noise
Hi Thomas.
Here forwarded my last e-mail with noise plots when I stopped work around
it at first time, please see below.
Please try to play around Tx PLL charge pump current (register 0x16) for
better RMS phase stability.
I think we should reach 1 degree or below.
Alexander gave me the second UmTRX board and after checking and fixing all
known hardware issues<http://code.google.com/p/umtrx/issues/list?can=1&q=&colspec=ID+Type+Status+…>I've
got roughly the same LO noise plot.
Possible Robin had no time to fixing all of our issues, so check them all
please.
And also check please what type of TCXO installed on your board.
Best regards,
Andrey Sviyazov.
---------- Forwarded message ----------
From: Andrey Sviyazov <andreysviyaz(a)gmail.com>
Date: 2012/4/13
Subject: Re: LMS TxLO noise
Hi all.
There is progress with LMS PLL :)
Pictures are attached here.
t was discovered that 80 kHz spurs come from Ethernet, or rather from the
ET1011.
I unknowingly put the choke between transistor of 1V regulator and analog
power 1V.
As a result, the regulator has become unstable and oscillated 80 kHz with
amplitude of 200 mV, which climbed into the LMS PLL.
To correct this problem L46 should be replaced by jumper on all alfa
version PCB's.
Also I just played with current in the PLL loop, shown on the picture for
clarity.
Proved to be the optimal current 1,9 mA (you should write 0x93 in the
register of 0x16).
But, I think, for the RxPLL will be better use of the current 2.4 mA,
because the nearest noises more important for Rx (you should write 0x98 in
the register 0x26).
Best regards,
Andrey Sviyazov.
Hi all!
Here last version PCB of UmTRXv2.
In the next e-mail I'll include project files and cheapest BOM for debug
variant.
I think it is final, because of nobody desire to say me any suggestions
(except Robin).
Best regards,
Andrey Sviyazov.
Hi all,
Thomas has discovered that DC offset calibration for LMS is drifting a
lot with temperature changes and this has detrimental effect on the
modulation accuracy:
http://code.google.com/p/umtrx/issues/detail?id=31
One solution proposed by Sylvain is to tune modulation a bit higher
using digital modulation, which should be straightforward with UHD
which has digital mixer in FPGA.
But I wonder what is a recommended solution for this temperature
compensation for LMS in general. Srdjan, could you comment on this?
--
Regards,
Alexander Chemeris.
CEO, Fairwaves LLC / ООО УмРадио
http://fairwaves.ru
The Ettus UHD framework adopted for the umTRX only supports GigE
(simple_gemac). A reworked, Wishbone-compliant 10/100 Ethernet MAC
is included in the OpenRISC SoC project on Opencores. It has been
ported to the Digilent Atlys board, which has a Spartan-6 FPGA.
http://www.chokladfabriken.org/projects/orpsoc-atlys
I'll begin the port of this Ethernet MAC (a cleaned-up version of the
10/100 core on OpenCores) to the UmTRX and test it on Close-Haul's
SP-605 Spartan-6 eval. board. I'm not quite sure how long this task
will take, but this feature falls into the
"nice-to-have-but-not-urgent" category.
-Robin
--
Robin Coxe | Close-Haul Communications, Inc. | Boston, MA
+1-617-470-8825
Hi all,
As far as I am aware, you are currently discussing how to improve
LMS6002 PLL phase noise. Below are some inputs from my side which may help.
Apart from playing with PLL registers we have two additional options.
1. Use clean TCXCO which provides 4 times higher reference followed by
divide by 4 to generate PLL reference clock. Recently, we experimented
with 30.72*4 MHz TCXCO. Dividing its output by 4 before going into LMS
chip we have got improvement of 6dB in phase noise plateau region.
2. Current PLL loop filter has been designed to cover the whole LMS
frequency range hence using kind of mid value for Kvco. We can customize
the loop filter for a particular band. To do that we need to know
frequency range China Mobile is looking for and reference clock you want
to use (26MHz, 26*4/4MHz, ...). Please note that PLL reference clock
does not need to be the same as system clock i.e. we can also use
30.72MHz, 30.72*4/4MHz etc.
Best regards, Srdjan
Google project hosting is currently read only for network maintenance.
Here are general OpenBTS / UmTRX setup instructions. I'll post them
when write access is restored.
Download
=======
UHD
git://github.com/chemeris/UHD-Fairwaves.git fairwaves/umtrx-dboard
OpenBTS
git://github.com/ttsou/openbts-p2.8 umtrx
Follow standard build instructions.
http://files.ettus.com/uhd_docs/manual/html/build.htmlhttp://wush.net/trac/rangepublic/wiki/BuildInstallRun
UmTRX Setup
===========
Configuration of the LMS6003D is through the control script
'umtrx_lms.py', which is installed in '/usr/local/share/uhd/utils'.
Calibration prior to operation is strongly recommended.
Example setup for ARFCN 925:
Initialization and auto-calibration:
./umtrx_lms.py --lms 1 --lms-init
./umtrx_lms.py --lms 1 --lms-tx-enable 1
./umtrx_lms.py --lms 1 --lms-rx-enable 1
./umtrx_lms.py --lms 1 --pll-ref-clock 26e6 --lpf-bandwidth-code
0x0f --lms-auto-calibration
RX LNA and RXVGA2 selection and gain control
./umtrx_lms.py --lms 1 --reg 0x75 --data 0xf0
./umtrx_lms.py --lms 1 --reg 0x65 --data 10
TX LPF control
./umtrx_lms.py --lms 1 --reg 0x34 --data 0x3e
LO leakage cancellation (calibration data values may vary)
./umtrx_lms.py --lms 1 --reg 0x42 --data 0x67
./umtrx_lms.py --lms 1 --reg 0x43 --data 0x89
TX/RX PLL charge pump current
./umtrx_lms.py --lms 1 --reg 0x16 --data 0x93
Tuning
./umtrx_lms.py --lms 1 --lms-rx-pll-tune 925.2e6
./umtrx_lms.py --lms 1 --lms-tx-pll-tune 880.2e6
TXVGA2 gain to max and enable PA
./umtrx_lms.py --lms 1 --reg 0x45 --data 0xc8
./umtrx_lms.py --lms 1 --lms-pa-on 2
Running OpenBTS
==============
Follow standard instructions.
http://wush.net/trac/rangepublic/wiki/BuildInstallRun
Thomas
Hi Thomas,
Could you hack together a quick guide how to run OpenBTS with UmTRX at the wiki?
http://code.google.com/p/umtrx/wiki/RunningOpenBTS
This should basically include which branch to use, what patches to
apply (if any), and a script for umtrx_lms.py to tune LMS to the
correct frequency. I was meaning to write this for about a week, but
turns out it's very hard to allocate enough time to do that
accurately.
--
Regards,
Alexander Chemeris.
CEO, Fairwaves LLC / ООО УмРадио
http://fairwaves.ru
Andrey Sviyazov,
You wanted to know how to plot received signal under Windows without
installing Matlab or something as big and as expensive. Dmitri
Stolnikov recommended to use a free version of Signals Analyzer
software which should be very powerful. You could download it as "SA
free" here:
http://signals.radioscanner.ru/info/item1/
Dmitri says that the free version of SA could only import .wav files,
so you will need to convert raw files into .wav files. My preferred
way to do this is to use 'sox' command line utility like that:
sox -r 270833 -e signed -b 16 -c 2 record.cfile record.wav
Windows binaries of 'sox' is available from the official web-site:
http://sox.sourceforge.net/
--
Regards,
Alexander Chemeris.
CEO, Fairwaves LLC / ООО УмРадио
http://fairwaves.ru
