Hi, Something about a missing symbol ? I had the same thing in 13.3 and none of the workaround on the net worked (they just resulted in different errors). I tried 14.1 and had the same issue but this time one of the workaround worked : LD_PRELOAD of libboost_serialization-gcc41-mt-p-1_38.so.1.38.0 made it work. Cheers, Sylvain

Hi Thomas, On Sun, Jun 17, 2012 at 4:59 AM, Thomas Tsou &lt;thomastsou(a)gmail.com&gt; wrote: I apologize for not explaining the status of our code. For FPGA build you should use akarpenkov/lms_freq branch: https://github.com/chemeris/UHD-Fairwaves/tree/akarpenkov/lms_freq Alternatively I recommend you to use this image which is tested and known to work fine (either bin for usrp_n2xx_net_burner.py or bit for JTAG): http://code.google.com/p/umtrx/downloads/detail?name=u2plus_umtrx-20120424.… http://code.google.com/p/umtrx/downloads/detail?name=u2plus_umtrx-20120424.… Host utils should be taken from 'fairwaves/umtrx-dboard' branch, as I wrote earlier. Branch 'achemeris/lms_work' contains an unfinished code for baseband loopback inside of the LMS. I just had no time to finish and test it. If you need this, I could drop you an additional documentation on baseband loopback usage. Or you could use RF loopback which is better documented in the original documentation. Branch 'achemeris/zpu_work' contains our changes to ZPU to get ICAP working. I think I fixed all bugs on the ZPU side in that branch, but it still doesn't work. Build ZPU from that branch if you want to play with ICAP. I know, this is a bit of mess and we should clean this up. Looks like it is not correctly initialized. Try using the same initialization sequence as I do: ./umtrx_lms.py --lms 1 --lms-init ./umtrx_lms.py --lms 1 --lms-tx-enable 1 #./umtrx_lms.py --lms 1 --lms-rx-enable 1 # Select 0.75MHz LPF ./umtrx_lms.py --lms 1 --reg 0x34 --data 0x3e ./umtrx_lms.py --lms 1 --pll-ref-clock 26e6 --lpf-bandwidth-code 0x0f --lms-auto-calibration # Manual DC calibration ./umtrx_lms.py --lms 1 --reg 0x42 --data 0x71 ./umtrx_lms.py --lms 1 --reg 0x43 --data 0x89 ../build/utils/uhd_cal_tx_dc_offset --compl_i 0.001 --compl_q 0 # Tuning ./umtrx_lms.py --lms 1 --lms-tx-pll-tune 925e6 ./umtrx_lms.py --lms 1 --lms-pa-on 2 Yes, it works fine with the FPGA image above. I use the following command to burn it: ./usrp_n2xx_net_burner.py --addr=<ip address> --fpga=<path to FPGA image> --overwrite-safe Note, that we have to use safe firmware, because ICAP is not working in our firmware yet and thus we can't load a non-safe firmware. IIRC the image above always tries to load a second ZPU firmware from flash. So if you're not sure in your ZPU image - erase it from flash. You could see whether it boots it or not in the serial console (mini-USB connector at the back). Yes, they have issues under 64-bit Linux. So you have to either use 32-bit Linux or upgrade to ISE 14.1 and use the workaround as Sylvain mentioned. -- Regards, Alexander Chemeris. CEO, Fairwaves LLC / ООО УмРадио http://fairwaves.ru

On Mon, Jun 18, 2012 at 4:17 AM, Thomas Tsou &lt;thomastsou(a)gmail.com&gt; wrote: Yes, after the automatic DC offset calibration with --lms-auto-calibration, you should manually calibrate Tx DC offset and Tx IQ imbalance as described at the guide I attached (sections 4.8 and 4.9)/ Also look at the Starter manual section 6 for a more step by step, but high-level guide. I and Q channel DC calibration could be done with this commands (this is internal to LMS): ./umtrx_lms.py --lms 1 --reg 0x42 --data 0x<val> ./umtrx_lms.py --lms 1 --reg 0x43 --data 0x<val> And you could control I/Q balance with this command (done in FPGA at 13MSPS): ../build/utils/uhd_cal_tx_dc_offset --compl_i <val> --compl_q <val> Nothing really tested yet. At least you should do this steps: ./umtrx_lms.py --lms 1 --lms-rx-enable 1 ./umtrx_lms.py --lms 1 --lms-rx-pll-tune 925e6 ./umtrx_lms.py --lms 1 --pll-ref-clock 26e6 --lpf-bandwidth-code 0x0f --lms-auto-calibration Then you need to select Rx input with register 0x75. Should be something like this: ./umtrx_lms.py --lms 1 --reg 0x75 --data 0xF0 There are a lot of other settings for Rx fontend in LMS which I don't understand, but I guess defaults should be fine for the start. Then we could tune them with Andrey's help. If signal is too low you may need to tune Rx VGA2 gain with the register 0x65 (refer to the programming guide for the register values encoding). To simplify further use we should add these controls to the LMS control script. -- Regards, Alexander Chemeris. CEO, Fairwaves LLC / ООО УмРадио http://fairwaves.ru

On Wed, Jun 20, 2012 at 5:33 AM, Thomas Tsou &lt;thomastsou(a)gmail.com&gt; wrote: Good job! How did you setup Rx on LMS? And anything else to know before testing? Now it's time to make this a configure option. :) So I/Q order is different at Rx and Tx?We could fix this in FPGA. With the multi-ARFCN support, do you think it will be hard to add support for the second channel in UmTRX to OpenBTS to get 15 calls? Second channel is not fully supported by UmTRX FPGA firmware yet, but we should do this soon. -- Regards, Alexander Chemeris. CEO, Fairwaves LLC / ООО УмРадио http://fairwaves.ru

On Wed, Jun 20, 2012 at 12:33 AM, Alexander Chemeris &lt;alexander.chemeris(a)gmail.com&gt; wrote: I tried this briefly but the transmit output was cutoff by LPF. I'll try it again with different LMS settings at the end of the week. I mainly use two approaches. In the first method, feed the baseband output to a scope (optionally set the transceiver filler table with easy to recognizable values). Set one output of a dual function generator to trigger the scope at the frame rate. Use the second function generator output (with low duty cycle) to select individual timeslots and also trigger an RF signal generator that feeds back to the device. The offset can then be detected using the receiver energy detector. The second much quicker (and generally more effective) approach is to simply measure with a handset. Disable upper layer RACH handling and average the RACH burst TOA values over a few attempts and different handsets. This delay value is the effective combined group delay (relative to the sample counter) of host and device filters, RF components, feed line, etc. I rarely use first approach, but sometimes absolutely nothing works and the test equipment needs to be used to get a better picture. I could record a (low quality) video with my phone. That is the only video recorder I have available right now. I can take pretty good pictures though. Thomas

Hi, I've fixed reading data order from the receive ADCs. You can found it in fairwaves/umtrx branch (commit e2e5dc62317a714944e9d54b56240fca5336e2ca). 2012/6/20 Thomas Tsou &lt;thomastsou(a)gmail.com&gt; Regards, Andrew Karpenkov

I've done it. tx_waveforms work fine. Both .bit and .bin files attached. Please, check other function of UmTRX board with this flash image. Repository at github was also updated. Regards, Andrew Karpenkov 2012/6/20 Alexander Chemeris &lt;alexander.chemeris(a)gmail.com&gt;