Re: UmTRX integration with OpenBTS

On Mon, Jun 18, 2012 at 4:17 AM, Thomas Tsou &lt;thomastsou(a)gmail.com&gt; wrote: Yes, after the automatic DC offset calibration with --lms-auto-calibration, you should manually calibrate Tx DC offset and Tx IQ imbalance as described at the guide I attached (sections 4.8 and 4.9)/ Also look at the Starter manual section 6 for a more step by step, but high-level guide. I and Q channel DC calibration could be done with this commands (this is internal to LMS): ./umtrx_lms.py --lms 1 --reg 0x42 --data 0x<val> ./umtrx_lms.py --lms 1 --reg 0x43 --data 0x<val> And you could control I/Q balance with this command (done in FPGA at 13MSPS): ../build/utils/uhd_cal_tx_dc_offset --compl_i <val> --compl_q <val> Nothing really tested yet. At least you should do this steps: ./umtrx_lms.py --lms 1 --lms-rx-enable 1 ./umtrx_lms.py --lms 1 --lms-rx-pll-tune 925e6 ./umtrx_lms.py --lms 1 --pll-ref-clock 26e6 --lpf-bandwidth-code 0x0f --lms-auto-calibration Then you need to select Rx input with register 0x75. Should be something like this: ./umtrx_lms.py --lms 1 --reg 0x75 --data 0xF0 There are a lot of other settings for Rx fontend in LMS which I don't understand, but I guess defaults should be fine for the start. Then we could tune them with Andrey's help. If signal is too low you may need to tune Rx VGA2 gain with the register 0x65 (refer to the programming guide for the register values encoding). To simplify further use we should add these controls to the LMS control script. -- Regards, Alexander Chemeris. CEO, Fairwaves LLC / ООО УмРадио http://fairwaves.ru