On Sat, Jul 21, 2012 at 12:44 AM, Thomas Tsou <thomastsou(a)gmail.com> wrote:
On Fri, Jul 20, 2012 at 6:09 PM, Alexander Chemeris
<alexander.chemeris(a)gmail.com> wrote:
On Fri, Jul 20, 2012 at 10:22 PM, Thomas Tsou
<thomastsou(a)gmail.com> wrote:
There are still other calibration issues, but
phase noise is probably still
a concern.
You mean LO leakage and I/Q balance? Have you calibrated them? They're
very easy to do - I could guide you with Skype if needed.
LO leakage is calibrated. I/Q balance is not. Are there steps for this
somewhere? I read 4.10 in the calibration guide, but I'm still not
sure how to proceed.
Is that a good enough description for you?
Note, that FPGA registers which control I/Q imbalance compensation has
been changed in the commit which introduced dual-channel Tx:
Host side hasn't been updated to accommodate those register changes
yet. I would appreciate if you could do that.
--
Regards,
Alexander Chemeris.
CEO, Fairwaves LLC / ООО УмРадио