laforge has submitted this change. ( https://gerrit.osmocom.org/c/osmo-ttcn3-hacks/+/42856?usp=email )
Change subject: CCID: Check if reader times out after first status word
......................................................................
CCID: Check if reader times out after first status word
A case 1 APDU is sent towards the reader. The reader expects two status
words. If only the first word is sent by the SIM, the reader must
timeout and send an error message back to the host.
Change-Id: Ic5b892e356c13808555d75746c48c6d8c96ec462
---
M ccid/CCID_Tests.ttcn
1 file changed, 39 insertions(+), 0 deletions(-)
Approvals:
Hoernchen: Looks good to me, but someone else must approve
Jenkins Builder: Verified
laforge: Looks good to me, approved
diff --git a/ccid/CCID_Tests.ttcn b/ccid/CCID_Tests.ttcn
index a06c878..0988ae7 100644
--- a/ccid/CCID_Tests.ttcn
+++ b/ccid/CCID_Tests.ttcn
@@ -1045,6 +1045,44 @@
f_start_and_wait();
}
+/* The SIM responds with one status word only. */
+private function f_TC_status_word_incomplete() runs on CardemSlot_CT
+{
+ var octetstring req := c_UICC_MANAGE_CHANNEL;
+ var octetstring res := '62'O;
+ var CCID_PDU ccid_pdu;
+
+ f_cardem_manager();
+
+ f_ccid_power_on(CCID_PWRSEL_3V0);
+
+ /* Send a request towards reader. */
+ CCID.send(ts_CCID_XfrBlock(g_slot_nr, req, 0));
+ /* Receive the request by SIM. */
+ f_cardem_receive(tr_SIMTRACE_CEMU_RX_DATA(?, req));
+ /* Transmit the response by SIM. */
+ f_cardem_transmit(ts_SIMTRACE_CEMU_TX_DATA(ts_CardEmu_DataFlags(pb_and_tx := true, final := true),
+ res));
+ /* Receive the response from reader. */
+ ccid_pdu := f_ccid_receive(tr_CCID_DataBlock(g_slot_nr, ?, ?, ?));
+ if (ccid_pdu.hdr_in.bError != CCID_ERR_ICC_MUTE) {
+ setverdict(fail, "Unexpected Response or error code");
+ mtc.stop;
+ }
+
+ /* Stop simtrace emulation, to prevent race condition. */
+ vc_Cardem.stop;
+ vc_Cardem.done;
+}
+testcase TC_status_word_incomplete() runs on Test_CT
+{
+ f_init();
+
+ f_start_handler(refers(f_TC_status_word_timeout), mp_simtrace_slot, true);
+
+ f_start_and_wait();
+}
+
/* TODO */
/* IccPowerOn with wrong voltage (> 0x04) */
@@ -1093,6 +1131,7 @@
execute( TC_truncated_response() );
execute( TC_empty_slot() );
execute( TC_status_word_timeout() );
+ execute( TC_status_word_incomplete() );
}
--
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Gerrit-Change-Id: Ic5b892e356c13808555d75746c48c6d8c96ec462
Gerrit-Change-Number: 42856
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laforge has submitted this change. ( https://gerrit.osmocom.org/c/osmo-ttcn3-hacks/+/42796?usp=email )
Change subject: CCID: Send a wrong procedure byte towards the reader
......................................................................
CCID: Send a wrong procedure byte towards the reader
A case 2 request (according to ISO 7816) is sent and a response with
data is expected, but the first byte replied by the SIM is not a
procedure byte, nor a valid status byte.
This text expects the reader to return an error that states an incorrect
received procedure byte.
Change-Id: Iaa0bd8845b3408fba309874fe41c855d8e7efccc
---
M ccid/CCID_Tests.ttcn
1 file changed, 39 insertions(+), 0 deletions(-)
Approvals:
Jenkins Builder: Verified
Hoernchen: Looks good to me, but someone else must approve
laforge: Looks good to me, approved
diff --git a/ccid/CCID_Tests.ttcn b/ccid/CCID_Tests.ttcn
index 0988ae7..5d80c16 100644
--- a/ccid/CCID_Tests.ttcn
+++ b/ccid/CCID_Tests.ttcn
@@ -1083,6 +1083,44 @@
f_start_and_wait();
}
+/* The SIM sends a wrong procedure byte */
+private function f_TC_wrong_procedure_byte() runs on CardemSlot_CT
+{
+ var octetstring req := c_SIM_READ_BINARY;
+ var octetstring res := '0102030405060708090a9000'O;
+ var CCID_PDU ccid_pdu;
+
+ f_cardem_manager();
+
+ f_ccid_power_on(CCID_PWRSEL_3V0);
+
+ /* Send a request towards reader. */
+ CCID.send(ts_CCID_XfrBlock(g_slot_nr, req, 0));
+ /* Receive the request by SIM. */
+ f_cardem_receive(tr_SIMTRACE_CEMU_RX_DATA(?, req));
+ /* Transmit the response by SIM. */
+ f_cardem_transmit(ts_SIMTRACE_CEMU_TX_DATA(ts_CardEmu_DataFlags(pb_and_tx := true, final := true),
+ '42'O & res));
+ /* Receive the response from reader. */
+ ccid_pdu := f_ccid_receive(tr_CCID_DataBlock(g_slot_nr, ?, ?, ?));
+ if (ccid_pdu.hdr_in.bError != CCID_ERR_PROCEDURE_BYTE_CONFLICT) {
+ setverdict(fail, "Unexpected Response or error code");
+ mtc.stop;
+ }
+
+ /* Stop simtrace emulation, to prevent race condition. */
+ vc_Cardem.stop;
+ vc_Cardem.done;
+}
+testcase TC_wrong_procedure_byte() runs on Test_CT
+{
+ f_init();
+
+ f_start_handler(refers(f_TC_wrong_procedure_byte), mp_simtrace_slot, true);
+
+ f_start_and_wait();
+}
+
/* TODO */
/* IccPowerOn with wrong voltage (> 0x04) */
@@ -1132,6 +1170,7 @@
execute( TC_empty_slot() );
execute( TC_status_word_timeout() );
execute( TC_status_word_incomplete() );
+ execute( TC_wrong_procedure_byte() );
}
--
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Change subject: CCID: Check if reader times out after first status word
......................................................................
Patch Set 2: Code-Review+2
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Change subject: CCID: Check if reader handles Abort correctly
......................................................................
Patch Set 7: Code-Review+1
(1 comment)
Patchset:
PS7:
I dont think having half of the test as part of the magic background layer is a great design but this test is fairly unique and we are not going to support this ever anyway so I'm fine with the comment.
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Change subject: CCID: Check if reader times out after first status word
......................................................................
Patch Set 2: Code-Review+1
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