5 Sep
2012
5 Sep
'12
9:02 p.m.
Yes, I looking at this code.
Regards, Andrew Karpenkov
2012/9/5 ☎ Max.Suraev@fairwaves.ru
07.08.2012 21:06, Andrew Karpenkov пишет:
Max, Sylvain or anyone else, can you help me get access to FPGA
registers (they
connected to wishbone bus) from host? I'm not very good at programming
on python..
UHD can do this (example here: host\lib\usrp\usrp2\usrp2_impl.cpp:530).
Just to double check that we're looking at the same code are you talking about this code:
if (source == "internal") _mbc[mb].iface->poke32(U2_REG_MISC_CTRL_CLOCK, 0x12);
?
-- best regards, Max, http://fairwaves.ru