neels has uploaded this change for review. ( https://gerrit.osmocom.org/c/pysim/+/42829?usp=email )
Change subject: saip.PES.rebuild_mandatory_services(): set 5G get-identity, profile-a-x25519, profile-b-p256
......................................................................
saip.PES.rebuild_mandatory_services(): set 5G get-identity, profile-a-x25519, profile-b-p256
Change-Id: Ibc29c6437c5c92e2b14938b733156536863465c1
---
M pySim/esim/saip/__init__.py
1 file changed, 51 insertions(+), 2 deletions(-)
git pull ssh://gerrit.osmocom.org:29418/pysim refs/changes/29/42829/1
diff --git a/pySim/esim/saip/__init__.py b/pySim/esim/saip/__init__.py
index ec59c50..5fe8136 100644
--- a/pySim/esim/saip/__init__.py
+++ b/pySim/esim/saip/__init__.py
@@ -34,7 +34,7 @@
from pySim.utils import dec_imsi
from pySim.ts_102_221 import FileDescriptor
from pySim.filesystem import CardADF, Path
-from pySim.ts_31_102 import ADF_USIM
+from pySim.ts_31_102 import ADF_USIM, EF_UST, EF_SUCI_Calc_Info
from pySim.ts_31_103 import ADF_ISIM
from pySim.esim import compile_asn1_subdir
from pySim.esim.saip import templates
@@ -1726,7 +1726,56 @@
if 'BT' in ftype_list:
svc_set.add('ber-tlv')
# FIXME:dfLinked files (scan all files, check for non-empty Fcp.linkPath presence of DFs)
- # TODO: 5G related bits (derive from EF.UST or file presence?)
+
+ # 5G:
+ # - When SUCI is:
+ # - enabled (EF.UST 124 = true)
+ # AND
+ # - calculated in the USIM (EF.UST 125 = true),
+ # then eUICC-Mandatory-services needs 'get-identity'.
+ # - 'get-identity' implies that the eUICC must support ONE OF profile-A OR profile-B.
+ # So, when SUCI-CalcInfo for USIM in DF.SAIP contains both key types,
+ # then no profile-A or B services need to be requested explicitly.
+ # - When the SUCI-CalcInfo for USIM (DF.SAIP) contains ONLY a key of profile-A ("identifier": 1),
+ # then eUICC-Mandatory-services needs 'profile-a-x25519'.
+ # - Same: ONLY profile-B ("identifier": 2) needs 'profile-b-p256'.
+ # - (When SUCI is calculated in the UE, then the eUICC does not need to provide any of these services.)
+ suci_in_usim_enabled = False
+ try:
+ f_ust = self.get_pe_for_type("usim").files["ef-ust"]
+ ust = EF_UST().decode_bin(f_ust.body)
+ if ust[124]['activated'] and ust[125]['activated']:
+ suci_in_usim_enabled = True
+ except (KeyError, AttributeError):
+ pass
+ if suci_in_usim_enabled:
+ svc_set.add('get-identity')
+ # now check for profile-a and profile-b
+ suci_calcinfo_has_profile_a = False
+ suci_calcinfo_has_profile_b = False
+ try:
+ f_sucici = self.get_pe_for_type("df-saip").files["ef-suci-calc-info-usim"]
+ sucici = EF_SUCI_Calc_Info().decode_bin(f_sucici.body) or {}
+ for prot_scheme in sucici['prot_scheme_id_list']:
+ if not isinstance(prot_scheme, dict):
+ continue
+ ps_id = prot_scheme["identifier"]
+ if ps_id == 1:
+ suci_calcinfo_has_profile_a = True
+ elif ps_id == 2:
+ suci_calcinfo_has_profile_b = True
+ except (KeyError, AttributeError):
+ pass
+ if suci_calcinfo_has_profile_a and suci_calcinfo_has_profile_b:
+ # 'get-identity' implies that the eUICC supports one of the above. Do not require a specific one.
+ pass
+ elif suci_calcinfo_has_profile_a:
+ # The profile has only a profile-A key, so require that
+ svc_set.add('profile-a-x25519')
+ elif suci_calcinfo_has_profile_b:
+ # The profile has only a profile-B key, so require that
+ svc_set.add('profile-b-p256')
+
hdr_pe = self.get_pe_for_type('header')
# patch in the 'manual' services from the existing list:
for old_svc in hdr_pe.decoded['eUICC-Mandatory-services'].keys():
--
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Gerrit-MessageType: newchange
Gerrit-Project: pysim
Gerrit-Branch: master
Gerrit-Change-Id: Ibc29c6437c5c92e2b14938b733156536863465c1
Gerrit-Change-Number: 42829
Gerrit-PatchSet: 1
Gerrit-Owner: neels <nhofmeyr(a)sysmocom.de>
laforge has submitted this change. ( https://gerrit.osmocom.org/c/osmo-ccid-firmware/+/42780?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: 7816fsm: fail PPS on invalid first byte in PPS_S_WAIT_PPSX
......................................................................
7816fsm: fail PPS on invalid first byte in PPS_S_WAIT_PPSX
Change-Id: I5b74b8443a98224c0c95a664a886066495d8b64a
---
M ccid_common/iso7816_fsm.c
1 file changed, 15 insertions(+), 1 deletion(-)
Approvals:
jolly: Looks good to me, but someone else must approve
laforge: Looks good to me, approved
Jenkins Builder: Verified
diff --git a/ccid_common/iso7816_fsm.c b/ccid_common/iso7816_fsm.c
index 2b3b41e..c0ff1f0 100644
--- a/ccid_common/iso7816_fsm.c
+++ b/ccid_common/iso7816_fsm.c
@@ -1076,8 +1076,22 @@
msgb_put_u8(atp->rx_cmd, byte);
switch (fi->state) {
case PPS_S_WAIT_PPSX:
- if (byte == 0xff)
+ /* ISO 7816-3 §9.2: PPSS is fixed at 0xff. Any other
+ * first byte is an erroneous PPS response and §9.1
+ * requires deactivation. We must transition out of
+ * WAIT_PPSX on every byte like every other PPS substate
+ * so the unconditional msgb_put_u8 above stays
+ * bounded by the spec's 6-byte maximum. */
+ if (byte == 0xff) {
osmo_fsm_inst_state_chg(fi, PPS_S_WAIT_PPS0, 0, 0);
+ } else {
+ LOGPFSML(fi, LOGL_ERROR,
+ "Invalid PPSS=0x%02x (expected 0xff); failing PPS\n",
+ byte);
+ osmo_fsm_inst_state_chg(fi, PPS_S_DONE, 0, 0);
+ osmo_fsm_inst_dispatch(fi->proc.parent,
+ ISO7816_E_PPS_FAILED_IND, atp->tx_cmd);
+ }
break;
case PPS_S_WAIT_PPS0:
atp->pps0_recv = byte;
--
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Gerrit-Branch: master
Gerrit-Change-Id: I5b74b8443a98224c0c95a664a886066495d8b64a
Gerrit-Change-Number: 42780
Gerrit-PatchSet: 2
Gerrit-Owner: Hoernchen <ewild(a)sysmocom.de>
Gerrit-Reviewer: Jenkins Builder
Gerrit-Reviewer: jolly <andreas(a)eversberg.eu>
Gerrit-Reviewer: laforge <laforge(a)osmocom.org>
Gerrit-Reviewer: lynxis lazus <lynxis(a)fe80.eu>
laforge has submitted this change. ( https://gerrit.osmocom.org/c/osmo-ccid-firmware/+/42783?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: ccid: ICC_MUTE instead of CMD_NOT_SUPPORTED on XfrBlock to unpowered slot
......................................................................
ccid: ICC_MUTE instead of CMD_NOT_SUPPORTED on XfrBlock to unpowered slot
The command is supported, just currently impossible.
Closes:OS#7015
Change-Id: I7f64475b023bd2b6fd1c4263850e56dd84d20b3e
---
M ccid_common/ccid_slot_fsm.c
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
jolly: Looks good to me, but someone else must approve
Jenkins Builder: Verified
laforge: Looks good to me, approved
diff --git a/ccid_common/ccid_slot_fsm.c b/ccid_common/ccid_slot_fsm.c
index fae2c3b..d680994 100644
--- a/ccid_common/ccid_slot_fsm.c
+++ b/ccid_common/ccid_slot_fsm.c
@@ -370,7 +370,7 @@
/* might be unpowered after failed ppss that led to reset */
if (cs->icc_powered != true)
- return -0;
+ return -CCID_ERR_ICC_MUTE;
msgb_pull(msg, 10);
--
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Gerrit-Branch: master
Gerrit-Change-Id: I7f64475b023bd2b6fd1c4263850e56dd84d20b3e
Gerrit-Change-Number: 42783
Gerrit-PatchSet: 2
Gerrit-Owner: Hoernchen <ewild(a)sysmocom.de>
Gerrit-Reviewer: Jenkins Builder
Gerrit-Reviewer: jolly <andreas(a)eversberg.eu>
Gerrit-Reviewer: laforge <laforge(a)osmocom.org>
Gerrit-Reviewer: lynxis lazus <lynxis(a)fe80.eu>
laforge has submitted this change. ( https://gerrit.osmocom.org/c/osmo-ccid-firmware/+/42777?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: cuart: Fix waiting time to be per-byte instead of total timeout
......................................................................
cuart: Fix waiting time to be per-byte instead of total timeout
The previous code multiplied WT by the number of expected bytes,
creating a total timeout proportional to the transfer size. This works
fine for (currently unsupported) high baud rates, but it makes it look
like the reader "freezes" at default rates due to the very long delay.
Just reset it upon rx and do not multiply it so it behaves as expected.
Closes:OS#7012
Change-Id: Ic00040b88e1b204db3f4f3edad09878aa28d35a1
---
M ccid_common/cuart.c
M sysmoOCTSIM/cuart_driver_asf4_usart_async.c
2 files changed, 5 insertions(+), 2 deletions(-)
Approvals:
Jenkins Builder: Verified
jolly: Looks good to me, but someone else must approve
laforge: Looks good to me, approved
diff --git a/ccid_common/cuart.c b/ccid_common/cuart.c
index bb17c4b..737a392 100644
--- a/ccid_common/cuart.c
+++ b/ccid_common/cuart.c
@@ -63,8 +63,9 @@
int etu_in_us = get_etu_in_us(cuart) + 1;
cuart->wtime_etu = cuart->wtime_etu ? cuart->wtime_etu : 1;
- /* timeout is wtime * ETU * expected number of bytes */
- uint32_t usecs = etu_in_us * cuart->wtime_etu * cuart->current_wtime_byte;
+ /* ISO 7816-3 Section 10.2: WT is the max delay between consecutive
+ * characters, not a total transfer timeout. Restart on each byte. */
+ uint32_t usecs = etu_in_us * cuart->wtime_etu;
/* limit lower wait time to reasonable value */
if (usecs < 300000)
diff --git a/sysmoOCTSIM/cuart_driver_asf4_usart_async.c b/sysmoOCTSIM/cuart_driver_asf4_usart_async.c
index 42c2110..8330523 100644
--- a/sysmoOCTSIM/cuart_driver_asf4_usart_async.c
+++ b/sysmoOCTSIM/cuart_driver_asf4_usart_async.c
@@ -32,6 +32,8 @@
int rc;
OSMO_ASSERT(cuart);
+ card_uart_wtime_restart(cuart);
+
if (cuart->rx_threshold == 1) {
/* bypass ringbuffer and report byte directly */
uint8_t rx[1];
--
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Gerrit-MessageType: merged
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Gerrit-Change-Id: Ic00040b88e1b204db3f4f3edad09878aa28d35a1
Gerrit-Change-Number: 42777
Gerrit-PatchSet: 2
Gerrit-Owner: Hoernchen <ewild(a)sysmocom.de>
Gerrit-Reviewer: Jenkins Builder
Gerrit-Reviewer: jolly <andreas(a)eversberg.eu>
Gerrit-Reviewer: laforge <laforge(a)osmocom.org>
Gerrit-Reviewer: lynxis lazus <lynxis(a)fe80.eu>
laforge has submitted this change. ( https://gerrit.osmocom.org/c/osmo-ccid-firmware/+/42779?usp=email )
(
1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
)Change subject: 7816fsm: reset stale cuart state on FSM RESET entry
......................................................................
7816fsm: reset stale cuart state on FSM RESET entry
Reset paths reached without power-cycling (WTIME_EXP, HW_ERR,
CARD_REMOVAL during a warm reset) leave the cuart with stale tx_busy,
rx_threshold and wtime_etu from the prior transaction. The next ATR
then hits card_uart_tx tx_busy assertion, or the ATR receive stalls
because the 33-byte ATR can never reach a multi-byte rx_threshold
left from a TPDU.
The new card_uart_tx_abort() clears tx_busy + rx_after_tx_compl + WT,
without driving a synthetic TX_COMPLETE through the FSM.
iso7816_3_reset_onenter is the right place to do this alongside
rx_threshold=1 and wtime_etu=default, this mirrors what
card_uart_ctrl(POWER_*=0) already does, but for the warm-reset paths
that don't touch power.
Change-Id: Iac8bd7f4f0eecccc9acce149277a4f5016fec7c1
---
M ccid_common/ccid_slot_fsm.c
M ccid_common/cuart.c
M ccid_common/cuart.h
M ccid_common/iso7816_fsm.c
4 files changed, 40 insertions(+), 0 deletions(-)
Approvals:
jolly: Looks good to me, but someone else must approve
laforge: Looks good to me, approved
Jenkins Builder: Verified
diff --git a/ccid_common/ccid_slot_fsm.c b/ccid_common/ccid_slot_fsm.c
index 22d3f70..fae2c3b 100644
--- a/ccid_common/ccid_slot_fsm.c
+++ b/ccid_common/ccid_slot_fsm.c
@@ -54,6 +54,8 @@
static struct iso_fsm_slot_instance g_si;
+static void iso_fsm_slot_abort(struct ccid_slot *cs);
+
static struct iso_fsm_slot *ccid_slot2iso_fsm_slot(struct ccid_slot *cs)
{
OSMO_ASSERT(cs->slot_nr < ARRAY_SIZE(g_si.slot));
diff --git a/ccid_common/cuart.c b/ccid_common/cuart.c
index 737a392..bb47da4 100644
--- a/ccid_common/cuart.c
+++ b/ccid_common/cuart.c
@@ -167,6 +167,24 @@
return rc;
}
+/*! Abort any in-flight TX on the cuart side.
+ *
+ * Clears tx_busy and rx_after_tx_compl without driving CUART_E_TX_COMPLETE
+ * through the FSM. Use this when the layer above (the ISO 7816-3 FSM) has
+ * given up on the current transaction (e.g. WTIME / HW_ERR / CARD_REMOVAL)
+ * and is moving to reset state. Any in-flight hardware TX is no longer of
+ * interest to the FSM; if the driver-level DMA happens to complete later,
+ * the resulting TX_COMPLETE notification will see tx_busy already false
+ * and rx_after_tx_compl already false, so it won't spuriously re-enable
+ * the receiver. */
+void card_uart_tx_abort(struct card_uart *cuart)
+{
+ OSMO_ASSERT(cuart);
+ card_uart_wtime_stop(cuart);
+ cuart->tx_busy = false;
+ cuart->rx_after_tx_compl = false;
+}
+
int card_uart_tx(struct card_uart *cuart, const uint8_t *data, size_t len, bool rx_after_complete)
{
OSMO_ASSERT(cuart);
diff --git a/ccid_common/cuart.h b/ccid_common/cuart.h
index a9afc1d..a53dc18 100644
--- a/ccid_common/cuart.h
+++ b/ccid_common/cuart.h
@@ -153,6 +153,12 @@
/*! Schedule (asynchronous) transmit data via UART; optionally enable Rx after completion */
int card_uart_tx(struct card_uart *cuart, const uint8_t *data, size_t len, bool rx_after_complete);
+/*! Abort any in-flight TX. Clears tx_busy + stops WT timer. Used by the
+ * ISO7816-3 FSM when transitioning to RESET, so subsequent transactions
+ * don't trip card_uart_tx's "TX already in flight" assertion on the stale
+ * tx_busy left behind by an aborted transfer. */
+void card_uart_tx_abort(struct card_uart *cuart);
+
/*! Schedule (asynchronous) receive data via UART (after CUART_E_RX_COMPLETE) */
int card_uart_rx(struct card_uart *cuart, uint8_t *data, size_t len);
diff --git a/ccid_common/iso7816_fsm.c b/ccid_common/iso7816_fsm.c
index bad827a..2b3b41e 100644
--- a/ccid_common/iso7816_fsm.c
+++ b/ccid_common/iso7816_fsm.c
@@ -31,6 +31,7 @@
#include "logging.h"
#include "cuart.h"
+#include "iso7816_3.h"
#include "iso7816_fsm.h"
/* unionize to ensure at least properly aligned msgb struct */
@@ -312,7 +313,20 @@
struct iso7816_3_priv *ip = get_iso7816_3_priv(fi);
OSMO_ASSERT(fi->fsm == &iso7816_3_fsm);
+ /* Bring the cuart back to its default per-transaction state, matching
+ * what card_uart_ctrl(CUART_CTL_POWER_*, 0) does, but without
+ * power-cycling (warm reset, HW_ERR, WTIME paths reach S_RESET without
+ * touching power). Any reset path could land here mid-transaction with
+ * stale state: tx_busy still set from an aborted TX, rx_threshold left
+ * at e.g. 256 from a multi-byte RX setup, wtime_etu still at a
+ * PPS-negotiated value rather than the ATR default. Leaving those
+ * stale breaks the next ATR (next card_uart_tx asserts; or ATR bytes
+ * pile up in the ringbuffer waiting for a threshold that ATR's max 33
+ * bytes can never reach). */
card_uart_ctrl(ip->uart, CUART_CTL_RX_TIMER_HINT, 0);
+ card_uart_tx_abort(ip->uart);
+ card_uart_set_rx_threshold(ip->uart, 1);
+ card_uart_ctrl(ip->uart, CUART_CTL_WTIME, ISO7816_3_DEFAULT_WT);
/* go back to initial state in child FSMs */
osmo_fsm_inst_state_chg(ip->atr_fi, ATR_S_WAIT_TS, 0, 0);
--
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