gerrit-log July 2022

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Change in osmocom-bb[master]: trxcon: allocate a prim in l1sched_prim_push()

by fixeria

Attention is currently required from: laforge. fixeria has posted comments on this change. ( https://gerrit.osmocom.org/c/osmocom-bb/+/28551 ) Change subject: trxcon: allocate a prim in l1sched_prim_push() ...................................................................... Patch Set 3: (1 comment) File src/host/trxcon/src/sched_prim.c: https://gerrit.osmocom.org/c/osmocom-bb/+/28551/comment/6c65be6d_a42903d7 PS3, Line 47: s > I guess this should become static? Indeed, somehow I forgot to make this function static. Done in the new patchset. -- To view, visit https://gerrit.osmocom.org/c/osmocom-bb/+/28551 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmocom-bb Gerrit-Branch: master Gerrit-Change-Id: Ia9c0170fb06efcef569e987b57ab9ab7f7c7e847 Gerrit-Change-Number: 28551 Gerrit-PatchSet: 3 Gerrit-Owner: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: pespin <pespin(a)sysmocom.de> Gerrit-CC: laforge <laforge(a)osmocom.org> Gerrit-Attention: laforge <laforge(a)osmocom.org> Gerrit-Comment-Date: Mon, 11 Jul 2022 19:42:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: laforge <laforge(a)osmocom.org> Gerrit-MessageType: comment

2 years, 11 months

Change in osmocom-bb[master]: trxcon: remove unused include of 'logging.h' from 'l1sched.h'

by fixeria

fixeria has submitted this change. ( https://gerrit.osmocom.org/c/osmocom-bb/+/28548 ) Change subject: trxcon: remove unused include of 'logging.h' from 'l1sched.h' ...................................................................... trxcon: remove unused include of 'logging.h' from 'l1sched.h' Change-Id: I52e1b93e3f1f5e52beeb17ff27c2a83e24d25a96 Related: OS#5599, OS#3761 --- M src/host/trxcon/include/osmocom/bb/trxcon/l1sched.h 1 file changed, 0 insertions(+), 2 deletions(-) Approvals: Jenkins Builder: Verified pespin: Looks good to me, but someone else must approve laforge: Looks good to me, approved diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/l1sched.h b/src/host/trxcon/include/osmocom/bb/trxcon/l1sched.h index f4cce2c..d8f51a5 100644 --- a/src/host/trxcon/include/osmocom/bb/trxcon/l1sched.h +++ b/src/host/trxcon/include/osmocom/bb/trxcon/l1sched.h @@ -12,8 +12,6 @@ #include <osmocom/core/linuxlist.h> #include <osmocom/core/timer.h> -#include <osmocom/bb/trxcon/logging.h> - #define GSM_BURST_LEN 148 #define GSM_BURST_PL_LEN 116 -- To view, visit https://gerrit.osmocom.org/c/osmocom-bb/+/28548 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmocom-bb Gerrit-Branch: master Gerrit-Change-Id: I52e1b93e3f1f5e52beeb17ff27c2a83e24d25a96 Gerrit-Change-Number: 28548 Gerrit-PatchSet: 3 Gerrit-Owner: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: laforge <laforge(a)osmocom.org> Gerrit-Reviewer: pespin <pespin(a)sysmocom.de> Gerrit-MessageType: merged

2 years, 11 months

Change in osmocom-bb[master]: trxcon: merge 'sched_trx.h' and 'scheduler.h' into 'l1sched.h'

by fixeria

fixeria has submitted this change. ( https://gerrit.osmocom.org/c/osmocom-bb/+/28547 ) Change subject: trxcon: merge 'sched_trx.h' and 'scheduler.h' into 'l1sched.h' ...................................................................... trxcon: merge 'sched_trx.h' and 'scheduler.h' into 'l1sched.h' Change-Id: Ide1e3ccdf32fdc255acc943e0c0936d15cf0c680 Related: OS#5599, OS#3761 --- M src/host/trxcon/include/osmocom/bb/trxcon/Makefile.am R src/host/trxcon/include/osmocom/bb/trxcon/l1sched.h D src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h M src/host/trxcon/include/osmocom/bb/trxcon/trx_if.h M src/host/trxcon/src/l1ctl.c M src/host/trxcon/src/sched_clck.c M src/host/trxcon/src/sched_lchan_common.c M src/host/trxcon/src/sched_lchan_desc.c M src/host/trxcon/src/sched_lchan_pdtch.c M src/host/trxcon/src/sched_lchan_rach.c M src/host/trxcon/src/sched_lchan_sch.c M src/host/trxcon/src/sched_lchan_tchf.c M src/host/trxcon/src/sched_lchan_tchh.c M src/host/trxcon/src/sched_lchan_xcch.c M src/host/trxcon/src/sched_mframe.c M src/host/trxcon/src/sched_prim.c M src/host/trxcon/src/sched_trx.c M src/host/trxcon/src/trx_if.c M src/host/trxcon/src/trxcon.c 19 files changed, 48 insertions(+), 68 deletions(-) Approvals: Jenkins Builder: Verified pespin: Looks good to me, but someone else must approve laforge: Looks good to me, but someone else must approve fixeria: Looks good to me, approved diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/Makefile.am b/src/host/trxcon/include/osmocom/bb/trxcon/Makefile.am index e506520..4463a1d 100644 --- a/src/host/trxcon/include/osmocom/bb/trxcon/Makefile.am +++ b/src/host/trxcon/include/osmocom/bb/trxcon/Makefile.am @@ -2,8 +2,7 @@ l1ctl_proto.h \ l1ctl_link.h \ l1ctl.h \ - scheduler.h \ - sched_trx.h \ + l1sched.h \ trx_if.h \ logging.h \ trxcon.h \ diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h b/src/host/trxcon/include/osmocom/bb/trxcon/l1sched.h similarity index 93% rename from src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h rename to src/host/trxcon/include/osmocom/bb/trxcon/l1sched.h index c2649de..f4cce2c 100644 --- a/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h +++ b/src/host/trxcon/include/osmocom/bb/trxcon/l1sched.h @@ -1,5 +1,6 @@ #pragma once +#include <time.h> #include <stdint.h> #include <stdbool.h> @@ -7,10 +8,11 @@ #include <osmocom/core/utils.h> #include <osmocom/gsm/protocol/gsm_04_08.h> #include <osmocom/gsm/gsm_utils.h> +#include <osmocom/gsm/gsm0502.h> #include <osmocom/core/linuxlist.h> +#include <osmocom/core/timer.h> #include <osmocom/bb/trxcon/logging.h> -#include <osmocom/bb/trxcon/scheduler.h> #define GSM_BURST_LEN 148 #define GSM_BURST_PL_LEN 116 @@ -41,9 +43,15 @@ /* Forward declaration to avoid mutual include */ struct l1sched_lchan_state; struct l1sched_meas_set; +struct l1sched_state; struct trx_instance; struct l1sched_ts; +enum l1sched_clck_state { + L1SCHED_CLCK_ST_WAIT, + L1SCHED_CLCK_ST_OK, +}; + enum l1sched_burst_type { L1SCHED_BURST_GMSK, L1SCHED_BURST_8PSK, @@ -301,6 +309,26 @@ uint8_t payload[0]; }; +/*! One scheduler instance */ +struct l1sched_state { + /*! Clock state */ + enum l1sched_clck_state state; + /*! Local clock source */ + struct timespec clock; + /*! Count of processed frames */ + uint32_t fn_counter_proc; + /*! Local frame counter advance */ + uint32_t fn_counter_advance; + /*! Count of lost frames */ + uint32_t fn_counter_lost; + /*! Frame callback timer */ + struct osmo_timer_list clock_timer; + /*! Frame callback */ + void (*clock_cb)(struct l1sched_state *sched); + /*! Private data (e.g. pointer to trx instance) */ + void *data; +}; + extern const struct l1sched_lchan_desc l1sched_lchan_desc[_L1SCHED_CHAN_MAX]; const struct l1sched_tdma_multiframe *l1sched_mframe_layout( enum gsm_phys_chan_config config, int tn); @@ -413,3 +441,6 @@ /* Measurement history */ void l1sched_lchan_meas_push(struct l1sched_lchan_state *lchan, const struct l1sched_meas_set *meas); void l1sched_lchan_meas_avg(struct l1sched_lchan_state *lchan, unsigned int n); + +int l1sched_clck_handle(struct l1sched_state *sched, uint32_t fn); +void l1sched_clck_reset(struct l1sched_state *sched); diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h b/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h deleted file mode 100644 index 7e6b092..0000000 --- a/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h +++ /dev/null @@ -1,38 +0,0 @@ -#pragma once - -#include <stdint.h> -#include <time.h> - -#include <osmocom/core/timer.h> -#include <osmocom/gsm/gsm0502.h> - -enum l1sched_clck_state { - L1SCHED_CLCK_ST_WAIT, - L1SCHED_CLCK_ST_OK, -}; - -/* Forward structure declaration */ -struct l1sched_state; - -/*! One scheduler instance */ -struct l1sched_state { - /*! Clock state */ - enum l1sched_clck_state state; - /*! Local clock source */ - struct timespec clock; - /*! Count of processed frames */ - uint32_t fn_counter_proc; - /*! Local frame counter advance */ - uint32_t fn_counter_advance; - /*! Count of lost frames */ - uint32_t fn_counter_lost; - /*! Frame callback timer */ - struct osmo_timer_list clock_timer; - /*! Frame callback */ - void (*clock_cb)(struct l1sched_state *sched); - /*! Private data (e.g. pointer to trx instance) */ - void *data; -}; - -int l1sched_clck_handle(struct l1sched_state *sched, uint32_t fn); -void l1sched_clck_reset(struct l1sched_state *sched); diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/trx_if.h b/src/host/trxcon/include/osmocom/bb/trxcon/trx_if.h index 511101a..033eaa3 100644 --- a/src/host/trxcon/include/osmocom/bb/trxcon/trx_if.h +++ b/src/host/trxcon/include/osmocom/bb/trxcon/trx_if.h @@ -5,8 +5,7 @@ #include <osmocom/core/timer.h> #include <osmocom/core/fsm.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #define TRXC_BUF_SIZE 1024 #define TRXD_BUF_SIZE 512 diff --git a/src/host/trxcon/src/l1ctl.c b/src/host/trxcon/src/l1ctl.c index 20bd646..980ac49 100644 --- a/src/host/trxcon/src/l1ctl.c +++ b/src/host/trxcon/src/l1ctl.c @@ -40,7 +40,7 @@ #include <osmocom/bb/trxcon/l1ctl_proto.h> #include <osmocom/bb/trxcon/trx_if.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> static const char *arfcn2band_name(uint16_t arfcn) { diff --git a/src/host/trxcon/src/sched_clck.c b/src/host/trxcon/src/sched_clck.c index b7bb88d..5fb8d62 100644 --- a/src/host/trxcon/src/sched_clck.c +++ b/src/host/trxcon/src/sched_clck.c @@ -38,7 +38,7 @@ #include <osmocom/core/timer_compat.h> #include <osmocom/gsm/a5.h> -#include <osmocom/bb/trxcon/scheduler.h> +#include <osmocom/bb/trxcon/l1sched.h> #include <osmocom/bb/trxcon/logging.h> #include <osmocom/bb/trxcon/trx_if.h> diff --git a/src/host/trxcon/src/sched_lchan_common.c b/src/host/trxcon/src/sched_lchan_common.c index 600977c..c2d79de 100644 --- a/src/host/trxcon/src/sched_lchan_common.c +++ b/src/host/trxcon/src/sched_lchan_common.c @@ -37,8 +37,7 @@ #include <osmocom/gsm/protocol/gsm_08_58.h> #include <osmocom/bb/trxcon/l1ctl_proto.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #include <osmocom/bb/trxcon/logging.h> #include <osmocom/bb/trxcon/trxcon.h> #include <osmocom/bb/trxcon/trx_if.h> diff --git a/src/host/trxcon/src/sched_lchan_desc.c b/src/host/trxcon/src/sched_lchan_desc.c index 0ec4d84..96a7092 100644 --- a/src/host/trxcon/src/sched_lchan_desc.c +++ b/src/host/trxcon/src/sched_lchan_desc.c @@ -26,7 +26,7 @@ #include <osmocom/gsm/protocol/gsm_08_58.h> #include <osmocom/core/gsmtap.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> /* Forward declaration of handlers */ int rx_data_fn(struct trx_instance *trx, struct l1sched_ts *ts, diff --git a/src/host/trxcon/src/sched_lchan_pdtch.c b/src/host/trxcon/src/sched_lchan_pdtch.c index d3486b9..6063438 100644 --- a/src/host/trxcon/src/sched_lchan_pdtch.c +++ b/src/host/trxcon/src/sched_lchan_pdtch.c @@ -31,8 +31,7 @@ #include <osmocom/coding/gsm0503_coding.h> #include <osmocom/bb/trxcon/l1ctl_proto.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #include <osmocom/bb/trxcon/logging.h> #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/l1ctl.h> diff --git a/src/host/trxcon/src/sched_lchan_rach.c b/src/host/trxcon/src/sched_lchan_rach.c index 0e8d750..ffec1d0 100644 --- a/src/host/trxcon/src/sched_lchan_rach.c +++ b/src/host/trxcon/src/sched_lchan_rach.c @@ -31,8 +31,7 @@ #include <osmocom/coding/gsm0503_coding.h> #include <osmocom/bb/trxcon/l1ctl_proto.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #include <osmocom/bb/trxcon/logging.h> #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/l1ctl.h> diff --git a/src/host/trxcon/src/sched_lchan_sch.c b/src/host/trxcon/src/sched_lchan_sch.c index b9356eb..59f1691 100644 --- a/src/host/trxcon/src/sched_lchan_sch.c +++ b/src/host/trxcon/src/sched_lchan_sch.c @@ -32,8 +32,7 @@ #include <osmocom/coding/gsm0503_coding.h> #include <osmocom/bb/trxcon/l1ctl_proto.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #include <osmocom/bb/trxcon/logging.h> #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/l1ctl.h> diff --git a/src/host/trxcon/src/sched_lchan_tchf.c b/src/host/trxcon/src/sched_lchan_tchf.c index 0772e17..fe7370e 100644 --- a/src/host/trxcon/src/sched_lchan_tchf.c +++ b/src/host/trxcon/src/sched_lchan_tchf.c @@ -33,8 +33,7 @@ #include <osmocom/codec/codec.h> #include <osmocom/bb/trxcon/l1ctl_proto.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #include <osmocom/bb/trxcon/logging.h> #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/l1ctl.h> diff --git a/src/host/trxcon/src/sched_lchan_tchh.c b/src/host/trxcon/src/sched_lchan_tchh.c index ffeb6f8..706b74a 100644 --- a/src/host/trxcon/src/sched_lchan_tchh.c +++ b/src/host/trxcon/src/sched_lchan_tchh.c @@ -36,8 +36,7 @@ #include <osmocom/codec/codec.h> #include <osmocom/bb/trxcon/l1ctl_proto.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #include <osmocom/bb/trxcon/logging.h> #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/l1ctl.h> diff --git a/src/host/trxcon/src/sched_lchan_xcch.c b/src/host/trxcon/src/sched_lchan_xcch.c index 71eeae3..758f41f 100644 --- a/src/host/trxcon/src/sched_lchan_xcch.c +++ b/src/host/trxcon/src/sched_lchan_xcch.c @@ -31,8 +31,7 @@ #include <osmocom/coding/gsm0503_coding.h> #include <osmocom/bb/trxcon/l1ctl_proto.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #include <osmocom/bb/trxcon/logging.h> #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/l1ctl.h> diff --git a/src/host/trxcon/src/sched_mframe.c b/src/host/trxcon/src/sched_mframe.c index fb8840e..857755b 100644 --- a/src/host/trxcon/src/sched_mframe.c +++ b/src/host/trxcon/src/sched_mframe.c @@ -25,7 +25,7 @@ #include <osmocom/gsm/gsm_utils.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> /* Non-combined CCCH */ static const struct l1sched_tdma_frame frame_bcch[51] = { diff --git a/src/host/trxcon/src/sched_prim.c b/src/host/trxcon/src/sched_prim.c index 7cda9d7..64517f5 100644 --- a/src/host/trxcon/src/sched_prim.c +++ b/src/host/trxcon/src/sched_prim.c @@ -29,8 +29,7 @@ #include <osmocom/gsm/protocol/gsm_04_08.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/logging.h> diff --git a/src/host/trxcon/src/sched_trx.c b/src/host/trxcon/src/sched_trx.c index 04be66c..c34e2b7 100644 --- a/src/host/trxcon/src/sched_trx.c +++ b/src/host/trxcon/src/sched_trx.c @@ -32,8 +32,7 @@ #include <osmocom/core/linuxlist.h> #include <osmocom/bb/trxcon/l1ctl_proto.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/logging.h> diff --git a/src/host/trxcon/src/trx_if.c b/src/host/trxcon/src/trx_if.c index e223996..a251da0 100644 --- a/src/host/trxcon/src/trx_if.c +++ b/src/host/trxcon/src/trx_if.c @@ -43,7 +43,6 @@ #include <osmocom/bb/trxcon/trxcon.h> #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/logging.h> -#include <osmocom/bb/trxcon/scheduler.h> static struct value_string trx_evt_names[] = { { 0, NULL } /* no events? */ diff --git a/src/host/trxcon/src/trxcon.c b/src/host/trxcon/src/trxcon.c index b47e307..08050d3 100644 --- a/src/host/trxcon/src/trxcon.c +++ b/src/host/trxcon/src/trxcon.c @@ -45,8 +45,7 @@ #include <osmocom/bb/trxcon/l1ctl.h> #include <osmocom/bb/trxcon/l1ctl_link.h> #include <osmocom/bb/trxcon/l1ctl_proto.h> -#include <osmocom/bb/trxcon/scheduler.h> -#include <osmocom/bb/trxcon/sched_trx.h> +#include <osmocom/bb/trxcon/l1sched.h> #define COPYRIGHT \ "Copyright (C) 2016-2020 by Vadim Yanitskiy <axilirator(a)gmail.com>\n" \ -- To view, visit https://gerrit.osmocom.org/c/osmocom-bb/+/28547 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmocom-bb Gerrit-Branch: master Gerrit-Change-Id: Ide1e3ccdf32fdc255acc943e0c0936d15cf0c680 Gerrit-Change-Number: 28547 Gerrit-PatchSet: 3 Gerrit-Owner: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: laforge <laforge(a)osmocom.org> Gerrit-Reviewer: pespin <pespin(a)sysmocom.de> Gerrit-MessageType: merged

2 years, 11 months

Change in osmocom-bb[master]: trxcon: use 'l1sched_' prefix for scheduler API

by fixeria

fixeria has submitted this change. ( https://gerrit.osmocom.org/c/osmocom-bb/+/28546 ) Change subject: trxcon: use 'l1sched_' prefix for scheduler API ...................................................................... trxcon: use 'l1sched_' prefix for scheduler API Change-Id: I370aa5084a4e3eb94168b96df94dbbee606adaab Related: OS#5599, OS#3761 --- M src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h M src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h M src/host/trxcon/include/osmocom/bb/trxcon/trx_if.h M src/host/trxcon/src/l1ctl.c M src/host/trxcon/src/sched_clck.c M src/host/trxcon/src/sched_lchan_common.c M src/host/trxcon/src/sched_lchan_desc.c M src/host/trxcon/src/sched_lchan_pdtch.c M src/host/trxcon/src/sched_lchan_rach.c M src/host/trxcon/src/sched_lchan_sch.c M src/host/trxcon/src/sched_lchan_tchf.c M src/host/trxcon/src/sched_lchan_tchh.c M src/host/trxcon/src/sched_lchan_xcch.c M src/host/trxcon/src/sched_mframe.c M src/host/trxcon/src/sched_prim.c M src/host/trxcon/src/sched_trx.c M src/host/trxcon/src/trx_if.c M src/host/trxcon/src/trxcon.c 18 files changed, 563 insertions(+), 563 deletions(-) Approvals: Jenkins Builder: Verified pespin: Looks good to me, but someone else must approve laforge: Looks good to me, but someone else must approve fixeria: Looks good to me, approved diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h b/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h index 9a14844..c2649de 100644 --- a/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h +++ b/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h @@ -21,32 +21,32 @@ #define GPRS_L2_MAX_LEN 54 #define EDGE_L2_MAX_LEN 155 -#define TRX_CH_LID_DEDIC 0x00 -#define TRX_CH_LID_SACCH 0x40 +#define L1SCHED_CH_LID_DEDIC 0x00 +#define L1SCHED_CH_LID_SACCH 0x40 /* Osmocom-specific extension for PTCCH (see 3GPP TS 45.002, section 3.3.4.2). * Shall be used to distinguish PTCCH and PDTCH channels on a PDCH time-slot. */ -#define TRX_CH_LID_PTCCH 0x80 +#define L1SCHED_CH_LID_PTCCH 0x80 /* Is a channel related to PDCH (GPRS) */ -#define TRX_CH_FLAG_PDCH (1 << 0) +#define L1SCHED_CH_FLAG_PDCH (1 << 0) /* Should a channel be activated automatically */ -#define TRX_CH_FLAG_AUTO (1 << 1) +#define L1SCHED_CH_FLAG_AUTO (1 << 1) /* Is continuous burst transmission assumed */ -#define TRX_CH_FLAG_CBTX (1 << 2) +#define L1SCHED_CH_FLAG_CBTX (1 << 2) #define MAX_A5_KEY_LEN (128 / 8) #define TRX_TS_COUNT 8 /* Forward declaration to avoid mutual include */ -struct trx_lchan_state; -struct trx_meas_set; +struct l1sched_lchan_state; +struct l1sched_meas_set; struct trx_instance; -struct trx_ts; +struct l1sched_ts; -enum trx_burst_type { - TRX_BURST_GMSK, - TRX_BURST_8PSK, +enum l1sched_burst_type { + L1SCHED_BURST_GMSK, + L1SCHED_BURST_8PSK, }; /** @@ -98,7 +98,7 @@ }; /* Represents a burst to be transmitted */ -struct sched_burst_req { +struct l1sched_burst_req { uint32_t fn; uint8_t tn; uint8_t pwr; @@ -110,16 +110,16 @@ size_t burst_len; }; -typedef int trx_lchan_rx_func(struct trx_instance *trx, - struct trx_ts *ts, struct trx_lchan_state *lchan, - uint32_t fn, uint8_t bid, const sbit_t *bits, - const struct trx_meas_set *meas); +typedef int l1sched_lchan_rx_func(struct trx_instance *trx, + struct l1sched_ts *ts, struct l1sched_lchan_state *lchan, + uint32_t fn, uint8_t bid, const sbit_t *bits, + const struct l1sched_meas_set *meas); -typedef int trx_lchan_tx_func(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br); +typedef int l1sched_lchan_tx_func(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br); -struct trx_lchan_desc { +struct l1sched_lchan_desc { /*! Human-readable name */ const char *name; /*! Human-readable description */ @@ -140,12 +140,12 @@ uint8_t flags; /*! Function to call when burst received from PHY */ - trx_lchan_rx_func *rx_fn; + l1sched_lchan_rx_func *rx_fn; /*! Function to call when data received from L2 */ - trx_lchan_tx_func *tx_fn; + l1sched_lchan_tx_func *tx_fn; }; -struct trx_frame { +struct l1sched_tdma_frame { /*! Downlink channel (slot) type */ enum l1sched_lchan_type dl_chan; /*! Downlink block ID */ @@ -156,7 +156,7 @@ uint8_t ul_bid; }; -struct trx_multiframe { +struct l1sched_tdma_multiframe { /*! Channel combination */ enum gsm_phys_chan_config chan_config; /*! Human-readable name */ @@ -168,10 +168,10 @@ /*! Contains which lchans */ uint64_t lchan_mask; /*! Pointer to scheduling structure */ - const struct trx_frame *frames; + const struct l1sched_tdma_frame *frames; }; -struct trx_meas_set { +struct l1sched_meas_set { /*! TDMA frame number of the first burst this set belongs to */ uint32_t fn; /*! ToA256 (Timing of Arrival, 1/256 of a symbol) */ @@ -181,13 +181,13 @@ }; /* Simple ring buffer (up to 8 unique measurements) */ -struct trx_lchan_meas_hist { - struct trx_meas_set buf[8]; - struct trx_meas_set *head; +struct l1sched_lchan_meas_hist { + struct l1sched_meas_set buf[8]; + struct l1sched_meas_set *head; }; /* States each channel on a multiframe */ -struct trx_lchan_state { +struct l1sched_lchan_state { /*! Channel type */ enum l1sched_lchan_type type; /*! Channel status */ @@ -196,7 +196,7 @@ struct llist_head list; /*! Burst type: GMSK or 8PSK */ - enum trx_burst_type burst_type; + enum l1sched_burst_type burst_type; /*! Mask of received bursts */ uint8_t rx_burst_mask; /*! Mask of transmitted bursts */ @@ -207,7 +207,7 @@ ubit_t *tx_bursts; /*! A primitive being sent */ - struct trx_ts_prim *prim; + struct l1sched_ts_prim *prim; /*! Mode for TCH channels (see GSM48_CMODE_*) */ uint8_t tch_mode; @@ -218,9 +218,9 @@ uint8_t ul_facch_blocks; /*! Downlink measurements history */ - struct trx_lchan_meas_hist meas_hist; + struct l1sched_lchan_meas_hist meas_hist; /*! AVG measurements of the last received block */ - struct trx_meas_set meas_avg; + struct l1sched_meas_set meas_avg; /*! TDMA loss detection state */ struct { @@ -272,15 +272,15 @@ } a5; /* TS that this lchan belongs to */ - struct trx_ts *ts; + struct l1sched_ts *ts; }; -struct trx_ts { +struct l1sched_ts { /*! Timeslot index within a frame (0..7) */ uint8_t index; /*! Pointer to multiframe layout */ - const struct trx_multiframe *mf_layout; + const struct l1sched_tdma_multiframe *mf_layout; /*! Channel states for logical channels */ struct llist_head lchans; /*! Queue primitives for TX */ @@ -289,8 +289,8 @@ struct trx_instance *trx; }; -/* Represents one TX primitive in the queue of trx_ts */ -struct trx_ts_prim { +/* Represents one TX primitive in the queue of l1sched_ts */ +struct l1sched_ts_prim { /*! Link to queue of TS */ struct llist_head list; /*! Logical channel type */ @@ -301,115 +301,115 @@ uint8_t payload[0]; }; -extern const struct trx_lchan_desc trx_lchan_desc[_L1SCHED_CHAN_MAX]; -const struct trx_multiframe *sched_mframe_layout( +extern const struct l1sched_lchan_desc l1sched_lchan_desc[_L1SCHED_CHAN_MAX]; +const struct l1sched_tdma_multiframe *l1sched_mframe_layout( enum gsm_phys_chan_config config, int tn); /* Scheduler management functions */ -int sched_trx_init(struct trx_instance *trx, uint32_t fn_advance); -int sched_trx_reset(struct trx_instance *trx, bool reset_clock); -int sched_trx_shutdown(struct trx_instance *trx); +int l1sched_init(struct trx_instance *trx, uint32_t fn_advance); +int l1sched_reset(struct trx_instance *trx, bool reset_clock); +int l1sched_shutdown(struct trx_instance *trx); /* Timeslot management functions */ -struct trx_ts *sched_trx_add_ts(struct trx_instance *trx, int tn); -void sched_trx_del_ts(struct trx_instance *trx, int tn); -int sched_trx_reset_ts(struct trx_instance *trx, int tn); -int sched_trx_configure_ts(struct trx_instance *trx, int tn, +struct l1sched_ts *l1sched_add_ts(struct trx_instance *trx, int tn); +void l1sched_del_ts(struct trx_instance *trx, int tn); +int l1sched_reset_ts(struct trx_instance *trx, int tn); +int l1sched_configure_ts(struct trx_instance *trx, int tn, enum gsm_phys_chan_config config); -int sched_trx_start_ciphering(struct trx_ts *ts, uint8_t algo, +int l1sched_start_ciphering(struct l1sched_ts *ts, uint8_t algo, uint8_t *key, uint8_t key_len); /* Logical channel management functions */ -enum gsm_phys_chan_config sched_trx_chan_nr2pchan_config(uint8_t chan_nr); -enum l1sched_lchan_type sched_trx_chan_nr2lchan_type(uint8_t chan_nr, +enum gsm_phys_chan_config l1sched_chan_nr2pchan_config(uint8_t chan_nr); +enum l1sched_lchan_type l1sched_chan_nr2lchan_type(uint8_t chan_nr, uint8_t link_id); -void sched_trx_deactivate_all_lchans(struct trx_ts *ts); -int sched_trx_set_lchans(struct trx_ts *ts, uint8_t chan_nr, int active, uint8_t tch_mode); -int sched_trx_activate_lchan(struct trx_ts *ts, enum l1sched_lchan_type chan); -int sched_trx_deactivate_lchan(struct trx_ts *ts, enum l1sched_lchan_type chan); -struct trx_lchan_state *sched_trx_find_lchan(struct trx_ts *ts, +void l1sched_deactivate_all_lchans(struct l1sched_ts *ts); +int l1sched_set_lchans(struct l1sched_ts *ts, uint8_t chan_nr, int active, uint8_t tch_mode); +int l1sched_activate_lchan(struct l1sched_ts *ts, enum l1sched_lchan_type chan); +int l1sched_deactivate_lchan(struct l1sched_ts *ts, enum l1sched_lchan_type chan); +struct l1sched_lchan_state *l1sched_find_lchan(struct l1sched_ts *ts, enum l1sched_lchan_type chan); /* Primitive management functions */ -int sched_prim_init(void *ctx, struct trx_ts_prim **prim, +int l1sched_prim_init(void *ctx, struct l1sched_ts_prim **prim, size_t pl_len, uint8_t chan_nr, uint8_t link_id); -int sched_prim_push(struct trx_instance *trx, - struct trx_ts_prim *prim, uint8_t chan_nr); +int l1sched_prim_push(struct trx_instance *trx, + struct l1sched_ts_prim *prim, uint8_t chan_nr); -#define TCH_MODE_IS_SPEECH(mode) \ +#define L1SCHED_TCH_MODE_IS_SPEECH(mode) \ (mode == GSM48_CMODE_SPEECH_V1 \ || mode == GSM48_CMODE_SPEECH_EFR \ || mode == GSM48_CMODE_SPEECH_AMR) -#define TCH_MODE_IS_DATA(mode) \ +#define L1SCHED_TCH_MODE_IS_DATA(mode) \ (mode == GSM48_CMODE_DATA_14k5 \ || mode == GSM48_CMODE_DATA_12k0 \ || mode == GSM48_CMODE_DATA_6k0 \ || mode == GSM48_CMODE_DATA_3k6) -#define CHAN_IS_TCH(chan) \ +#define L1SCHED_CHAN_IS_TCH(chan) \ (chan == L1SCHED_TCHF || chan == L1SCHED_TCHH_0 || chan == L1SCHED_TCHH_1) -#define CHAN_IS_SACCH(chan) \ - (trx_lchan_desc[chan].link_id & TRX_CH_LID_SACCH) +#define L1SCHED_CHAN_IS_SACCH(chan) \ + (l1sched_lchan_desc[chan].link_id & L1SCHED_CH_LID_SACCH) /* FIXME: we need a better way to identify / distinguish primitives */ -#define PRIM_IS_RACH11(prim) \ +#define L1SCHED_PRIM_IS_RACH11(prim) \ (prim->payload_len == sizeof(struct l1ctl_ext_rach_req)) -#define PRIM_IS_RACH8(prim) \ +#define L1SCHED_PRIM_IS_RACH8(prim) \ (prim->payload_len == sizeof(struct l1ctl_rach_req)) -#define PRIM_IS_RACH(prim) \ - (PRIM_IS_RACH8(prim) || PRIM_IS_RACH11(prim)) +#define L1SCHED_PRIM_IS_RACH(prim) \ + (L1SCHED_PRIM_IS_RACH8(prim) || L1SCHED_PRIM_IS_RACH11(prim)) -#define PRIM_IS_TCH(prim) \ - (CHAN_IS_TCH(prim->chan) && prim->payload_len != GSM_MACBLOCK_LEN) +#define L1SCHED_PRIM_IS_TCH(prim) \ + (L1SCHED_CHAN_IS_TCH(prim->chan) && prim->payload_len != GSM_MACBLOCK_LEN) -#define PRIM_IS_FACCH(prim) \ - (CHAN_IS_TCH(prim->chan) && prim->payload_len == GSM_MACBLOCK_LEN) +#define L1SCHED_PRIM_IS_FACCH(prim) \ + (L1SCHED_CHAN_IS_TCH(prim->chan) && prim->payload_len == GSM_MACBLOCK_LEN) -struct trx_ts_prim *sched_prim_dequeue(struct llist_head *queue, - uint32_t fn, struct trx_lchan_state *lchan); -int sched_prim_dummy(struct trx_lchan_state *lchan); -void sched_prim_drop(struct trx_lchan_state *lchan); -void sched_prim_flush_queue(struct llist_head *list); +struct l1sched_ts_prim *l1sched_prim_dequeue(struct llist_head *queue, + uint32_t fn, struct l1sched_lchan_state *lchan); +int l1sched_prim_dummy(struct l1sched_lchan_state *lchan); +void l1sched_prim_drop(struct l1sched_lchan_state *lchan); +void l1sched_prim_flush_queue(struct llist_head *list); -int sched_trx_handle_rx_burst(struct trx_instance *trx, uint8_t tn, +int l1sched_handle_rx_burst(struct trx_instance *trx, uint8_t tn, uint32_t fn, sbit_t *bits, uint16_t nbits, - const struct trx_meas_set *meas); + const struct l1sched_meas_set *meas); /* Shared declarations for lchan handlers */ -extern const uint8_t sched_nb_training_bits[8][26]; +extern const uint8_t l1sched_nb_training_bits[8][26]; -const char *burst_mask2str(const uint8_t *mask, int bits); -size_t sched_bad_frame_ind(uint8_t *l2, struct trx_lchan_state *lchan); -int sched_send_dt_ind(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint8_t *l2, size_t l2_len, +const char *l1sched_burst_mask2str(const uint8_t *mask, int bits); +size_t l1sched_bad_frame_ind(uint8_t *l2, struct l1sched_lchan_state *lchan); +int l1sched_send_dt_ind(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint8_t *l2, size_t l2_len, int bit_error_count, bool dec_failed, bool traffic); -int sched_send_dt_conf(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, bool traffic); -int sched_gsmtap_send(enum l1sched_lchan_type lchan_type, uint32_t fn, uint8_t tn, +int l1sched_send_dt_conf(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, bool traffic); +int l1sched_gsmtap_send(enum l1sched_lchan_type lchan_type, uint32_t fn, uint8_t tn, uint16_t band_arfcn, int8_t signal_dbm, uint8_t snr, const uint8_t *data, size_t data_len); /* Interleaved TCH/H block TDMA frame mapping */ -uint32_t sched_tchh_block_dl_first_fn(enum l1sched_lchan_type chan, +uint32_t l1sched_tchh_block_dl_first_fn(enum l1sched_lchan_type chan, uint32_t last_fn, bool facch); -bool sched_tchh_block_map_fn(enum l1sched_lchan_type chan, +bool l1sched_tchh_block_map_fn(enum l1sched_lchan_type chan, uint32_t fn, bool ul, bool facch, bool start); -#define sched_tchh_traffic_start(chan, fn, ul) \ - sched_tchh_block_map_fn(chan, fn, ul, 0, 1) -#define sched_tchh_traffic_end(chan, fn, ul) \ - sched_tchh_block_map_fn(chan, fn, ul, 0, 0) +#define l1sched_tchh_traffic_start(chan, fn, ul) \ + l1sched_tchh_block_map_fn(chan, fn, ul, 0, 1) +#define l1sched_tchh_traffic_end(chan, fn, ul) \ + l1sched_tchh_block_map_fn(chan, fn, ul, 0, 0) -#define sched_tchh_facch_start(chan, fn, ul) \ - sched_tchh_block_map_fn(chan, fn, ul, 1, 1) -#define sched_tchh_facch_end(chan, fn, ul) \ - sched_tchh_block_map_fn(chan, fn, ul, 1, 0) +#define l1sched_tchh_facch_start(chan, fn, ul) \ + l1sched_tchh_block_map_fn(chan, fn, ul, 1, 1) +#define l1sched_tchh_facch_end(chan, fn, ul) \ + l1sched_tchh_block_map_fn(chan, fn, ul, 1, 0) /* Measurement history */ -void sched_trx_meas_push(struct trx_lchan_state *lchan, const struct trx_meas_set *meas); -void sched_trx_meas_avg(struct trx_lchan_state *lchan, unsigned int n); +void l1sched_lchan_meas_push(struct l1sched_lchan_state *lchan, const struct l1sched_meas_set *meas); +void l1sched_lchan_meas_avg(struct l1sched_lchan_state *lchan, unsigned int n); diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h b/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h index a7e3fd9..7e6b092 100644 --- a/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h +++ b/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h @@ -6,18 +6,18 @@ #include <osmocom/core/timer.h> #include <osmocom/gsm/gsm0502.h> -enum tdma_sched_clck_state { - SCH_CLCK_STATE_WAIT, - SCH_CLCK_STATE_OK, +enum l1sched_clck_state { + L1SCHED_CLCK_ST_WAIT, + L1SCHED_CLCK_ST_OK, }; /* Forward structure declaration */ -struct trx_sched; +struct l1sched_state; /*! One scheduler instance */ -struct trx_sched { +struct l1sched_state { /*! Clock state */ - enum tdma_sched_clck_state state; + enum l1sched_clck_state state; /*! Local clock source */ struct timespec clock; /*! Count of processed frames */ @@ -29,10 +29,10 @@ /*! Frame callback timer */ struct osmo_timer_list clock_timer; /*! Frame callback */ - void (*clock_cb)(struct trx_sched *sched); + void (*clock_cb)(struct l1sched_state *sched); /*! Private data (e.g. pointer to trx instance) */ void *data; }; -int sched_clck_handle(struct trx_sched *sched, uint32_t fn); -void sched_clck_reset(struct trx_sched *sched); +int l1sched_clck_handle(struct l1sched_state *sched, uint32_t fn); +void l1sched_clck_reset(struct l1sched_state *sched); diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/trx_if.h b/src/host/trxcon/include/osmocom/bb/trxcon/trx_if.h index 89c7dd0..511101a 100644 --- a/src/host/trxcon/include/osmocom/bb/trxcon/trx_if.h +++ b/src/host/trxcon/include/osmocom/bb/trxcon/trx_if.h @@ -43,8 +43,8 @@ int8_t ta; /* Scheduler stuff */ - struct trx_sched sched; - struct trx_ts *ts_list[TRX_TS_COUNT]; + struct l1sched_state sched; + struct l1sched_ts *ts_list[TRX_TS_COUNT]; /* Bind L1CTL link */ struct l1ctl_link *l1l; @@ -80,4 +80,4 @@ uint16_t band_arfcn_start, uint16_t band_arfcn_stop); int trx_if_tx_burst(struct trx_instance *trx, - const struct sched_burst_req *br); + const struct l1sched_burst_req *br); diff --git a/src/host/trxcon/src/l1ctl.c b/src/host/trxcon/src/l1ctl.c index ca78e9b..20bd646 100644 --- a/src/host/trxcon/src/l1ctl.c +++ b/src/host/trxcon/src/l1ctl.c @@ -340,10 +340,10 @@ band_arfcn &~ ARFCN_FLAG_MASK); /* Reset scheduler and clock counter */ - sched_trx_reset(l1l->trx, true); + l1sched_reset(l1l->trx, true); /* Configure a single timeslot */ - sched_trx_configure_ts(l1l->trx, 0, ch_config); + l1sched_configure_ts(l1l->trx, 0, ch_config); /* Ask SCH handler to send L1CTL_FBSB_CONF */ l1l->fbsb_conf_sent = false; @@ -430,7 +430,7 @@ /* Fall through */ case L1CTL_RES_T_SCHED: - sched_trx_reset(l1l->trx, true); + l1sched_reset(l1l->trx, true); break; default: LOGP(DL1C, LOGL_ERROR, "Unknown L1CTL_RESET_REQ type\n"); @@ -464,7 +464,7 @@ { enum gsm_phys_chan_config ch_config; struct l1ctl_ccch_mode_req *req; - struct trx_ts *ts; + struct l1sched_ts *ts; int rc = 0; req = (struct l1ctl_ccch_mode_req *) msg->l1h; @@ -491,7 +491,7 @@ /* Do nothing if the current mode matches required */ if (ts->mf_layout->chan_config != ch_config) - rc = sched_trx_configure_ts(l1l->trx, 0, ch_config); + rc = l1sched_configure_ts(l1l->trx, 0, ch_config); /* Confirm reconfiguration */ if (!rc) @@ -507,7 +507,7 @@ struct l1ctl_ext_rach_req *ext_req; struct l1ctl_rach_req *req; struct l1ctl_info_ul *ul; - struct trx_ts_prim *prim; + struct l1sched_ts_prim *prim; size_t len; int rc; @@ -541,7 +541,7 @@ } /* Init a new primitive */ - rc = sched_prim_init(l1l->trx, &prim, len, ul->chan_nr, ul->link_id); + rc = l1sched_prim_init(l1l->trx, &prim, len, ul->chan_nr, ul->link_id); if (rc) goto exit; @@ -549,7 +549,7 @@ * Push this primitive to the transmit queue. * Indicated timeslot needs to be configured. */ - rc = sched_prim_push(l1l->trx, prim, ul->chan_nr); + rc = l1sched_prim_push(l1l->trx, prim, ul->chan_nr); if (rc) { talloc_free(prim); goto exit; @@ -628,7 +628,7 @@ enum gsm_phys_chan_config config; struct l1ctl_dm_est_req *est_req; struct l1ctl_info_ul *ul; - struct trx_ts *ts; + struct l1sched_ts *ts; uint8_t chan_nr, tn; int rc; @@ -643,7 +643,7 @@ tn, chan_nr, est_req->tsc, est_req->tch_mode); /* Determine channel config */ - config = sched_trx_chan_nr2pchan_config(chan_nr); + config = l1sched_chan_nr2pchan_config(chan_nr); if (config == GSM_PCHAN_NONE) { LOGP(DL1C, LOGL_ERROR, "Couldn't determine channel config\n"); rc = -EINVAL; @@ -662,7 +662,7 @@ l1l->trx->tsc = est_req->tsc; /* Configure requested TS */ - rc = sched_trx_configure_ts(l1l->trx, tn, config); + rc = l1sched_configure_ts(l1l->trx, tn, config); ts = l1l->trx->ts_list[tn]; if (rc) { rc = -EINVAL; @@ -670,10 +670,10 @@ } /* Deactivate all lchans */ - sched_trx_deactivate_all_lchans(ts); + l1sched_deactivate_all_lchans(ts); /* Activate only requested lchans */ - rc = sched_trx_set_lchans(ts, chan_nr, 1, est_req->tch_mode); + rc = l1sched_set_lchans(ts, chan_nr, 1, est_req->tch_mode); if (rc) { LOGP(DL1C, LOGL_ERROR, "Couldn't activate requested lchans\n"); rc = -EINVAL; @@ -690,7 +690,7 @@ LOGP(DL1C, LOGL_NOTICE, "Received L1CTL_DM_REL_REQ, resetting scheduler\n"); /* Reset scheduler */ - sched_trx_reset(l1l->trx, false); + l1sched_reset(l1l->trx, false); msgb_free(msg); return 0; @@ -703,7 +703,7 @@ struct msgb *msg, bool traffic) { struct l1ctl_info_ul *ul; - struct trx_ts_prim *prim; + struct l1sched_ts_prim *prim; uint8_t chan_nr, link_id; size_t payload_len; int rc; @@ -724,13 +724,13 @@ chan_nr, link_id, payload_len); /* Init a new primitive */ - rc = sched_prim_init(l1l->trx, &prim, payload_len, + rc = l1sched_prim_init(l1l->trx, &prim, payload_len, chan_nr, link_id); if (rc) goto exit; /* Push this primitive to transmit queue */ - rc = sched_prim_push(l1l->trx, prim, chan_nr); + rc = l1sched_prim_push(l1l->trx, prim, chan_nr); if (rc) { talloc_free(prim); goto exit; @@ -770,8 +770,8 @@ static int l1ctl_rx_tch_mode_req(struct l1ctl_link *l1l, struct msgb *msg) { struct l1ctl_tch_mode_req *req; - struct trx_lchan_state *lchan; - struct trx_ts *ts; + struct l1sched_lchan_state *lchan; + struct l1sched_ts *ts; int i; req = (struct l1ctl_tch_mode_req *) msg->l1h; @@ -814,7 +814,7 @@ { struct l1ctl_crypto_req *req; struct l1ctl_info_ul *ul; - struct trx_ts *ts; + struct l1sched_ts *ts; uint8_t tn; int rc = 0; @@ -836,7 +836,7 @@ } /* Poke scheduler */ - rc = sched_trx_start_ciphering(ts, req->algo, req->key, req->key_len); + rc = l1sched_start_ciphering(ts, req->algo, req->key, req->key_len); if (rc) { LOGP(DL1C, LOGL_ERROR, "Couldn't configure ciphering\n"); rc = -EINVAL; diff --git a/src/host/trxcon/src/sched_clck.c b/src/host/trxcon/src/sched_clck.c index 1e962aa..b7bb88d 100644 --- a/src/host/trxcon/src/sched_clck.c +++ b/src/host/trxcon/src/sched_clck.c @@ -45,9 +45,9 @@ #define MAX_FN_SKEW 50 #define TRX_LOSS_FRAMES 400 -static void sched_clck_tick(void *data) +static void l1sched_clck_tick(void *data) { - struct trx_sched *sched = (struct trx_sched *) data; + struct l1sched_state *sched = (struct l1sched_state *) data; struct timespec tv_now, *tv_clock, elapsed; int64_t elapsed_us; const struct timespec frame_duration = { .tv_sec = 0, .tv_nsec = GSM_TDMA_FN_DURATION_nS }; @@ -55,7 +55,7 @@ /* Check if transceiver is still alive */ if (sched->fn_counter_lost++ == TRX_LOSS_FRAMES) { LOGP(DSCH, LOGL_DEBUG, "No more clock from transceiver\n"); - sched->state = SCH_CLCK_STATE_WAIT; + sched->state = L1SCHED_CLCK_ST_WAIT; return; } @@ -72,7 +72,7 @@ LOGP(DSCH, LOGL_NOTICE, "PC clock skew: " "elapsed uS %" PRId64 "\n", elapsed_us); - sched->state = SCH_CLCK_STATE_WAIT; + sched->state = L1SCHED_CLCK_ST_WAIT; return; } @@ -93,7 +93,7 @@ GSM_TDMA_FN_DURATION_uS - elapsed_us); } -static void sched_clck_correct(struct trx_sched *sched, +static void l1sched_clck_correct(struct l1sched_state *sched, struct timespec *tv_now, uint32_t fn) { sched->fn_counter_proc = fn; @@ -106,12 +106,12 @@ sched->clock = *tv_now; memset(&sched->clock_timer, 0, sizeof(sched->clock_timer)); - sched->clock_timer.cb = sched_clck_tick; + sched->clock_timer.cb = l1sched_clck_tick; sched->clock_timer.data = sched; osmo_timer_schedule(&sched->clock_timer, 0, GSM_TDMA_FN_DURATION_uS); } -int sched_clck_handle(struct trx_sched *sched, uint32_t fn) +int l1sched_clck_handle(struct l1sched_state *sched, uint32_t fn) { struct timespec tv_now, *tv_clock, elapsed; int64_t elapsed_us, elapsed_fn; @@ -124,11 +124,11 @@ tv_clock = &sched->clock; /* If this is the first CLCK IND */ - if (sched->state == SCH_CLCK_STATE_WAIT) { - sched_clck_correct(sched, &tv_now, fn); + if (sched->state == L1SCHED_CLCK_ST_WAIT) { + l1sched_clck_correct(sched, &tv_now, fn); LOGP(DSCH, LOGL_DEBUG, "Initial clock received: fn=%u\n", fn); - sched->state = SCH_CLCK_STATE_OK; + sched->state = L1SCHED_CLCK_ST_OK; return 0; } @@ -150,7 +150,7 @@ LOGP(DSCH, LOGL_NOTICE, "GSM clock skew: old fn=%u, " "new fn=%u\n", sched->fn_counter_proc, fn); - sched_clck_correct(sched, &tv_now, fn); + l1sched_clck_correct(sched, &tv_now, fn); return 0; } @@ -192,10 +192,10 @@ return 0; } -void sched_clck_reset(struct trx_sched *sched) +void l1sched_clck_reset(struct l1sched_state *sched) { /* Reset internal state */ - sched->state = SCH_CLCK_STATE_WAIT; + sched->state = L1SCHED_CLCK_ST_WAIT; /* Stop clock timer */ osmo_timer_del(&sched->clock_timer); diff --git a/src/host/trxcon/src/sched_lchan_common.c b/src/host/trxcon/src/sched_lchan_common.c index e0d0091..600977c 100644 --- a/src/host/trxcon/src/sched_lchan_common.c +++ b/src/host/trxcon/src/sched_lchan_common.c @@ -45,7 +45,7 @@ #include <osmocom/bb/trxcon/l1ctl.h> /* GSM 05.02 Chapter 5.2.3 Normal Burst (NB) */ -const uint8_t sched_nb_training_bits[8][26] = { +const uint8_t l1sched_nb_training_bits[8][26] = { { 0, 0, 1, 0, 0, 1, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 1, 1, 1, @@ -84,7 +84,7 @@ * Examples: " ****.." (incomplete, 4/6 bursts) * " ****" (complete, all 4 bursts) * "**.***.." (incomplete, 5/8 bursts) */ -const char *burst_mask2str(const uint8_t *mask, int bits) +const char *l1sched_burst_mask2str(const uint8_t *mask, int bits) { /* TODO: CSD is interleaved over 22 bursts, so the mask needs to be extended */ static char buf[8 + 1]; @@ -99,11 +99,11 @@ return buf; } -int sched_gsmtap_send(enum l1sched_lchan_type lchan_type, uint32_t fn, uint8_t tn, +int l1sched_gsmtap_send(enum l1sched_lchan_type lchan_type, uint32_t fn, uint8_t tn, uint16_t band_arfcn, int8_t signal_dbm, uint8_t snr, const uint8_t *data, size_t data_len) { - const struct trx_lchan_desc *lchan_desc = &trx_lchan_desc[lchan_type]; + const struct l1sched_lchan_desc *lchan_desc = &l1sched_lchan_desc[lchan_type]; /* GSMTAP logging may not be enabled */ if (gsmtap == NULL) @@ -118,16 +118,16 @@ lchan_desc->ss_nr, fn, signal_dbm, snr, data, data_len); } -int sched_send_dt_ind(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint8_t *l2, size_t l2_len, +int l1sched_send_dt_ind(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint8_t *l2, size_t l2_len, int bit_error_count, bool dec_failed, bool traffic) { - const struct trx_meas_set *meas = &lchan->meas_avg; - const struct trx_lchan_desc *lchan_desc; + const struct l1sched_meas_set *meas = &lchan->meas_avg; + const struct l1sched_lchan_desc *lchan_desc; struct l1ctl_info_dl dl_hdr; /* Set up pointers */ - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; /* Fill in known downlink info */ dl_hdr.chan_nr = lchan_desc->chan_nr | ts->index; @@ -135,7 +135,7 @@ dl_hdr.band_arfcn = htons(trx->band_arfcn); dl_hdr.num_biterr = bit_error_count; - /* sched_trx_meas_avg() gives us TDMA frame number of the first burst */ + /* l1sched_lchan_meas_avg() gives us TDMA frame number of the first burst */ dl_hdr.frame_nr = htonl(meas->fn); /* RX level: 0 .. 63 in typical GSM notation (dBm + 110) */ @@ -152,21 +152,21 @@ /* Optional GSMTAP logging */ if (l2_len > 0 && (!traffic || lchan_desc->chan_nr == RSL_CHAN_OSMO_PDCH)) { - sched_gsmtap_send(lchan->type, meas->fn, ts->index, + l1sched_gsmtap_send(lchan->type, meas->fn, ts->index, trx->band_arfcn, meas->rssi, 0, l2, l2_len); } return 0; } -int sched_send_dt_conf(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, bool traffic) +int l1sched_send_dt_conf(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, bool traffic) { - const struct trx_lchan_desc *lchan_desc; + const struct l1sched_lchan_desc *lchan_desc; struct l1ctl_info_dl dl_hdr; /* Set up pointers */ - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; /* Zero-initialize DL header, because we don't set all fields */ memset(&dl_hdr, 0x00, sizeof(struct l1ctl_info_dl)); @@ -181,7 +181,7 @@ /* Optional GSMTAP logging */ if (!traffic || lchan_desc->chan_nr == RSL_CHAN_OSMO_PDCH) { - sched_gsmtap_send(lchan->type, fn, ts->index, + l1sched_gsmtap_send(lchan->type, fn, ts->index, trx->band_arfcn | ARFCN_UPLINK, 0, 0, lchan->prim->payload, lchan->prim->payload_len); @@ -198,7 +198,7 @@ * @param lchan Logical channel to generate BFI for * @return How much bytes were written */ -size_t sched_bad_frame_ind(uint8_t *l2, struct trx_lchan_state *lchan) +size_t l1sched_bad_frame_ind(uint8_t *l2, struct l1sched_lchan_state *lchan) { switch (lchan->tch_mode) { case GSM48_CMODE_SPEECH_V1: diff --git a/src/host/trxcon/src/sched_lchan_desc.c b/src/host/trxcon/src/sched_lchan_desc.c index 95fd3c3..0ec4d84 100644 --- a/src/host/trxcon/src/sched_lchan_desc.c +++ b/src/host/trxcon/src/sched_lchan_desc.c @@ -29,47 +29,47 @@ #include <osmocom/bb/trxcon/sched_trx.h> /* Forward declaration of handlers */ -int rx_data_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, uint8_t bid, - const sbit_t *bits, const struct trx_meas_set *meas); +int rx_data_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, uint8_t bid, + const sbit_t *bits, const struct l1sched_meas_set *meas); -int tx_data_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br); +int tx_data_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br); -int rx_sch_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, uint8_t bid, - const sbit_t *bits, const struct trx_meas_set *meas); +int rx_sch_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, uint8_t bid, + const sbit_t *bits, const struct l1sched_meas_set *meas); -int tx_rach_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br); +int tx_rach_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br); -int rx_tchf_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, uint8_t bid, - const sbit_t *bits, const struct trx_meas_set *meas); +int rx_tchf_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, uint8_t bid, + const sbit_t *bits, const struct l1sched_meas_set *meas); -int tx_tchf_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br); +int tx_tchf_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br); -int rx_tchh_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, uint8_t bid, - const sbit_t *bits, const struct trx_meas_set *meas); +int rx_tchh_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, uint8_t bid, + const sbit_t *bits, const struct l1sched_meas_set *meas); -int tx_tchh_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br); +int tx_tchh_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br); -int rx_pdtch_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, uint8_t bid, - const sbit_t *bits, const struct trx_meas_set *meas); +int rx_pdtch_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, uint8_t bid, + const sbit_t *bits, const struct l1sched_meas_set *meas); -int tx_pdtch_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br); +int tx_pdtch_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br); -const struct trx_lchan_desc trx_lchan_desc[_L1SCHED_CHAN_MAX] = { +const struct l1sched_lchan_desc l1sched_lchan_desc[_L1SCHED_CHAN_MAX] = { [L1SCHED_IDLE] = { .name = "IDLE", .desc = "Idle channel", @@ -87,7 +87,7 @@ /* 3GPP TS 05.03, section 4.7. Handled by transceiver, * however we still need to parse BSIC (BCC / NCC). */ - .flags = TRX_CH_FLAG_AUTO, + .flags = L1SCHED_CH_FLAG_AUTO, .rx_fn = rx_sch_fn, }, [L1SCHED_BCCH] = { @@ -100,7 +100,7 @@ * regular interleaving (3GPP TS 05.02, clause 7, table 3): * a L2 frame is interleaved over 4 consecutive bursts. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_AUTO, + .flags = L1SCHED_CH_FLAG_AUTO, .rx_fn = rx_data_fn, }, [L1SCHED_RACH] = { @@ -110,7 +110,7 @@ .chan_nr = RSL_CHAN_RACH, /* Tx only, RACH convolutional coding (3GPP TS 05.03, section 4.6). */ - .flags = TRX_CH_FLAG_AUTO, + .flags = L1SCHED_CH_FLAG_AUTO, .tx_fn = tx_rach_fn, }, [L1SCHED_CCCH] = { @@ -123,7 +123,7 @@ * regular interleaving (3GPP TS 05.02, clause 7, table 3): * a L2 frame is interleaved over 4 consecutive bursts. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_AUTO, + .flags = L1SCHED_CH_FLAG_AUTO, .rx_fn = rx_data_fn, }, [L1SCHED_TCHF] = { @@ -131,7 +131,7 @@ .desc = "Full Rate traffic channel", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_F, .chan_nr = RSL_CHAN_Bm_ACCHs, - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, /* Rx and Tx, multiple convolutional coding types (3GPP TS 05.03, * chapter 3), block diagonal interleaving (3GPP TS 05.02, clause 7): @@ -145,7 +145,7 @@ * The MS shall continuously transmit bursts, even if there is nothing * to send, unless DTX (Discontinuous Transmission) is used. */ .burst_buf_size = 8 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_tchf_fn, .tx_fn = tx_tchf_fn, }, @@ -154,7 +154,7 @@ .desc = "Half Rate traffic channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_H, .chan_nr = RSL_CHAN_Lm_ACCHs + (0 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 0, /* Rx and Tx, multiple convolutional coding types (3GPP TS 05.03, @@ -174,7 +174,7 @@ * The MS shall continuously transmit bursts, even if there is nothing * to send, unless DTX (Discontinuous Transmission) is used. */ .burst_buf_size = 6 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_tchh_fn, .tx_fn = tx_tchh_fn, }, @@ -183,12 +183,12 @@ .desc = "Half Rate traffic channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_H, .chan_nr = RSL_CHAN_Lm_ACCHs + (1 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 1, /* Same as for L1SCHED_TCHH_0, see above. */ .burst_buf_size = 6 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_tchh_fn, .tx_fn = tx_tchh_fn, }, @@ -197,12 +197,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4, .chan_nr = RSL_CHAN_SDCCH4_ACCH + (0 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 0, /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -211,12 +211,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4, .chan_nr = RSL_CHAN_SDCCH4_ACCH + (1 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 1, /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -225,12 +225,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 2)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4, .chan_nr = RSL_CHAN_SDCCH4_ACCH + (2 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 2, /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -239,12 +239,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 3)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4, .chan_nr = RSL_CHAN_SDCCH4_ACCH + (3 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 3, /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -253,12 +253,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (0 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 0, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -267,12 +267,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (1 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 1, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -281,12 +281,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 2)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (2 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 2, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -295,12 +295,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 3)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (3 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 3, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -309,12 +309,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 4)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (4 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 4, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -323,12 +323,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 5)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (5 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 5, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -337,12 +337,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 6)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (6 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 6, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -351,12 +351,12 @@ .desc = "Stand-alone dedicated control channel (sub-channel 7)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (7 << 3), - .link_id = TRX_CH_LID_DEDIC, + .link_id = L1SCHED_CH_LID_DEDIC, .ss_nr = 7, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -365,11 +365,11 @@ .desc = "Slow TCH/F associated control channel", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_F | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_Bm_ACCHs, - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -378,12 +378,12 @@ .desc = "Slow TCH/H associated control channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_H | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_Lm_ACCHs + (0 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 0, /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -392,12 +392,12 @@ .desc = "Slow TCH/H associated control channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_H | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_Lm_ACCHs + (1 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 1, /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -406,12 +406,12 @@ .desc = "Slow SDCCH/4 associated control channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH4_ACCH + (0 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 0, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -420,12 +420,12 @@ .desc = "Slow SDCCH/4 associated control channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH4_ACCH + (1 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 1, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -434,12 +434,12 @@ .desc = "Slow SDCCH/4 associated control channel (sub-channel 2)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH4_ACCH + (2 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 2, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -448,12 +448,12 @@ .desc = "Slow SDCCH/4 associated control channel (sub-channel 3)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH4_ACCH + (3 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 3, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -462,12 +462,12 @@ .desc = "Slow SDCCH/8 associated control channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (0 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 0, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -476,12 +476,12 @@ .desc = "Slow SDCCH/8 associated control channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (1 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 1, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -490,12 +490,12 @@ .desc = "Slow SDCCH/8 associated control channel (sub-channel 2)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (2 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 2, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -504,12 +504,12 @@ .desc = "Slow SDCCH/8 associated control channel (sub-channel 3)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (3 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 3, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -518,12 +518,12 @@ .desc = "Slow SDCCH/8 associated control channel (sub-channel 4)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (4 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 4, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -532,12 +532,12 @@ .desc = "Slow SDCCH/8 associated control channel (sub-channel 5)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (5 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 5, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -546,12 +546,12 @@ .desc = "Slow SDCCH/8 associated control channel (sub-channel 6)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (6 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 6, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -560,12 +560,12 @@ .desc = "Slow SDCCH/8 associated control channel (sub-channel 7)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_SDCCH8_ACCH + (7 << 3), - .link_id = TRX_CH_LID_SACCH, + .link_id = L1SCHED_CH_LID_SACCH, .ss_nr = 7, /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_CBTX, + .flags = L1SCHED_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, @@ -580,7 +580,7 @@ * NOTE: the burst buffer is three times bigger because the * payload of EDGE bursts is three times longer. */ .burst_buf_size = 3 * 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_PDCH, + .flags = L1SCHED_CH_FLAG_PDCH, .rx_fn = rx_pdtch_fn, .tx_fn = tx_pdtch_fn, }, @@ -589,7 +589,7 @@ .desc = "Packet Timing advance control channel", .gsmtap_chan_type = GSMTAP_CHANNEL_PTCCH, .chan_nr = RSL_CHAN_OSMO_PDCH, - .link_id = TRX_CH_LID_PTCCH, + .link_id = L1SCHED_CH_LID_PTCCH, /* On the Uplink, mobile stations transmit random Access Bursts * to allow estimation of the timing advance for one MS in packet @@ -597,7 +597,7 @@ * updates for several mobile stations. The coding scheme used * for PTCCH/D messages is the same as for PDTCH CS-1. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_PDCH, + .flags = L1SCHED_CH_FLAG_PDCH, .rx_fn = rx_pdtch_fn, .tx_fn = tx_rach_fn, }, @@ -610,7 +610,7 @@ /* Same as for L1SCHED_BCCH (xCCH), but Rx only. See above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, - .flags = TRX_CH_FLAG_AUTO, + .flags = L1SCHED_CH_FLAG_AUTO, .rx_fn = rx_data_fn, }, [L1SCHED_SDCCH8_CBCH] = { diff --git a/src/host/trxcon/src/sched_lchan_pdtch.c b/src/host/trxcon/src/sched_lchan_pdtch.c index 3dabc6b..d3486b9 100644 --- a/src/host/trxcon/src/sched_lchan_pdtch.c +++ b/src/host/trxcon/src/sched_lchan_pdtch.c @@ -37,18 +37,18 @@ #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/l1ctl.h> -int rx_pdtch_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, uint8_t bid, - const sbit_t *bits, const struct trx_meas_set *meas) +int rx_pdtch_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, uint8_t bid, + const sbit_t *bits, const struct l1sched_meas_set *meas) { - const struct trx_lchan_desc *lchan_desc; + const struct l1sched_lchan_desc *lchan_desc; uint8_t l2[GPRS_L2_MAX_LEN], *mask; int n_errors, n_bits_total, rc; sbit_t *buffer, *offset; size_t l2_len; /* Set up pointers */ - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; mask = &lchan->rx_burst_mask; buffer = lchan->rx_bursts; @@ -63,7 +63,7 @@ *mask |= (1 << bid); /* Store the measurements */ - sched_trx_meas_push(lchan, meas); + l1sched_lchan_meas_push(lchan, meas); /* Copy burst to buffer of 4 bursts */ offset = buffer + bid * 116; @@ -75,13 +75,13 @@ return 0; /* Calculate AVG of the measurements */ - sched_trx_meas_avg(lchan, 4); + l1sched_lchan_meas_avg(lchan, 4); /* Check for complete set of bursts */ if ((*mask & 0xf) != 0xf) { LOGP(DSCHD, LOGL_ERROR, "Received incomplete (%s) data frame at " "fn=%u (%u/%u) for %s\n", - burst_mask2str(mask, 4), lchan->meas_avg.fn, + l1sched_burst_mask2str(mask, 4), lchan->meas_avg.fn, lchan->meas_avg.fn % ts->mf_layout->period, ts->mf_layout->period, lchan_desc->name); @@ -103,25 +103,25 @@ l2_len = rc > 0 ? rc : 0; /* Send a L2 frame to the higher layers */ - sched_send_dt_ind(trx, ts, lchan, + l1sched_send_dt_ind(trx, ts, lchan, l2, l2_len, n_errors, rc < 0, true); return 0; } -int tx_pdtch_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br) +int tx_pdtch_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br) { - const struct trx_lchan_desc *lchan_desc; + const struct l1sched_lchan_desc *lchan_desc; ubit_t *buffer, *offset; const uint8_t *tsc; uint8_t *mask; int rc; /* Set up pointers */ - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; mask = &lchan->tx_burst_mask; buffer = lchan->tx_bursts; @@ -142,7 +142,7 @@ lchan->prim->payload_len)); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -EINVAL; } @@ -155,7 +155,7 @@ *mask |= (1 << br->bid); /* Choose proper TSC */ - tsc = sched_nb_training_bits[trx->tsc]; + tsc = l1sched_nb_training_bits[trx->tsc]; /* Compose a new burst */ memset(br->burst, 0, 3); /* TB */ @@ -171,10 +171,10 @@ /* If we have sent the last (4/4) burst */ if ((*mask & 0x0f) == 0x0f) { /* Confirm data / traffic sending */ - sched_send_dt_conf(trx, ts, lchan, br->fn, true); + l1sched_send_dt_conf(trx, ts, lchan, br->fn, true); /* Forget processed primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); /* Reset mask */ *mask = 0x00; diff --git a/src/host/trxcon/src/sched_lchan_rach.c b/src/host/trxcon/src/sched_lchan_rach.c index 33c0022..0e8d750 100644 --- a/src/host/trxcon/src/sched_lchan_rach.c +++ b/src/host/trxcon/src/sched_lchan_rach.c @@ -73,9 +73,9 @@ }; /* Obtain a to-be-transmitted RACH burst */ -int tx_rach_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br) +int tx_rach_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br) { struct l1ctl_ext_rach_req *ext_req = NULL; struct l1ctl_rach_req *req = NULL; @@ -85,7 +85,7 @@ int i, rc; /* Is it extended (11-bit) RACH or not? */ - if (PRIM_IS_RACH11(lchan->prim)) { + if (L1SCHED_PRIM_IS_RACH11(lchan->prim)) { ext_req = (struct l1ctl_ext_rach_req *) lchan->prim->payload; synch_seq = ext_req->synch_seq; @@ -94,7 +94,7 @@ LOGP(DSCHD, LOGL_ERROR, "Unknown RACH synch. sequence=0x%02x\n", synch_seq); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -ENOTSUP; } @@ -109,10 +109,10 @@ "(ra=%u bsic=%u)\n", ext_req->ra11, trx->bsic); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return rc; } - } else if (PRIM_IS_RACH8(lchan->prim)) { + } else if (L1SCHED_PRIM_IS_RACH8(lchan->prim)) { req = (struct l1ctl_rach_req *) lchan->prim->payload; synch_seq = RACH_SYNCH_SEQ_TS0; @@ -127,14 +127,14 @@ "(ra=%u bsic=%u)\n", req->ra, trx->bsic); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return rc; } } else { LOGP(DSCHD, LOGL_ERROR, "Primitive has odd length %zu (expected %zu or %zu), " "so dropping...\n", lchan->prim->payload_len, sizeof(*req), sizeof(*ext_req)); - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -EINVAL; } @@ -156,21 +156,21 @@ br->burst_len = GSM_BURST_LEN; LOGP(DSCHD, LOGL_NOTICE, "Scheduled %s RACH (%s) on fn=%u, tn=%u, lchan=%s\n", - PRIM_IS_RACH11(lchan->prim) ? "extended (11-bit)" : "regular (8-bit)", + L1SCHED_PRIM_IS_RACH11(lchan->prim) ? "extended (11-bit)" : "regular (8-bit)", get_value_string(rach_synch_seq_names, synch_seq), br->fn, - ts->index, trx_lchan_desc[lchan->type].name); + ts->index, l1sched_lchan_desc[lchan->type].name); /* Confirm RACH request */ l1ctl_tx_rach_conf(trx->l1l, trx->band_arfcn, br->fn); /* Optional GSMTAP logging */ - sched_gsmtap_send(lchan->type, br->fn, ts->index, + l1sched_gsmtap_send(lchan->type, br->fn, ts->index, trx->band_arfcn | ARFCN_UPLINK, 0, 0, - PRIM_IS_RACH11(lchan->prim) ? (uint8_t *) &ext_req->ra11 : &req->ra, - PRIM_IS_RACH11(lchan->prim) ? 2 : 1); + L1SCHED_PRIM_IS_RACH11(lchan->prim) ? (uint8_t *) &ext_req->ra11 : &req->ra, + L1SCHED_PRIM_IS_RACH11(lchan->prim) ? 2 : 1); /* Forget processed primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return 0; } diff --git a/src/host/trxcon/src/sched_lchan_sch.c b/src/host/trxcon/src/sched_lchan_sch.c index ed914a0..b9356eb 100644 --- a/src/host/trxcon/src/sched_lchan_sch.c +++ b/src/host/trxcon/src/sched_lchan_sch.c @@ -64,9 +64,9 @@ time->fn = gsm_gsmtime2fn(time); } -int rx_sch_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, uint8_t bid, - const sbit_t *bits, const struct trx_meas_set *meas) +int rx_sch_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, uint8_t bid, + const sbit_t *bits, const struct l1sched_meas_set *meas) { sbit_t payload[2 * 39]; struct gsm_time time; @@ -109,8 +109,8 @@ return -ENOMEM; /* Fill in some downlink info */ - data->chan_nr = trx_lchan_desc[lchan->type].chan_nr | ts->index; - data->link_id = trx_lchan_desc[lchan->type].link_id; + data->chan_nr = l1sched_lchan_desc[lchan->type].chan_nr | ts->index; + data->link_id = l1sched_lchan_desc[lchan->type].link_id; data->band_arfcn = htons(trx->band_arfcn); data->frame_nr = htonl(fn); data->rx_level = -(meas->rssi); diff --git a/src/host/trxcon/src/sched_lchan_tchf.c b/src/host/trxcon/src/sched_lchan_tchf.c index 6669bb0..0772e17 100644 --- a/src/host/trxcon/src/sched_lchan_tchf.c +++ b/src/host/trxcon/src/sched_lchan_tchf.c @@ -39,18 +39,18 @@ #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/l1ctl.h> -int rx_tchf_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, uint8_t bid, - const sbit_t *bits, const struct trx_meas_set *meas) +int rx_tchf_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, uint8_t bid, + const sbit_t *bits, const struct l1sched_meas_set *meas) { - const struct trx_lchan_desc *lchan_desc; + const struct l1sched_lchan_desc *lchan_desc; int n_errors = -1, n_bits_total, rc; sbit_t *buffer, *offset; uint8_t l2[128], *mask; size_t l2_len; /* Set up pointers */ - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; mask = &lchan->rx_burst_mask; buffer = lchan->rx_bursts; @@ -65,7 +65,7 @@ *mask |= (1 << bid); /* Store the measurements */ - sched_trx_meas_push(lchan, meas); + l1sched_lchan_meas_push(lchan, meas); /* Copy burst to end of buffer of 8 bursts */ offset = buffer + bid * 116 + 464; @@ -77,13 +77,13 @@ return 0; /* Calculate AVG of the measurements */ - sched_trx_meas_avg(lchan, 8); + l1sched_lchan_meas_avg(lchan, 8); /* Check for complete set of bursts */ if ((*mask & 0xff) != 0xff) { LOGP(DSCHD, LOGL_ERROR, "Received incomplete (%s) traffic frame at " "fn=%u (%u/%u) for %s\n", - burst_mask2str(mask, 8), lchan->meas_avg.fn, + l1sched_burst_mask2str(mask, 8), lchan->meas_avg.fn, lchan->meas_avg.fn % ts->mf_layout->period, ts->mf_layout->period, lchan_desc->name); @@ -128,7 +128,7 @@ goto bfi; } else if (rc == GSM_MACBLOCK_LEN) { /* FACCH received, forward it to the higher layers */ - sched_send_dt_ind(trx, ts, lchan, l2, GSM_MACBLOCK_LEN, + l1sched_send_dt_ind(trx, ts, lchan, l2, GSM_MACBLOCK_LEN, n_errors, false, false); /* Send BFI substituting a stolen TCH frame */ @@ -140,13 +140,13 @@ } /* Send a traffic frame to the higher layers */ - return sched_send_dt_ind(trx, ts, lchan, l2, l2_len, + return l1sched_send_dt_ind(trx, ts, lchan, l2, l2_len, n_errors, false, true); bfi: /* Didn't try to decode, fake measurements */ if (n_errors < 0) { - lchan->meas_avg = (struct trx_meas_set) { + lchan->meas_avg = (struct l1sched_meas_set) { .fn = lchan->meas_avg.fn, .toa256 = 0, .rssi = -110, @@ -158,22 +158,22 @@ /* BFI is not applicable in signalling mode */ if (lchan->tch_mode == GSM48_CMODE_SIGN) - return sched_send_dt_ind(trx, ts, lchan, NULL, 0, + return l1sched_send_dt_ind(trx, ts, lchan, NULL, 0, n_errors, true, false); /* Bad frame indication */ - l2_len = sched_bad_frame_ind(l2, lchan); + l2_len = l1sched_bad_frame_ind(l2, lchan); /* Send a BFI frame to the higher layers */ - return sched_send_dt_ind(trx, ts, lchan, l2, l2_len, + return l1sched_send_dt_ind(trx, ts, lchan, l2, l2_len, n_errors, true, true); } -int tx_tchf_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br) +int tx_tchf_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br) { - const struct trx_lchan_desc *lchan_desc; + const struct l1sched_lchan_desc *lchan_desc; ubit_t *buffer, *offset; const uint8_t *tsc; uint8_t *mask; @@ -181,7 +181,7 @@ int rc; /* Set up pointers */ - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; mask = &lchan->tx_burst_mask; buffer = lchan->tx_bursts; @@ -211,7 +211,7 @@ "dropping frame...\n"); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -ENOTSUP; default: @@ -219,7 +219,7 @@ "dropping frame...\n", lchan->tch_mode); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -EINVAL; } @@ -232,7 +232,7 @@ "(expected %zu for TCH or %u for FACCH), so dropping...\n", lchan->prim->payload_len, l2_len, GSM_MACBLOCK_LEN); - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -EINVAL; } @@ -247,7 +247,7 @@ lchan->prim->payload_len)); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -EINVAL; } @@ -260,7 +260,7 @@ *mask |= (1 << br->bid); /* Choose proper TSC */ - tsc = sched_nb_training_bits[trx->tsc]; + tsc = l1sched_nb_training_bits[trx->tsc]; /* Compose a new burst */ memset(br->burst, 0, 3); /* TB */ @@ -276,10 +276,10 @@ /* If we have sent the last (4/4) burst */ if (*mask == 0x0f) { /* Confirm data / traffic sending */ - sched_send_dt_conf(trx, ts, lchan, br->fn, PRIM_IS_TCH(lchan->prim)); + l1sched_send_dt_conf(trx, ts, lchan, br->fn, L1SCHED_PRIM_IS_TCH(lchan->prim)); /* Forget processed primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); /* Reset mask */ *mask = 0x00; diff --git a/src/host/trxcon/src/sched_lchan_tchh.c b/src/host/trxcon/src/sched_lchan_tchh.c index 673e5ea..ffeb6f8 100644 --- a/src/host/trxcon/src/sched_lchan_tchh.c +++ b/src/host/trxcon/src/sched_lchan_tchh.c @@ -97,7 +97,7 @@ * @param start init or end of transmission? * @return true (yes) or false (no) */ -bool sched_tchh_block_map_fn(enum l1sched_lchan_type chan, +bool l1sched_tchh_block_map_fn(enum l1sched_lchan_type chan, uint32_t fn, bool ul, bool facch, bool start) { uint8_t fn_mf; @@ -153,7 +153,7 @@ * @return either frame number of the first burst, * or fn=last_fn if calculation failed */ -uint32_t sched_tchh_block_dl_first_fn(enum l1sched_lchan_type chan, +uint32_t l1sched_tchh_block_dl_first_fn(enum l1sched_lchan_type chan, uint32_t last_fn, bool facch) { uint8_t fn_mf, fn_diff; @@ -195,18 +195,18 @@ return last_fn; } -int rx_tchh_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, uint8_t bid, - const sbit_t *bits, const struct trx_meas_set *meas) +int rx_tchh_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, uint8_t bid, + const sbit_t *bits, const struct l1sched_meas_set *meas) { - const struct trx_lchan_desc *lchan_desc; + const struct l1sched_lchan_desc *lchan_desc; int n_errors = -1, n_bits_total, rc; sbit_t *buffer, *offset; uint8_t l2[128], *mask; size_t l2_len; /* Set up pointers */ - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; mask = &lchan->rx_burst_mask; buffer = lchan->rx_bursts; @@ -220,10 +220,10 @@ /* Align reception of the first FACCH/H frame */ if (lchan->tch_mode == GSM48_CMODE_SIGN) { - if (!sched_tchh_facch_start(lchan->type, fn, 0)) + if (!l1sched_tchh_facch_start(lchan->type, fn, 0)) return 0; } else { /* or TCH/H traffic frame */ - if (!sched_tchh_traffic_start(lchan->type, fn, 0)) + if (!l1sched_tchh_traffic_start(lchan->type, fn, 0)) return 0; } } @@ -232,7 +232,7 @@ *mask |= (1 << bid); /* Store the measurements */ - sched_trx_meas_push(lchan, meas); + l1sched_lchan_meas_push(lchan, meas); /* Copy burst to the end of buffer of 6 bursts */ offset = buffer + bid * 116 + 464; @@ -264,7 +264,7 @@ case GSM48_CMODE_SIGN: case GSM48_CMODE_SPEECH_V1: /* HR */ rc = gsm0503_tch_hr_decode(l2, buffer, - !sched_tchh_facch_end(lchan->type, fn, 0), + !l1sched_tchh_facch_end(lchan->type, fn, 0), &n_errors, &n_bits_total); break; case GSM48_CMODE_SPEECH_AMR: /* AMR */ @@ -289,7 +289,7 @@ /* Check decoding result */ if (rc < 4) { /* Calculate AVG of the measurements (assuming 4 bursts) */ - sched_trx_meas_avg(lchan, 4); + l1sched_lchan_meas_avg(lchan, 4); LOGP(DSCHD, LOGL_ERROR, "Received bad %s frame (rc=%d, ber=%d/%d) at fn=%u\n", lchan_desc->name, rc, n_errors, n_bits_total, lchan->meas_avg.fn); @@ -301,10 +301,10 @@ lchan->dl_ongoing_facch = true; /* Calculate AVG of the measurements (FACCH/H takes 6 bursts) */ - sched_trx_meas_avg(lchan, 6); + l1sched_lchan_meas_avg(lchan, 6); /* FACCH/H received, forward to the higher layers */ - sched_send_dt_ind(trx, ts, lchan, l2, GSM_MACBLOCK_LEN, + l1sched_send_dt_ind(trx, ts, lchan, l2, GSM_MACBLOCK_LEN, n_errors, false, false); /* Send BFI substituting 1/2 stolen TCH frames */ @@ -315,11 +315,11 @@ l2_len = rc; /* Calculate AVG of the measurements (traffic takes 4 bursts) */ - sched_trx_meas_avg(lchan, 4); + l1sched_lchan_meas_avg(lchan, 4); } /* Send a traffic frame to the higher layers */ - return sched_send_dt_ind(trx, ts, lchan, l2, l2_len, + return l1sched_send_dt_ind(trx, ts, lchan, l2, l2_len, n_errors, false, true); bfi_shift: @@ -333,8 +333,8 @@ bfi: /* Didn't try to decode, fake measurements */ if (n_errors < 0) { - lchan->meas_avg = (struct trx_meas_set) { - .fn = sched_tchh_block_dl_first_fn(lchan->type, fn, false), + lchan->meas_avg = (struct l1sched_meas_set) { + .fn = l1sched_tchh_block_dl_first_fn(lchan->type, fn, false), .toa256 = 0, .rssi = -110, }; @@ -345,22 +345,22 @@ /* BFI is not applicable in signalling mode */ if (lchan->tch_mode == GSM48_CMODE_SIGN) - return sched_send_dt_ind(trx, ts, lchan, NULL, 0, + return l1sched_send_dt_ind(trx, ts, lchan, NULL, 0, n_errors, true, false); /* Bad frame indication */ - l2_len = sched_bad_frame_ind(l2, lchan); + l2_len = l1sched_bad_frame_ind(l2, lchan); /* Send a BFI frame to the higher layers */ - return sched_send_dt_ind(trx, ts, lchan, l2, l2_len, + return l1sched_send_dt_ind(trx, ts, lchan, l2, l2_len, n_errors, true, true); } -int tx_tchh_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br) +int tx_tchh_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br) { - const struct trx_lchan_desc *lchan_desc; + const struct l1sched_lchan_desc *lchan_desc; ubit_t *buffer, *offset; const uint8_t *tsc; uint8_t *mask; @@ -368,7 +368,7 @@ int rc; /* Set up pointers */ - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; mask = &lchan->tx_burst_mask; buffer = lchan->tx_bursts; @@ -382,7 +382,7 @@ if (*mask == 0x00) { /* Align transmission of the first FACCH/H frame */ if (lchan->tch_mode == GSM48_CMODE_SIGN) - if (!sched_tchh_facch_start(lchan->type, br->fn, 1)) + if (!l1sched_tchh_facch_start(lchan->type, br->fn, 1)) return 0; } @@ -413,19 +413,19 @@ "dropping frame...\n"); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -ENOTSUP; default: LOGP(DSCHD, LOGL_ERROR, "Invalid TCH mode: %u, " "dropping frame...\n", lchan->tch_mode); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -EINVAL; } /* Determine payload length */ - if (PRIM_IS_FACCH(lchan->prim)) { + if (L1SCHED_PRIM_IS_FACCH(lchan->prim)) { l2_len = GSM_MACBLOCK_LEN; /* FACCH */ } else if (lchan->prim->payload_len != l2_len) { LOGP(DSCHD, LOGL_ERROR, "Primitive has odd length %zu " @@ -433,7 +433,7 @@ lchan->prim->payload_len, l2_len, GSM_MACBLOCK_LEN); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -EINVAL; } @@ -445,12 +445,12 @@ lchan->prim->payload_len)); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -EINVAL; } /* A FACCH/H frame occupies 6 bursts */ - if (PRIM_IS_FACCH(lchan->prim)) + if (L1SCHED_PRIM_IS_FACCH(lchan->prim)) lchan->ul_facch_blocks = 6; send_burst: @@ -461,7 +461,7 @@ *mask |= (1 << br->bid); /* Choose proper TSC */ - tsc = sched_nb_training_bits[trx->tsc]; + tsc = l1sched_nb_training_bits[trx->tsc]; /* Compose a new burst */ memset(br->burst, 0, 3); /* TB */ @@ -484,11 +484,11 @@ * confirm data / traffic sending */ if (!lchan->ul_facch_blocks) - sched_send_dt_conf(trx, ts, lchan, br->fn, - PRIM_IS_TCH(lchan->prim)); + l1sched_send_dt_conf(trx, ts, lchan, br->fn, + L1SCHED_PRIM_IS_TCH(lchan->prim)); /* Forget processed primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); } return 0; diff --git a/src/host/trxcon/src/sched_lchan_xcch.c b/src/host/trxcon/src/sched_lchan_xcch.c index e3accf3..71eeae3 100644 --- a/src/host/trxcon/src/sched_lchan_xcch.c +++ b/src/host/trxcon/src/sched_lchan_xcch.c @@ -37,17 +37,17 @@ #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/l1ctl.h> -int rx_data_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, uint32_t fn, uint8_t bid, - const sbit_t *bits, const struct trx_meas_set *meas) +int rx_data_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, uint32_t fn, uint8_t bid, + const sbit_t *bits, const struct l1sched_meas_set *meas) { - const struct trx_lchan_desc *lchan_desc; + const struct l1sched_lchan_desc *lchan_desc; uint8_t l2[GSM_MACBLOCK_LEN], *mask; int n_errors, n_bits_total, rc; sbit_t *buffer, *offset; /* Set up pointers */ - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; mask = &lchan->rx_burst_mask; buffer = lchan->rx_bursts; @@ -62,7 +62,7 @@ *mask |= (1 << bid); /* Store the measurements */ - sched_trx_meas_push(lchan, meas); + l1sched_lchan_meas_push(lchan, meas); /* Copy burst to buffer of 4 bursts */ offset = buffer + bid * 116; @@ -74,13 +74,13 @@ return 0; /* Calculate AVG of the measurements */ - sched_trx_meas_avg(lchan, 4); + l1sched_lchan_meas_avg(lchan, 4); /* Check for complete set of bursts */ if ((*mask & 0xf) != 0xf) { LOGP(DSCHD, LOGL_ERROR, "Received incomplete (%s) data frame at " "fn=%u (%u/%u) for %s\n", - burst_mask2str(mask, 4), lchan->meas_avg.fn, + l1sched_burst_mask2str(mask, 4), lchan->meas_avg.fn, lchan->meas_avg.fn % ts->mf_layout->period, ts->mf_layout->period, lchan_desc->name); @@ -103,27 +103,27 @@ * We should anyway send dummy frame for * proper measurement reporting... */ - return sched_send_dt_ind(trx, ts, lchan, NULL, 0, + return l1sched_send_dt_ind(trx, ts, lchan, NULL, 0, n_errors, true, false); } /* Send a L2 frame to the higher layers */ - return sched_send_dt_ind(trx, ts, lchan, l2, GSM_MACBLOCK_LEN, + return l1sched_send_dt_ind(trx, ts, lchan, l2, GSM_MACBLOCK_LEN, n_errors, false, false); } -int tx_data_fn(struct trx_instance *trx, struct trx_ts *ts, - struct trx_lchan_state *lchan, - struct sched_burst_req *br) +int tx_data_fn(struct trx_instance *trx, struct l1sched_ts *ts, + struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br) { - const struct trx_lchan_desc *lchan_desc; + const struct l1sched_lchan_desc *lchan_desc; ubit_t *buffer, *offset; const uint8_t *tsc; uint8_t *mask; int rc; /* Set up pointers */ - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; mask = &lchan->tx_burst_mask; buffer = lchan->tx_bursts; @@ -140,7 +140,7 @@ LOGP(DSCHD, LOGL_ERROR, "Primitive has odd length %zu (expected %u), " "so dropping...\n", lchan->prim->payload_len, GSM_MACBLOCK_LEN); - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -EINVAL; } @@ -152,7 +152,7 @@ lchan->prim->payload_len)); /* Forget this primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); return -EINVAL; } @@ -165,7 +165,7 @@ *mask |= (1 << br->bid); /* Choose proper TSC */ - tsc = sched_nb_training_bits[trx->tsc]; + tsc = l1sched_nb_training_bits[trx->tsc]; /* Compose a new burst */ memset(br->burst, 0, 3); /* TB */ @@ -181,10 +181,10 @@ /* If we have sent the last (4/4) burst */ if ((*mask & 0x0f) == 0x0f) { /* Confirm data sending */ - sched_send_dt_conf(trx, ts, lchan, br->fn, false); + l1sched_send_dt_conf(trx, ts, lchan, br->fn, false); /* Forget processed primitive */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); /* Reset mask */ *mask = 0x00; diff --git a/src/host/trxcon/src/sched_mframe.c b/src/host/trxcon/src/sched_mframe.c index e8125ea..fb8840e 100644 --- a/src/host/trxcon/src/sched_mframe.c +++ b/src/host/trxcon/src/sched_mframe.c @@ -28,7 +28,7 @@ #include <osmocom/bb/trxcon/sched_trx.h> /* Non-combined CCCH */ -static const struct trx_frame frame_bcch[51] = { +static const struct l1sched_tdma_frame frame_bcch[51] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, @@ -84,7 +84,7 @@ }; /* Combined CCCH+SDCCH4 */ -static const struct trx_frame frame_bcch_sdcch4[102] = { +static const struct l1sched_tdma_frame frame_bcch_sdcch4[102] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_FCCH, 0, L1SCHED_SDCCH4_3, 0 }, { L1SCHED_SCH, 0, L1SCHED_SDCCH4_3, 1 }, @@ -191,7 +191,7 @@ { L1SCHED_IDLE, 0, L1SCHED_SDCCH4_2, 3 }, }; -static const struct trx_frame frame_bcch_sdcch4_cbch[102] = { +static const struct l1sched_tdma_frame frame_bcch_sdcch4_cbch[102] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_FCCH, 0, L1SCHED_SDCCH4_3, 0 }, { L1SCHED_SCH, 0, L1SCHED_SDCCH4_3, 1 }, @@ -298,7 +298,7 @@ { L1SCHED_IDLE, 0, L1SCHED_IDLE, 3 }, }; -static const struct trx_frame frame_sdcch8[102] = { +static const struct l1sched_tdma_frame frame_sdcch8[102] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_SDCCH8_0, 0, L1SCHED_SACCH8_5, 0 }, { L1SCHED_SDCCH8_0, 1, L1SCHED_SACCH8_5, 1 }, @@ -405,7 +405,7 @@ { L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 3 }, }; -static const struct trx_frame frame_sdcch8_cbch[102] = { +static const struct l1sched_tdma_frame frame_sdcch8_cbch[102] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_SDCCH8_0, 0, L1SCHED_SACCH8_5, 0 }, { L1SCHED_SDCCH8_0, 1, L1SCHED_SACCH8_5, 1 }, @@ -512,7 +512,7 @@ { L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 3 }, }; -static const struct trx_frame frame_tchf_ts0[104] = { +static const struct l1sched_tdma_frame frame_tchf_ts0[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, @@ -620,7 +620,7 @@ { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, }; -static const struct trx_frame frame_tchf_ts1[104] = { +static const struct l1sched_tdma_frame frame_tchf_ts1[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, @@ -728,7 +728,7 @@ { L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 }, }; -static const struct trx_frame frame_tchf_ts2[104] = { +static const struct l1sched_tdma_frame frame_tchf_ts2[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, @@ -836,7 +836,7 @@ { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, }; -static const struct trx_frame frame_tchf_ts3[104] = { +static const struct l1sched_tdma_frame frame_tchf_ts3[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, @@ -944,7 +944,7 @@ { L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 }, }; -static const struct trx_frame frame_tchf_ts4[104] = { +static const struct l1sched_tdma_frame frame_tchf_ts4[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, @@ -1052,7 +1052,7 @@ { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, }; -static const struct trx_frame frame_tchf_ts5[104] = { +static const struct l1sched_tdma_frame frame_tchf_ts5[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, @@ -1160,7 +1160,7 @@ { L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 }, }; -static const struct trx_frame frame_tchf_ts6[104] = { +static const struct l1sched_tdma_frame frame_tchf_ts6[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, @@ -1268,7 +1268,7 @@ { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, }; -static const struct trx_frame frame_tchf_ts7[104] = { +static const struct l1sched_tdma_frame frame_tchf_ts7[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, @@ -1376,7 +1376,7 @@ { L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 }, }; -static const struct trx_frame frame_tchh_ts01[104] = { +static const struct l1sched_tdma_frame frame_tchh_ts01[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, @@ -1484,7 +1484,7 @@ { L1SCHED_SACCHTH_1, 3, L1SCHED_SACCHTH_1, 3 }, }; -static const struct trx_frame frame_tchh_ts23[104] = { +static const struct l1sched_tdma_frame frame_tchh_ts23[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, @@ -1592,7 +1592,7 @@ { L1SCHED_SACCHTH_1, 2, L1SCHED_SACCHTH_1, 2 }, }; -static const struct trx_frame frame_tchh_ts45[104] = { +static const struct l1sched_tdma_frame frame_tchh_ts45[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, @@ -1700,7 +1700,7 @@ { L1SCHED_SACCHTH_1, 1, L1SCHED_SACCHTH_1, 1 }, }; -static const struct trx_frame frame_tchh_ts67[104] = { +static const struct l1sched_tdma_frame frame_tchh_ts67[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, @@ -1808,7 +1808,7 @@ { L1SCHED_SACCHTH_1, 0, L1SCHED_SACCHTH_1, 0 }, }; -static const struct trx_frame frame_pdch[104] = { +static const struct l1sched_tdma_frame frame_pdch[104] = { /* dl_chan dl_bid ul_chan ul_bid */ { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, @@ -1969,7 +1969,7 @@ * 102 = 2 x 51 frame multiframe * 104 = 4 x 26 frame multiframe */ -static const struct trx_multiframe layouts[] = { +static const struct l1sched_tdma_multiframe layouts[] = { { GSM_PCHAN_NONE, "NONE", 0, 0xff, @@ -2086,7 +2086,7 @@ }, }; -const struct trx_multiframe *sched_mframe_layout( +const struct l1sched_tdma_multiframe *l1sched_mframe_layout( enum gsm_phys_chan_config config, int tn) { int i, ts_allowed; diff --git a/src/host/trxcon/src/sched_prim.c b/src/host/trxcon/src/sched_prim.c index 9d0101c..7cda9d7 100644 --- a/src/host/trxcon/src/sched_prim.c +++ b/src/host/trxcon/src/sched_prim.c @@ -45,15 +45,15 @@ * @param link_id RSL link description (used to set a proper chan) * @return zero in case of success, otherwise a error number */ -int sched_prim_init(void *ctx, struct trx_ts_prim **prim, +int l1sched_prim_init(void *ctx, struct l1sched_ts_prim **prim, size_t pl_len, uint8_t chan_nr, uint8_t link_id) { enum l1sched_lchan_type lchan_type; - struct trx_ts_prim *new_prim; + struct l1sched_ts_prim *new_prim; uint8_t len; /* Determine lchan type */ - lchan_type = sched_trx_chan_nr2lchan_type(chan_nr, link_id); + lchan_type = l1sched_chan_nr2lchan_type(chan_nr, link_id); if (!lchan_type) { LOGP(DSCH, LOGL_ERROR, "Couldn't determine lchan type " "for chan_nr=%02x and link_id=%02x\n", chan_nr, link_id); @@ -61,7 +61,7 @@ } /* How much memory do we need? */ - len = sizeof(struct trx_ts_prim); /* Primitive header */ + len = sizeof(struct l1sched_ts_prim); /* Primitive header */ len += pl_len; /* Requested payload size */ /* Allocate a new primitive */ @@ -90,10 +90,10 @@ * @param chan_nr RSL channel description * @return zero in case of success, otherwise a error number */ -int sched_prim_push(struct trx_instance *trx, - struct trx_ts_prim *prim, uint8_t chan_nr) +int l1sched_prim_push(struct trx_instance *trx, + struct l1sched_ts_prim *prim, uint8_t chan_nr) { - struct trx_ts *ts; + struct l1sched_ts *ts; uint8_t tn; /* Determine TS index */ @@ -125,9 +125,9 @@ * @param lchan lchan to assign a primitive * @return SACCH primitive to be transmitted */ -static struct trx_ts_prim *prim_compose_mr(struct trx_lchan_state *lchan) +static struct l1sched_ts_prim *prim_compose_mr(struct l1sched_lchan_state *lchan) { - struct trx_ts_prim *prim; + struct l1sched_ts_prim *prim; uint8_t *mr_src_ptr; bool cached; int rc; @@ -162,8 +162,8 @@ }; /* Allocate a new primitive */ - rc = sched_prim_init(lchan, &prim, GSM_MACBLOCK_LEN, - trx_lchan_desc[lchan->type].chan_nr, TRX_CH_LID_SACCH); + rc = l1sched_prim_init(lchan, &prim, GSM_MACBLOCK_LEN, + l1sched_lchan_desc[lchan->type].chan_nr, L1SCHED_CH_LID_SACCH); OSMO_ASSERT(rc == 0); /* Check if the MR cache is populated (verify LAPDm header) */ @@ -198,12 +198,12 @@ LOGP(DSCHD, LOGL_NOTICE, "SACCH MR cache usage count=%u > 5 " "on lchan=%s => ancient measurements, please fix!\n", lchan->sacch.mr_cache_usage, - trx_lchan_desc[lchan->type].name); + l1sched_lchan_desc[lchan->type].name); } LOGP(DSCHD, LOGL_NOTICE, "Using a %s Measurement Report " "on lchan=%s\n", (cached ? "cached" : "dummy"), - trx_lchan_desc[lchan->type].name); + l1sched_lchan_desc[lchan->type].name); return prim; } @@ -234,12 +234,12 @@ * @param lchan lchan to assign a primitive * @return SACCH primitive to be transmitted */ -static struct trx_ts_prim *prim_dequeue_sacch(struct llist_head *queue, - struct trx_lchan_state *lchan) +static struct l1sched_ts_prim *prim_dequeue_sacch(struct llist_head *queue, + struct l1sched_lchan_state *lchan) { - struct trx_ts_prim *prim_nmr = NULL; - struct trx_ts_prim *prim_mr = NULL; - struct trx_ts_prim *prim; + struct l1sched_ts_prim *prim_nmr = NULL; + struct l1sched_ts_prim *prim_mr = NULL; + struct l1sched_ts_prim *prim; bool mr_now; /* Shall we transmit MR now? */ @@ -272,7 +272,7 @@ LOGP(DSCHD, LOGL_DEBUG, "SACCH MR selection on lchan=%s: " "mr_tx_last=%d prim_mr=%p prim_nmr=%p\n", - trx_lchan_desc[lchan->type].name, + l1sched_lchan_desc[lchan->type].name, lchan->sacch.mr_tx_last, prim_mr, prim_nmr); @@ -299,24 +299,24 @@ lchan->sacch.mr_cache_usage = 0; LOGP(DSCHD, LOGL_DEBUG, "SACCH MR cache has been updated " - "for lchan=%s\n", trx_lchan_desc[lchan->type].name); + "for lchan=%s\n", l1sched_lchan_desc[lchan->type].name); } /* Update the MR transmission state */ lchan->sacch.mr_tx_last = PRIM_IS_MR(prim); LOGP(DSCHD, LOGL_DEBUG, "SACCH decision on lchan=%s: %s\n", - trx_lchan_desc[lchan->type].name, PRIM_IS_MR(prim) ? + l1sched_lchan_desc[lchan->type].name, PRIM_IS_MR(prim) ? "Measurement Report" : "data frame"); return prim; } /* Dequeues a primitive of a given channel type */ -static struct trx_ts_prim *prim_dequeue_one(struct llist_head *queue, +static struct l1sched_ts_prim *prim_dequeue_one(struct llist_head *queue, enum l1sched_lchan_type lchan_type) { - struct trx_ts_prim *prim; + struct l1sched_ts_prim *prim; /** * There is no need to use the 'safe' list iteration here @@ -337,7 +337,7 @@ * of a given channel type (Lm or Bm). * * Note: we could avoid 'lchan_type' parameter and just - * check the prim's channel type using CHAN_IS_TCH(), + * check the prim's channel type using L1SCHED_CHAN_IS_TCH(), * but the current approach is a bit more flexible, * and allows one to have both sub-slots of TCH/H * enabled on same timeslot e.g. for testing... @@ -349,10 +349,10 @@ * @return either a FACCH, or a TCH primitive if found, * otherwise NULL */ -static struct trx_ts_prim *prim_dequeue_tch(struct llist_head *queue, +static struct l1sched_ts_prim *prim_dequeue_tch(struct llist_head *queue, enum l1sched_lchan_type lchan_type, bool facch) { - struct trx_ts_prim *prim; + struct l1sched_ts_prim *prim; /** * There is no need to use the 'safe' list iteration here @@ -363,7 +363,7 @@ continue; /* Either FACCH, or not FACCH */ - if (PRIM_IS_FACCH(prim) != facch) + if (L1SCHED_PRIM_IS_FACCH(prim) != facch) continue; llist_del(&prim->list); @@ -382,10 +382,10 @@ * @return either a FACCH/F, or a TCH/F primitive, * otherwise NULL */ -static struct trx_ts_prim *prim_dequeue_tch_f(struct llist_head *queue) +static struct l1sched_ts_prim *prim_dequeue_tch_f(struct llist_head *queue) { - struct trx_ts_prim *facch; - struct trx_ts_prim *tch; + struct l1sched_ts_prim *facch; + struct l1sched_ts_prim *tch; /* Attempt to find a pair of both FACCH/F and TCH/F frames */ facch = prim_dequeue_tch(queue, L1SCHED_TCHF, true); @@ -428,15 +428,15 @@ * @return either a FACCH/H, or a TCH/H primitive, * otherwise NULL */ -static struct trx_ts_prim *prim_dequeue_tch_h(struct llist_head *queue, +static struct l1sched_ts_prim *prim_dequeue_tch_h(struct llist_head *queue, uint32_t fn, enum l1sched_lchan_type lchan_type) { - struct trx_ts_prim *facch; - struct trx_ts_prim *tch; + struct l1sched_ts_prim *facch; + struct l1sched_ts_prim *tch; bool facch_now; /* May we initiate an UL FACCH/H frame transmission now? */ - facch_now = sched_tchh_facch_start(lchan_type, fn, true); + facch_now = l1sched_tchh_facch_start(lchan_type, fn, true); if (!facch_now) /* Just dequeue a TCH/H prim */ goto no_facch; @@ -472,11 +472,11 @@ * @param lchan logical channel state * @return a primitive or NULL if not found */ -struct trx_ts_prim *sched_prim_dequeue(struct llist_head *queue, - uint32_t fn, struct trx_lchan_state *lchan) +struct l1sched_ts_prim *l1sched_prim_dequeue(struct llist_head *queue, + uint32_t fn, struct l1sched_lchan_state *lchan) { /* SACCH is unorthodox, see 3GPP TS 04.08, section 3.4.1 */ - if (CHAN_IS_SACCH(lchan->type)) + if (L1SCHED_CHAN_IS_SACCH(lchan->type)) return prim_dequeue_sacch(queue, lchan); /* There is nothing to dequeue */ @@ -504,7 +504,7 @@ * * @param lchan a logical channel to drop prim from */ -void sched_prim_drop(struct trx_lchan_state *lchan) +void l1sched_prim_drop(struct l1sched_lchan_state *lchan) { /* Forget this primitive */ talloc_free(lchan->prim); @@ -519,11 +519,11 @@ * @param lchan lchan to assign a primitive * @return zero in case of success, otherwise a error code */ -int sched_prim_dummy(struct trx_lchan_state *lchan) +int l1sched_prim_dummy(struct l1sched_lchan_state *lchan) { enum l1sched_lchan_type chan = lchan->type; uint8_t tch_mode = lchan->tch_mode; - struct trx_ts_prim *prim; + struct l1sched_ts_prim *prim; uint8_t prim_buffer[40]; size_t prim_len = 0; int i; @@ -541,7 +541,7 @@ /* Make sure that there is no existing primitive */ OSMO_ASSERT(lchan->prim == NULL); /* Not applicable for SACCH! */ - OSMO_ASSERT(!CHAN_IS_SACCH(lchan->type)); + OSMO_ASSERT(!L1SCHED_CHAN_IS_SACCH(lchan->type)); /** * Determine what actually should be generated: @@ -549,10 +549,10 @@ * TCH in other modes: silence frame; * other channels: LAPDm fill frame. */ - if (CHAN_IS_TCH(chan) && TCH_MODE_IS_SPEECH(tch_mode)) { + if (L1SCHED_CHAN_IS_TCH(chan) && L1SCHED_TCH_MODE_IS_SPEECH(tch_mode)) { /* Bad frame indication */ - prim_len = sched_bad_frame_ind(prim_buffer, lchan); - } else if (CHAN_IS_TCH(chan) && TCH_MODE_IS_DATA(tch_mode)) { + prim_len = l1sched_bad_frame_ind(prim_buffer, lchan); + } else if (L1SCHED_CHAN_IS_TCH(chan) && L1SCHED_TCH_MODE_IS_DATA(tch_mode)) { /* FIXME: should we do anything for CSD? */ return 0; } else { @@ -577,7 +577,7 @@ return 0; /* Allocate a new primitive */ - prim = talloc_zero_size(lchan, sizeof(struct trx_ts_prim) + prim_len); + prim = talloc_zero_size(lchan, sizeof(struct l1sched_ts_prim) + prim_len); if (prim == NULL) return -ENOMEM; @@ -592,7 +592,7 @@ lchan->prim = prim; LOGP(DSCHD, LOGL_DEBUG, "Transmitting a dummy / silence frame " - "on lchan=%s\n", trx_lchan_desc[chan].name); + "on lchan=%s\n", l1sched_lchan_desc[chan].name); return 0; } @@ -602,9 +602,9 @@ * * @param list list of prims going to be flushed */ -void sched_prim_flush_queue(struct llist_head *list) +void l1sched_prim_flush_queue(struct llist_head *list) { - struct trx_ts_prim *prim, *prim_next; + struct l1sched_ts_prim *prim, *prim_next; llist_for_each_entry_safe(prim, prim_next, list, list) { llist_del(&prim->list); diff --git a/src/host/trxcon/src/sched_trx.c b/src/host/trxcon/src/sched_trx.c index fe9f783..04be66c 100644 --- a/src/host/trxcon/src/sched_trx.c +++ b/src/host/trxcon/src/sched_trx.c @@ -37,19 +37,19 @@ #include <osmocom/bb/trxcon/trx_if.h> #include <osmocom/bb/trxcon/logging.h> -static void sched_trx_a5_burst_enc(struct trx_lchan_state *lchan, - struct sched_burst_req *br); +static void l1sched_a5_burst_enc(struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br); -static void sched_frame_clck_cb(struct trx_sched *sched) +static void sched_frame_clck_cb(struct l1sched_state *sched) { struct trx_instance *trx = (struct trx_instance *) sched->data; - struct sched_burst_req br[TRX_TS_COUNT]; - const struct trx_frame *frame; - struct trx_lchan_state *lchan; - trx_lchan_tx_func *handler; + struct l1sched_burst_req br[TRX_TS_COUNT]; + const struct l1sched_tdma_frame *frame; + struct l1sched_lchan_state *lchan; + l1sched_lchan_tx_func *handler; enum l1sched_lchan_type chan; uint8_t offset; - struct trx_ts *ts; + struct l1sched_ts *ts; int i; /* Advance TDMA frame number in order to give the transceiver @@ -60,7 +60,7 @@ /* Iterate over timeslot list */ for (i = 0; i < TRX_TS_COUNT; i++) { /* Initialize the buffer for this timeslot */ - br[i] = (struct sched_burst_req) { + br[i] = (struct l1sched_burst_req) { .fn = fn, .tn = i, .pwr = trx->tx_power, @@ -83,14 +83,14 @@ /* Get required info from frame */ br[i].bid = frame->ul_bid; chan = frame->ul_chan; - handler = trx_lchan_desc[chan].tx_fn; + handler = l1sched_lchan_desc[chan].tx_fn; /* Omit lchans without handler */ if (!handler) continue; /* Make sure that lchan was allocated and activated */ - lchan = sched_trx_find_lchan(ts, chan); + lchan = l1sched_find_lchan(ts, chan); if (lchan == NULL) continue; @@ -103,19 +103,19 @@ * attempt to obtain a new one from queue */ if (lchan->prim == NULL) - lchan->prim = sched_prim_dequeue(&ts->tx_prims, fn, lchan); + lchan->prim = l1sched_prim_dequeue(&ts->tx_prims, fn, lchan); /* TODO: report TX buffers health to the higher layers */ /* If CBTX (Continuous Burst Transmission) is assumed */ - if (trx_lchan_desc[chan].flags & TRX_CH_FLAG_CBTX) { + if (l1sched_lchan_desc[chan].flags & L1SCHED_CH_FLAG_CBTX) { /** * Probably, a TX buffer is empty. Nevertheless, * we shall continuously transmit anything on * CBTX channels. */ if (lchan->prim == NULL) - sched_prim_dummy(lchan); + l1sched_prim_dummy(lchan); } /* If there is no primitive, do nothing */ @@ -124,15 +124,15 @@ /* Handover RACH needs to be handled regardless of the * current channel type and the associated handler. */ - if (PRIM_IS_RACH(lchan->prim) && lchan->prim->chan != L1SCHED_RACH) - handler = trx_lchan_desc[L1SCHED_RACH].tx_fn; + if (L1SCHED_PRIM_IS_RACH(lchan->prim) && lchan->prim->chan != L1SCHED_RACH) + handler = l1sched_lchan_desc[L1SCHED_RACH].tx_fn; /* Poke lchan handler */ handler(trx, ts, lchan, &br[i]); /* Perform A5/X burst encryption if required */ if (lchan->a5.algo) - sched_trx_a5_burst_enc(lchan, &br[i]); + l1sched_a5_burst_enc(lchan, &br[i]); } /* Send all bursts for this TDMA frame */ @@ -140,9 +140,9 @@ trx_if_tx_burst(trx, &br[i]); } -int sched_trx_init(struct trx_instance *trx, uint32_t fn_advance) +int l1sched_init(struct trx_instance *trx, uint32_t fn_advance) { - struct trx_sched *sched; + struct l1sched_state *sched; if (!trx) return -EINVAL; @@ -165,7 +165,7 @@ return 0; } -int sched_trx_shutdown(struct trx_instance *trx) +int l1sched_shutdown(struct trx_instance *trx) { int i; @@ -176,12 +176,12 @@ /* Free all potentially allocated timeslots */ for (i = 0; i < TRX_TS_COUNT; i++) - sched_trx_del_ts(trx, i); + l1sched_del_ts(trx, i); return 0; } -int sched_trx_reset(struct trx_instance *trx, bool reset_clock) +int l1sched_reset(struct trx_instance *trx, bool reset_clock) { int i; @@ -193,16 +193,16 @@ /* Free all potentially allocated timeslots */ for (i = 0; i < TRX_TS_COUNT; i++) - sched_trx_del_ts(trx, i); + l1sched_del_ts(trx, i); /* Stop and reset clock counter if required */ if (reset_clock) - sched_clck_reset(&trx->sched); + l1sched_clck_reset(&trx->sched); return 0; } -struct trx_ts *sched_trx_add_ts(struct trx_instance *trx, int tn) +struct l1sched_ts *l1sched_add_ts(struct trx_instance *trx, int tn) { /* Make sure that ts isn't allocated yet */ if (trx->ts_list[tn] != NULL) { @@ -213,7 +213,7 @@ LOGP(DSCH, LOGL_NOTICE, "Add a new TDMA timeslot #%u\n", tn); /* Allocate a new one */ - trx->ts_list[tn] = talloc_zero(trx, struct trx_ts); + trx->ts_list[tn] = talloc_zero(trx, struct l1sched_ts); /* Add backpointer */ trx->ts_list[tn]->trx = trx; @@ -224,10 +224,10 @@ return trx->ts_list[tn]; } -void sched_trx_del_ts(struct trx_instance *trx, int tn) +void l1sched_del_ts(struct trx_instance *trx, int tn) { - struct trx_lchan_state *lchan, *lchan_next; - struct trx_ts *ts; + struct l1sched_lchan_state *lchan, *lchan_next; + struct l1sched_ts *ts; /* Find ts in list */ ts = trx->ts_list[tn]; @@ -237,7 +237,7 @@ LOGP(DSCH, LOGL_NOTICE, "Delete TDMA timeslot #%u\n", tn); /* Deactivate all logical channels */ - sched_trx_deactivate_all_lchans(ts); + l1sched_deactivate_all_lchans(ts); /* Free channel states */ llist_for_each_entry_safe(lchan, lchan_next, &ts->lchans, list) { @@ -246,7 +246,7 @@ } /* Flush queue primitives for TX */ - sched_prim_flush_queue(&ts->tx_prims); + l1sched_prim_flush_queue(&ts->tx_prims); /* Remove ts from list and free memory */ trx->ts_list[tn] = NULL; @@ -259,27 +259,27 @@ #define LAYOUT_HAS_LCHAN(layout, lchan) \ (layout->lchan_mask & ((uint64_t) 0x01 << lchan)) -int sched_trx_configure_ts(struct trx_instance *trx, int tn, +int l1sched_configure_ts(struct trx_instance *trx, int tn, enum gsm_phys_chan_config config) { - struct trx_lchan_state *lchan; + struct l1sched_lchan_state *lchan; enum l1sched_lchan_type type; - struct trx_ts *ts; + struct l1sched_ts *ts; /* Try to find specified ts */ ts = trx->ts_list[tn]; if (ts != NULL) { /* Reconfiguration of existing one */ - sched_trx_reset_ts(trx, tn); + l1sched_reset_ts(trx, tn); } else { /* Allocate a new one if doesn't exist */ - ts = sched_trx_add_ts(trx, tn); + ts = l1sched_add_ts(trx, tn); if (ts == NULL) return -ENOMEM; } /* Choose proper multiframe layout */ - ts->mf_layout = sched_mframe_layout(config, tn); + ts->mf_layout = l1sched_mframe_layout(config, tn); if (!ts->mf_layout) return -EINVAL; if (ts->mf_layout->chan_config != config) @@ -299,7 +299,7 @@ continue; /* Allocate a channel state */ - lchan = talloc_zero(ts, struct trx_lchan_state); + lchan = talloc_zero(ts, struct l1sched_lchan_state); if (!lchan) return -ENOMEM; @@ -313,8 +313,8 @@ llist_add_tail(&lchan->list, &ts->lchans); /* Enable channel automatically if required */ - if (trx_lchan_desc[type].flags & TRX_CH_FLAG_AUTO) - sched_trx_activate_lchan(ts, type); + if (l1sched_lchan_desc[type].flags & L1SCHED_CH_FLAG_AUTO) + l1sched_activate_lchan(ts, type); } /* Notify transceiver about TS activation */ @@ -324,10 +324,10 @@ return 0; } -int sched_trx_reset_ts(struct trx_instance *trx, int tn) +int l1sched_reset_ts(struct trx_instance *trx, int tn) { - struct trx_lchan_state *lchan, *lchan_next; - struct trx_ts *ts; + struct l1sched_lchan_state *lchan, *lchan_next; + struct l1sched_ts *ts; /* Try to find specified ts */ ts = trx->ts_list[tn]; @@ -338,10 +338,10 @@ ts->mf_layout = NULL; /* Flush queue primitives for TX */ - sched_prim_flush_queue(&ts->tx_prims); + l1sched_prim_flush_queue(&ts->tx_prims); /* Deactivate all logical channels */ - sched_trx_deactivate_all_lchans(ts); + l1sched_deactivate_all_lchans(ts); /* Free channel states */ llist_for_each_entry_safe(lchan, lchan_next, &ts->lchans, list) { @@ -355,10 +355,10 @@ return 0; } -int sched_trx_start_ciphering(struct trx_ts *ts, uint8_t algo, +int l1sched_start_ciphering(struct l1sched_ts *ts, uint8_t algo, uint8_t *key, uint8_t key_len) { - struct trx_lchan_state *lchan; + struct l1sched_lchan_state *lchan; /* Prevent NULL-pointer deference */ if (!ts) @@ -386,10 +386,10 @@ return 0; } -struct trx_lchan_state *sched_trx_find_lchan(struct trx_ts *ts, +struct l1sched_lchan_state *l1sched_find_lchan(struct l1sched_ts *ts, enum l1sched_lchan_type chan) { - struct trx_lchan_state *lchan; + struct l1sched_lchan_state *lchan; llist_for_each_entry(lchan, &ts->lchans, list) if (lchan->type == chan) @@ -398,10 +398,10 @@ return NULL; } -int sched_trx_set_lchans(struct trx_ts *ts, uint8_t chan_nr, int active, uint8_t tch_mode) +int l1sched_set_lchans(struct l1sched_ts *ts, uint8_t chan_nr, int active, uint8_t tch_mode) { - const struct trx_lchan_desc *lchan_desc; - struct trx_lchan_state *lchan; + const struct l1sched_lchan_desc *lchan_desc; + struct l1sched_lchan_state *lchan; int rc = 0; /* Prevent NULL-pointer deference */ @@ -412,38 +412,38 @@ /* Iterate over all allocated lchans */ llist_for_each_entry(lchan, &ts->lchans, list) { - lchan_desc = &trx_lchan_desc[lchan->type]; + lchan_desc = &l1sched_lchan_desc[lchan->type]; if (lchan_desc->chan_nr == (chan_nr & 0xf8)) { if (active) { - rc |= sched_trx_activate_lchan(ts, lchan->type); + rc |= l1sched_activate_lchan(ts, lchan->type); lchan->tch_mode = tch_mode; } else - rc |= sched_trx_deactivate_lchan(ts, lchan->type); + rc |= l1sched_deactivate_lchan(ts, lchan->type); } } return rc; } -int sched_trx_activate_lchan(struct trx_ts *ts, enum l1sched_lchan_type chan) +int l1sched_activate_lchan(struct l1sched_ts *ts, enum l1sched_lchan_type chan) { - const struct trx_lchan_desc *lchan_desc = &trx_lchan_desc[chan]; - struct trx_lchan_state *lchan; + const struct l1sched_lchan_desc *lchan_desc = &l1sched_lchan_desc[chan]; + struct l1sched_lchan_state *lchan; /* Try to find requested logical channel */ - lchan = sched_trx_find_lchan(ts, chan); + lchan = l1sched_find_lchan(ts, chan); if (lchan == NULL) return -EINVAL; if (lchan->active) { LOGP(DSCH, LOGL_ERROR, "Logical channel %s already activated " - "on ts=%d\n", trx_lchan_desc[chan].name, ts->index); + "on ts=%d\n", l1sched_lchan_desc[chan].name, ts->index); return -EINVAL; } LOGP(DSCH, LOGL_NOTICE, "Activating lchan=%s " - "on ts=%d\n", trx_lchan_desc[chan].name, ts->index); + "on ts=%d\n", l1sched_lchan_desc[chan].name, ts->index); /* Conditionally allocate memory for bursts */ if (lchan_desc->rx_fn && lchan_desc->burst_buf_size > 0) { @@ -466,17 +466,17 @@ return 0; } -static void sched_trx_reset_lchan(struct trx_lchan_state *lchan) +static void l1sched_reset_lchan(struct l1sched_lchan_state *lchan) { /* Prevent NULL-pointer deference */ OSMO_ASSERT(lchan != NULL); /* Print some TDMA statistics for Downlink */ - if (trx_lchan_desc[lchan->type].rx_fn && lchan->active) { + if (l1sched_lchan_desc[lchan->type].rx_fn && lchan->active) { LOGP(DSCH, LOGL_DEBUG, "TDMA statistics for lchan=%s on ts=%u: " "%lu DL frames have been processed, " "%lu lost (compensated), last fn=%u\n", - trx_lchan_desc[lchan->type].name, lchan->ts->index, + l1sched_lchan_desc[lchan->type].name, lchan->ts->index, lchan->tdma.num_proc, lchan->tdma.num_lost, lchan->tdma.last_proc); } @@ -493,10 +493,10 @@ lchan->tx_bursts = NULL; /* Forget the current prim */ - sched_prim_drop(lchan); + l1sched_prim_drop(lchan); /* Channel specific stuff */ - if (CHAN_IS_TCH(lchan->type)) { + if (L1SCHED_CHAN_IS_TCH(lchan->type)) { lchan->dl_ongoing_facch = 0; lchan->ul_facch_blocks = 0; @@ -504,7 +504,7 @@ /* Reset AMR state */ memset(&lchan->amr, 0x00, sizeof(lchan->amr)); - } else if (CHAN_IS_SACCH(lchan->type)) { + } else if (L1SCHED_CHAN_IS_SACCH(lchan->type)) { /* Reset SACCH state */ memset(&lchan->sacch, 0x00, sizeof(lchan->sacch)); } @@ -516,26 +516,26 @@ memset(&lchan->tdma, 0x00, sizeof(lchan->tdma)); } -int sched_trx_deactivate_lchan(struct trx_ts *ts, enum l1sched_lchan_type chan) +int l1sched_deactivate_lchan(struct l1sched_ts *ts, enum l1sched_lchan_type chan) { - struct trx_lchan_state *lchan; + struct l1sched_lchan_state *lchan; /* Try to find requested logical channel */ - lchan = sched_trx_find_lchan(ts, chan); + lchan = l1sched_find_lchan(ts, chan); if (lchan == NULL) return -EINVAL; if (!lchan->active) { LOGP(DSCH, LOGL_ERROR, "Logical channel %s already deactivated " - "on ts=%d\n", trx_lchan_desc[chan].name, ts->index); + "on ts=%d\n", l1sched_lchan_desc[chan].name, ts->index); return -EINVAL; } LOGP(DSCH, LOGL_DEBUG, "Deactivating lchan=%s " - "on ts=%d\n", trx_lchan_desc[chan].name, ts->index); + "on ts=%d\n", l1sched_lchan_desc[chan].name, ts->index); /* Reset internal state, free memory */ - sched_trx_reset_lchan(lchan); + l1sched_reset_lchan(lchan); /* Update activation flag */ lchan->active = 0; @@ -543,9 +543,9 @@ return 0; } -void sched_trx_deactivate_all_lchans(struct trx_ts *ts) +void l1sched_deactivate_all_lchans(struct l1sched_ts *ts) { - struct trx_lchan_state *lchan; + struct l1sched_lchan_state *lchan; LOGP(DSCH, LOGL_DEBUG, "Deactivating all logical channels " "on ts=%d\n", ts->index); @@ -556,14 +556,14 @@ continue; /* Reset internal state, free memory */ - sched_trx_reset_lchan(lchan); + l1sched_reset_lchan(lchan); /* Update activation flag */ lchan->active = 0; } } -enum gsm_phys_chan_config sched_trx_chan_nr2pchan_config(uint8_t chan_nr) +enum gsm_phys_chan_config l1sched_chan_nr2pchan_config(uint8_t chan_nr) { uint8_t cbits = chan_nr >> 3; @@ -585,21 +585,21 @@ return GSM_PCHAN_NONE; } -enum l1sched_lchan_type sched_trx_chan_nr2lchan_type(uint8_t chan_nr, +enum l1sched_lchan_type l1sched_chan_nr2lchan_type(uint8_t chan_nr, uint8_t link_id) { int i; /* Iterate over all known lchan types */ for (i = 0; i < _L1SCHED_CHAN_MAX; i++) - if (trx_lchan_desc[i].chan_nr == (chan_nr & 0xf8)) - if (trx_lchan_desc[i].link_id == link_id) + if (l1sched_lchan_desc[i].chan_nr == (chan_nr & 0xf8)) + if (l1sched_lchan_desc[i].link_id == link_id) return i; return L1SCHED_IDLE; } -static void sched_trx_a5_burst_dec(struct trx_lchan_state *lchan, +static void l1sched_a5_burst_dec(struct l1sched_lchan_state *lchan, uint32_t fn, sbit_t *burst) { ubit_t ks[114]; @@ -617,8 +617,8 @@ } } -static void sched_trx_a5_burst_enc(struct trx_lchan_state *lchan, - struct sched_burst_req *br) +static void l1sched_a5_burst_enc(struct l1sched_lchan_state *lchan, + struct l1sched_burst_req *br) { ubit_t ks[114]; int i; @@ -633,12 +633,12 @@ } } -static int subst_frame_loss(struct trx_lchan_state *lchan, - trx_lchan_rx_func *handler, +static int subst_frame_loss(struct l1sched_lchan_state *lchan, + l1sched_lchan_rx_func *handler, uint32_t fn) { - const struct trx_multiframe *mf; - const struct trx_frame *fp; + const struct l1sched_tdma_multiframe *mf; + const struct l1sched_tdma_frame *fp; int elapsed, i; /* Wait until at least one TDMA frame is processed */ @@ -662,7 +662,7 @@ * so better drop it. Otherwise we risk to get undefined behavior in handler(). */ LOGP(DSCHD, LOGL_ERROR, "(%s) Rx burst with fn=%u older than the last " "processed fn=%u (see OS#4658) => dropping\n", - trx_lchan_desc[lchan->type].name, + l1sched_lchan_desc[lchan->type].name, fn, lchan->tdma.last_proc); return -EALREADY; } @@ -680,7 +680,7 @@ } static const sbit_t bits[148] = { 0 }; - struct trx_meas_set fake_meas = { + struct l1sched_meas_set fake_meas = { .fn = lchan->tdma.last_proc, .rssi = -120, .toa256 = 0, @@ -693,7 +693,7 @@ continue; LOGP(DSCHD, LOGL_NOTICE, "Substituting lost TDMA frame %u on %s\n", - fake_meas.fn, trx_lchan_desc[lchan->type].name); + fake_meas.fn, l1sched_lchan_desc[lchan->type].name); handler(lchan->ts->trx, lchan->ts, lchan, fake_meas.fn, fp->dl_bid, @@ -708,15 +708,15 @@ return 0; } -int sched_trx_handle_rx_burst(struct trx_instance *trx, uint8_t tn, +int l1sched_handle_rx_burst(struct trx_instance *trx, uint8_t tn, uint32_t fn, sbit_t *bits, uint16_t nbits, - const struct trx_meas_set *meas) + const struct l1sched_meas_set *meas) { - struct trx_lchan_state *lchan; - const struct trx_frame *frame; - struct trx_ts *ts; + struct l1sched_lchan_state *lchan; + const struct l1sched_tdma_frame *frame; + struct l1sched_ts *ts; - trx_lchan_rx_func *handler; + l1sched_lchan_rx_func *handler; enum l1sched_lchan_type chan; uint8_t offset, bid; int rc; @@ -736,7 +736,7 @@ /* Get required info from frame */ bid = frame->dl_bid; chan = frame->dl_chan; - handler = trx_lchan_desc[chan].rx_fn; + handler = l1sched_lchan_desc[chan].rx_fn; /* Omit bursts which have no handler, like IDLE bursts. * TODO: handle noise indications during IDLE frames. */ @@ -744,7 +744,7 @@ return -ENODEV; /* Find required channel state */ - lchan = sched_trx_find_lchan(ts, chan); + lchan = l1sched_find_lchan(ts, chan); if (lchan == NULL) return -ENODEV; @@ -759,7 +759,7 @@ /* Perform A5/X decryption if required */ if (lchan->a5.algo) - sched_trx_a5_burst_dec(lchan, fn, bits); + l1sched_a5_burst_dec(lchan, fn, bits); /* Put burst to handler */ handler(trx, ts, lchan, fn, bid, bits, meas); @@ -786,9 +786,9 @@ (MEAS_HIST_FIRST(hist) + ARRAY_SIZE(hist->buf) - 1) /* Add a new set of measurements to the history */ -void sched_trx_meas_push(struct trx_lchan_state *lchan, const struct trx_meas_set *meas) +void l1sched_lchan_meas_push(struct l1sched_lchan_state *lchan, const struct l1sched_meas_set *meas) { - struct trx_lchan_meas_hist *hist = &lchan->meas_hist; + struct l1sched_lchan_meas_hist *hist = &lchan->meas_hist; /* Find a new position where to store the measurements */ if (hist->head == MEAS_HIST_LAST(hist) || hist->head == NULL) @@ -800,10 +800,10 @@ } /* Calculate the AVG of n measurements from the history */ -void sched_trx_meas_avg(struct trx_lchan_state *lchan, unsigned int n) +void l1sched_lchan_meas_avg(struct l1sched_lchan_state *lchan, unsigned int n) { - struct trx_lchan_meas_hist *hist = &lchan->meas_hist; - struct trx_meas_set *meas = hist->head; + struct l1sched_lchan_meas_hist *hist = &lchan->meas_hist; + struct l1sched_meas_set *meas = hist->head; int toa256_sum = 0; int rssi_sum = 0; int i; diff --git a/src/host/trxcon/src/trx_if.c b/src/host/trxcon/src/trx_if.c index 7528609..e223996 100644 --- a/src/host/trxcon/src/trx_if.c +++ b/src/host/trxcon/src/trx_if.c @@ -571,7 +571,7 @@ static int trx_data_rx_cb(struct osmo_fd *ofd, unsigned int what) { struct trx_instance *trx = ofd->data; - struct trx_meas_set meas; + struct l1sched_meas_set meas; uint8_t buf[TRXD_BUF_SIZE]; sbit_t bits[148]; int8_t rssi, tn; @@ -613,24 +613,24 @@ tn, fn, rssi, toa256); /* Group the measurements together */ - meas = (struct trx_meas_set) { + meas = (struct l1sched_meas_set) { .toa256 = toa256, .rssi = rssi, .fn = fn, }; /* Poke scheduler */ - sched_trx_handle_rx_burst(trx, tn, fn, bits, 148, &meas); + l1sched_handle_rx_burst(trx, tn, fn, bits, 148, &meas); /* Correct local clock counter */ if (fn % 51 == 0) - sched_clck_handle(&trx->sched, fn); + l1sched_clck_handle(&trx->sched, fn); return 0; } int trx_if_tx_burst(struct trx_instance *trx, - const struct sched_burst_req *br) + const struct l1sched_burst_req *br) { uint8_t buf[TRXD_BUF_SIZE]; size_t length; diff --git a/src/host/trxcon/src/trxcon.c b/src/host/trxcon/src/trxcon.c index 998fdde..b47e307 100644 --- a/src/host/trxcon/src/trxcon.c +++ b/src/host/trxcon/src/trxcon.c @@ -93,7 +93,7 @@ if (app_data.trx->fsm->state != TRX_STATE_OFFLINE) { /* Reset scheduler and clock counter */ - sched_trx_reset(app_data.trx, true); + l1sched_reset(app_data.trx, true); /* TODO: implement trx_if_reset() */ trx_if_cmd_poweroff(app_data.trx); @@ -330,7 +330,7 @@ app_data.trx->l1l = app_data.l1l; /* Init scheduler */ - rc = sched_trx_init(app_data.trx, app_data.trx_fn_advance); + rc = l1sched_init(app_data.trx, app_data.trx_fn_advance); if (rc) goto exit; @@ -353,7 +353,7 @@ exit: /* Close active connections */ l1ctl_link_shutdown(app_data.l1l); - sched_trx_shutdown(app_data.trx); + l1sched_shutdown(app_data.trx); trx_if_close(app_data.trx); /* Shutdown main state machine */ -- To view, visit https://gerrit.osmocom.org/c/osmocom-bb/+/28546 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmocom-bb Gerrit-Branch: master Gerrit-Change-Id: I370aa5084a4e3eb94168b96df94dbbee606adaab Gerrit-Change-Number: 28546 Gerrit-PatchSet: 3 Gerrit-Owner: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: laforge <laforge(a)osmocom.org> Gerrit-Reviewer: pespin <pespin(a)sysmocom.de> Gerrit-MessageType: merged

2 years, 11 months

Change in osmocom-bb[master]: trxcon: remove '\brief' marker from the comments

by fixeria

fixeria has submitted this change. ( https://gerrit.osmocom.org/c/osmocom-bb/+/28544 ) Change subject: trxcon: remove '\brief' marker from the comments ...................................................................... trxcon: remove '\brief' marker from the comments This marker is not required to be present in Doxygen comments. Change-Id: If793037e2b2bc9b708617867a4d4ddb0fa2f1ddb --- M src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h M src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h 2 files changed, 72 insertions(+), 72 deletions(-) Approvals: Jenkins Builder: Verified pespin: Looks good to me, but someone else must approve laforge: Looks good to me, approved diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h b/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h index ab8ef34..ad860e9 100644 --- a/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h +++ b/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h @@ -120,63 +120,63 @@ struct sched_burst_req *br); struct trx_lchan_desc { - /*! \brief Human-readable name */ + /*! Human-readable name */ const char *name; - /*! \brief Human-readable description */ + /*! Human-readable description */ const char *desc; - /*! \brief Channel Number (like in RSL) */ + /*! Channel Number (like in RSL) */ uint8_t chan_nr; - /*! \brief Link ID (like in RSL) */ + /*! Link ID (like in RSL) */ uint8_t link_id; - /*! \brief Sub-slot number (for SDCCH and TCH/H) */ + /*! Sub-slot number (for SDCCH and TCH/H) */ uint8_t ss_nr; - /*! \brief GSMTAP channel type (see GSMTAP_CHANNEL_*) */ + /*! GSMTAP channel type (see GSMTAP_CHANNEL_*) */ uint8_t gsmtap_chan_type; - /*! \brief How much memory do we need to store bursts */ + /*! How much memory do we need to store bursts */ size_t burst_buf_size; - /*! \brief Channel specific flags */ + /*! Channel specific flags */ uint8_t flags; - /*! \brief Function to call when burst received from PHY */ + /*! Function to call when burst received from PHY */ trx_lchan_rx_func *rx_fn; - /*! \brief Function to call when data received from L2 */ + /*! Function to call when data received from L2 */ trx_lchan_tx_func *tx_fn; }; struct trx_frame { - /*! \brief Downlink TRX channel type */ + /*! Downlink TRX channel type */ enum trx_lchan_type dl_chan; - /*! \brief Downlink block ID */ + /*! Downlink block ID */ uint8_t dl_bid; - /*! \brief Uplink TRX channel type */ + /*! Uplink TRX channel type */ enum trx_lchan_type ul_chan; - /*! \brief Uplink block ID */ + /*! Uplink block ID */ uint8_t ul_bid; }; struct trx_multiframe { - /*! \brief Channel combination */ + /*! Channel combination */ enum gsm_phys_chan_config chan_config; - /*! \brief Human-readable name */ + /*! Human-readable name */ const char *name; - /*! \brief Repeats how many frames */ + /*! Repeats how many frames */ uint8_t period; - /*! \brief Applies to which timeslots */ + /*! Applies to which timeslots */ uint8_t slotmask; - /*! \brief Contains which lchans */ + /*! Contains which lchans */ uint64_t lchan_mask; - /*! \brief Pointer to scheduling structure */ + /*! Pointer to scheduling structure */ const struct trx_frame *frames; }; struct trx_meas_set { - /*! \brief TDMA frame number of the first burst this set belongs to */ + /*! TDMA frame number of the first burst this set belongs to */ uint32_t fn; - /*! \brief ToA256 (Timing of Arrival, 1/256 of a symbol) */ + /*! ToA256 (Timing of Arrival, 1/256 of a symbol) */ int16_t toa256; - /*! \brief RSSI (Received Signal Strength Indication) */ + /*! RSSI (Received Signal Strength Indication) */ int8_t rssi; }; @@ -188,83 +188,83 @@ /* States each channel on a multiframe */ struct trx_lchan_state { - /*! \brief Channel type */ + /*! Channel type */ enum trx_lchan_type type; - /*! \brief Channel status */ + /*! Channel status */ uint8_t active; - /*! \brief Link to a list of channels */ + /*! Link to a list of channels */ struct llist_head list; - /*! \brief Burst type: GMSK or 8PSK */ + /*! Burst type: GMSK or 8PSK */ enum trx_burst_type burst_type; - /*! \brief Mask of received bursts */ + /*! Mask of received bursts */ uint8_t rx_burst_mask; - /*! \brief Mask of transmitted bursts */ + /*! Mask of transmitted bursts */ uint8_t tx_burst_mask; - /*! \brief Burst buffer for RX */ + /*! Burst buffer for RX */ sbit_t *rx_bursts; - /*! \brief Burst buffer for TX */ + /*! Burst buffer for TX */ ubit_t *tx_bursts; - /*! \brief A primitive being sent */ + /*! A primitive being sent */ struct trx_ts_prim *prim; - /*! \brief Mode for TCH channels (see GSM48_CMODE_*) */ + /*! Mode for TCH channels (see GSM48_CMODE_*) */ uint8_t tch_mode; - /*! \brief FACCH/H on downlink */ + /*! FACCH/H on downlink */ bool dl_ongoing_facch; - /*! \brief pending FACCH/H blocks on Uplink */ + /*! pending FACCH/H blocks on Uplink */ uint8_t ul_facch_blocks; - /*! \brief Downlink measurements history */ + /*! Downlink measurements history */ struct trx_lchan_meas_hist meas_hist; - /*! \brief AVG measurements of the last received block */ + /*! AVG measurements of the last received block */ struct trx_meas_set meas_avg; - /*! \brief TDMA loss detection state */ + /*! TDMA loss detection state */ struct { - /*! \brief Last processed TDMA frame number */ + /*! Last processed TDMA frame number */ uint32_t last_proc; - /*! \brief Number of processed TDMA frames */ + /*! Number of processed TDMA frames */ unsigned long num_proc; - /*! \brief Number of lost TDMA frames */ + /*! Number of lost TDMA frames */ unsigned long num_lost; } tdma; - /*! \brief SACCH state */ + /*! SACCH state */ struct { - /*! \brief Cached measurement report (last received) */ + /*! Cached measurement report (last received) */ uint8_t mr_cache[GSM_MACBLOCK_LEN]; - /*! \brief Cache usage counter */ + /*! Cache usage counter */ uint8_t mr_cache_usage; - /*! \brief Was a MR transmitted last time? */ + /*! Was a MR transmitted last time? */ bool mr_tx_last; } sacch; /* AMR specific */ struct { - /*! \brief 4 possible codecs for AMR */ + /*! 4 possible codecs for AMR */ uint8_t codec[4]; - /*! \brief Number of possible codecs */ + /*! Number of possible codecs */ uint8_t codecs; - /*! \brief Current uplink FT index */ + /*! Current uplink FT index */ uint8_t ul_ft; - /*! \brief Current downlink FT index */ + /*! Current downlink FT index */ uint8_t dl_ft; - /*! \brief Current uplink CMR index */ + /*! Current uplink CMR index */ uint8_t ul_cmr; - /*! \brief Current downlink CMR index */ + /*! Current downlink CMR index */ uint8_t dl_cmr; - /*! \brief If AMR loop is enabled */ + /*! If AMR loop is enabled */ uint8_t amr_loop; - /*! \brief Number of bit error rates */ + /*! Number of bit error rates */ uint8_t ber_num; - /*! \brief Sum of bit error rates */ + /*! Sum of bit error rates */ float ber_sum; } amr; - /*! \brief A5/X encryption state */ + /*! A5/X encryption state */ struct { uint8_t key[MAX_A5_KEY_LEN]; uint8_t key_len; @@ -276,14 +276,14 @@ }; struct trx_ts { - /*! \brief Timeslot index within a frame (0..7) */ + /*! Timeslot index within a frame (0..7) */ uint8_t index; - /*! \brief Pointer to multiframe layout */ + /*! Pointer to multiframe layout */ const struct trx_multiframe *mf_layout; - /*! \brief Channel states for logical channels */ + /*! Channel states for logical channels */ struct llist_head lchans; - /*! \brief Queue primitives for TX */ + /*! Queue primitives for TX */ struct llist_head tx_prims; /* backpointer to its TRX */ struct trx_instance *trx; @@ -291,13 +291,13 @@ /* Represents one TX primitive in the queue of trx_ts */ struct trx_ts_prim { - /*! \brief Link to queue of TS */ + /*! Link to queue of TS */ struct llist_head list; - /*! \brief Logical channel type */ + /*! Logical channel type */ enum trx_lchan_type chan; - /*! \brief Payload length */ + /*! Payload length */ size_t payload_len; - /*! \brief Payload */ + /*! Payload */ uint8_t payload[0]; }; diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h b/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h index 43127cc..a7e3fd9 100644 --- a/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h +++ b/src/host/trxcon/include/osmocom/bb/trxcon/scheduler.h @@ -14,23 +14,23 @@ /* Forward structure declaration */ struct trx_sched; -/*! \brief One scheduler instance */ +/*! One scheduler instance */ struct trx_sched { - /*! \brief Clock state */ + /*! Clock state */ enum tdma_sched_clck_state state; - /*! \brief Local clock source */ + /*! Local clock source */ struct timespec clock; - /*! \brief Count of processed frames */ + /*! Count of processed frames */ uint32_t fn_counter_proc; - /*! \brief Local frame counter advance */ + /*! Local frame counter advance */ uint32_t fn_counter_advance; - /*! \brief Count of lost frames */ + /*! Count of lost frames */ uint32_t fn_counter_lost; - /*! \brief Frame callback timer */ + /*! Frame callback timer */ struct osmo_timer_list clock_timer; - /*! \brief Frame callback */ + /*! Frame callback */ void (*clock_cb)(struct trx_sched *sched); - /*! \brief Private data (e.g. pointer to trx instance) */ + /*! Private data (e.g. pointer to trx instance) */ void *data; }; -- To view, visit https://gerrit.osmocom.org/c/osmocom-bb/+/28544 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmocom-bb Gerrit-Branch: master Gerrit-Change-Id: If793037e2b2bc9b708617867a4d4ddb0fa2f1ddb Gerrit-Change-Number: 28544 Gerrit-PatchSet: 1 Gerrit-Owner: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: laforge <laforge(a)osmocom.org> Gerrit-Reviewer: pespin <pespin(a)sysmocom.de> Gerrit-MessageType: merged

2 years, 11 months

Change in osmocom-bb[master]: trxcon: rename 'enum trx_lchan_type' and its items

by fixeria

fixeria has submitted this change. ( https://gerrit.osmocom.org/c/osmocom-bb/+/28545 ) Change subject: trxcon: rename 'enum trx_lchan_type' and its items ...................................................................... trxcon: rename 'enum trx_lchan_type' and its items Change-Id: I76a7d9fed3d6ab47725fceb803aa16ddbfd2e1a2 Related: OS#5599, OS#3761 --- M src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h M src/host/trxcon/src/sched_lchan_common.c M src/host/trxcon/src/sched_lchan_desc.c M src/host/trxcon/src/sched_lchan_tchh.c M src/host/trxcon/src/sched_mframe.c M src/host/trxcon/src/sched_prim.c M src/host/trxcon/src/sched_trx.c 7 files changed, 2,016 insertions(+), 2,016 deletions(-) Approvals: Jenkins Builder: Verified pespin: Looks good to me, but someone else must approve laforge: Looks good to me, but someone else must approve fixeria: Looks good to me, approved diff --git a/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h b/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h index ad860e9..9a14844 100644 --- a/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h +++ b/src/host/trxcon/include/osmocom/bb/trxcon/sched_trx.h @@ -53,48 +53,48 @@ * These types define the different channels on a multiframe. * Each channel has queues and can be activated individually. */ -enum trx_lchan_type { - TRXC_IDLE = 0, - TRXC_FCCH, - TRXC_SCH, - TRXC_BCCH, - TRXC_RACH, - TRXC_CCCH, - TRXC_TCHF, - TRXC_TCHH_0, - TRXC_TCHH_1, - TRXC_SDCCH4_0, - TRXC_SDCCH4_1, - TRXC_SDCCH4_2, - TRXC_SDCCH4_3, - TRXC_SDCCH8_0, - TRXC_SDCCH8_1, - TRXC_SDCCH8_2, - TRXC_SDCCH8_3, - TRXC_SDCCH8_4, - TRXC_SDCCH8_5, - TRXC_SDCCH8_6, - TRXC_SDCCH8_7, - TRXC_SACCHTF, - TRXC_SACCHTH_0, - TRXC_SACCHTH_1, - TRXC_SACCH4_0, - TRXC_SACCH4_1, - TRXC_SACCH4_2, - TRXC_SACCH4_3, - TRXC_SACCH8_0, - TRXC_SACCH8_1, - TRXC_SACCH8_2, - TRXC_SACCH8_3, - TRXC_SACCH8_4, - TRXC_SACCH8_5, - TRXC_SACCH8_6, - TRXC_SACCH8_7, - TRXC_PDTCH, - TRXC_PTCCH, - TRXC_SDCCH4_CBCH, - TRXC_SDCCH8_CBCH, - _TRX_CHAN_MAX +enum l1sched_lchan_type { + L1SCHED_IDLE = 0, + L1SCHED_FCCH, + L1SCHED_SCH, + L1SCHED_BCCH, + L1SCHED_RACH, + L1SCHED_CCCH, + L1SCHED_TCHF, + L1SCHED_TCHH_0, + L1SCHED_TCHH_1, + L1SCHED_SDCCH4_0, + L1SCHED_SDCCH4_1, + L1SCHED_SDCCH4_2, + L1SCHED_SDCCH4_3, + L1SCHED_SDCCH8_0, + L1SCHED_SDCCH8_1, + L1SCHED_SDCCH8_2, + L1SCHED_SDCCH8_3, + L1SCHED_SDCCH8_4, + L1SCHED_SDCCH8_5, + L1SCHED_SDCCH8_6, + L1SCHED_SDCCH8_7, + L1SCHED_SACCHTF, + L1SCHED_SACCHTH_0, + L1SCHED_SACCHTH_1, + L1SCHED_SACCH4_0, + L1SCHED_SACCH4_1, + L1SCHED_SACCH4_2, + L1SCHED_SACCH4_3, + L1SCHED_SACCH8_0, + L1SCHED_SACCH8_1, + L1SCHED_SACCH8_2, + L1SCHED_SACCH8_3, + L1SCHED_SACCH8_4, + L1SCHED_SACCH8_5, + L1SCHED_SACCH8_6, + L1SCHED_SACCH8_7, + L1SCHED_PDTCH, + L1SCHED_PTCCH, + L1SCHED_SDCCH4_CBCH, + L1SCHED_SDCCH8_CBCH, + _L1SCHED_CHAN_MAX }; /* Represents a burst to be transmitted */ @@ -146,12 +146,12 @@ }; struct trx_frame { - /*! Downlink TRX channel type */ - enum trx_lchan_type dl_chan; + /*! Downlink channel (slot) type */ + enum l1sched_lchan_type dl_chan; /*! Downlink block ID */ uint8_t dl_bid; - /*! Uplink TRX channel type */ - enum trx_lchan_type ul_chan; + /*! Uplink channel (slot) type */ + enum l1sched_lchan_type ul_chan; /*! Uplink block ID */ uint8_t ul_bid; }; @@ -189,7 +189,7 @@ /* States each channel on a multiframe */ struct trx_lchan_state { /*! Channel type */ - enum trx_lchan_type type; + enum l1sched_lchan_type type; /*! Channel status */ uint8_t active; /*! Link to a list of channels */ @@ -294,14 +294,14 @@ /*! Link to queue of TS */ struct llist_head list; /*! Logical channel type */ - enum trx_lchan_type chan; + enum l1sched_lchan_type chan; /*! Payload length */ size_t payload_len; /*! Payload */ uint8_t payload[0]; }; -extern const struct trx_lchan_desc trx_lchan_desc[_TRX_CHAN_MAX]; +extern const struct trx_lchan_desc trx_lchan_desc[_L1SCHED_CHAN_MAX]; const struct trx_multiframe *sched_mframe_layout( enum gsm_phys_chan_config config, int tn); @@ -321,15 +321,15 @@ /* Logical channel management functions */ enum gsm_phys_chan_config sched_trx_chan_nr2pchan_config(uint8_t chan_nr); -enum trx_lchan_type sched_trx_chan_nr2lchan_type(uint8_t chan_nr, +enum l1sched_lchan_type sched_trx_chan_nr2lchan_type(uint8_t chan_nr, uint8_t link_id); void sched_trx_deactivate_all_lchans(struct trx_ts *ts); int sched_trx_set_lchans(struct trx_ts *ts, uint8_t chan_nr, int active, uint8_t tch_mode); -int sched_trx_activate_lchan(struct trx_ts *ts, enum trx_lchan_type chan); -int sched_trx_deactivate_lchan(struct trx_ts *ts, enum trx_lchan_type chan); +int sched_trx_activate_lchan(struct trx_ts *ts, enum l1sched_lchan_type chan); +int sched_trx_deactivate_lchan(struct trx_ts *ts, enum l1sched_lchan_type chan); struct trx_lchan_state *sched_trx_find_lchan(struct trx_ts *ts, - enum trx_lchan_type chan); + enum l1sched_lchan_type chan); /* Primitive management functions */ int sched_prim_init(void *ctx, struct trx_ts_prim **prim, @@ -349,7 +349,7 @@ || mode == GSM48_CMODE_DATA_3k6) #define CHAN_IS_TCH(chan) \ - (chan == TRXC_TCHF || chan == TRXC_TCHH_0 || chan == TRXC_TCHH_1) + (chan == L1SCHED_TCHF || chan == L1SCHED_TCHH_0 || chan == L1SCHED_TCHH_1) #define CHAN_IS_SACCH(chan) \ (trx_lchan_desc[chan].link_id & TRX_CH_LID_SACCH) @@ -390,14 +390,14 @@ int bit_error_count, bool dec_failed, bool traffic); int sched_send_dt_conf(struct trx_instance *trx, struct trx_ts *ts, struct trx_lchan_state *lchan, uint32_t fn, bool traffic); -int sched_gsmtap_send(enum trx_lchan_type lchan_type, uint32_t fn, uint8_t tn, +int sched_gsmtap_send(enum l1sched_lchan_type lchan_type, uint32_t fn, uint8_t tn, uint16_t band_arfcn, int8_t signal_dbm, uint8_t snr, const uint8_t *data, size_t data_len); /* Interleaved TCH/H block TDMA frame mapping */ -uint32_t sched_tchh_block_dl_first_fn(enum trx_lchan_type chan, +uint32_t sched_tchh_block_dl_first_fn(enum l1sched_lchan_type chan, uint32_t last_fn, bool facch); -bool sched_tchh_block_map_fn(enum trx_lchan_type chan, +bool sched_tchh_block_map_fn(enum l1sched_lchan_type chan, uint32_t fn, bool ul, bool facch, bool start); #define sched_tchh_traffic_start(chan, fn, ul) \ diff --git a/src/host/trxcon/src/sched_lchan_common.c b/src/host/trxcon/src/sched_lchan_common.c index f5ee866..e0d0091 100644 --- a/src/host/trxcon/src/sched_lchan_common.c +++ b/src/host/trxcon/src/sched_lchan_common.c @@ -99,7 +99,7 @@ return buf; } -int sched_gsmtap_send(enum trx_lchan_type lchan_type, uint32_t fn, uint8_t tn, +int sched_gsmtap_send(enum l1sched_lchan_type lchan_type, uint32_t fn, uint8_t tn, uint16_t band_arfcn, int8_t signal_dbm, uint8_t snr, const uint8_t *data, size_t data_len) { @@ -202,7 +202,7 @@ { switch (lchan->tch_mode) { case GSM48_CMODE_SPEECH_V1: - if (lchan->type == TRXC_TCHF) { /* Full Rate */ + if (lchan->type == L1SCHED_TCHF) { /* Full Rate */ memset(l2, 0x00, GSM_FR_BYTES); l2[0] = 0xd0; return GSM_FR_BYTES; diff --git a/src/host/trxcon/src/sched_lchan_desc.c b/src/host/trxcon/src/sched_lchan_desc.c index ed7b141..95fd3c3 100644 --- a/src/host/trxcon/src/sched_lchan_desc.c +++ b/src/host/trxcon/src/sched_lchan_desc.c @@ -69,19 +69,19 @@ struct trx_lchan_state *lchan, struct sched_burst_req *br); -const struct trx_lchan_desc trx_lchan_desc[_TRX_CHAN_MAX] = { - [TRXC_IDLE] = { +const struct trx_lchan_desc trx_lchan_desc[_L1SCHED_CHAN_MAX] = { + [L1SCHED_IDLE] = { .name = "IDLE", .desc = "Idle channel", /* The MS needs to perform neighbour measurements during * IDLE slots, however this is not implemented (yet). */ }, - [TRXC_FCCH] = { + [L1SCHED_FCCH] = { .name = "FCCH", /* 3GPP TS 05.02, section 3.3.2.1 */ .desc = "Frequency correction channel", /* Handled by transceiver, nothing to do. */ }, - [TRXC_SCH] = { + [L1SCHED_SCH] = { .name = "SCH", /* 3GPP TS 05.02, section 3.3.2.2 */ .desc = "Synchronization channel", @@ -90,7 +90,7 @@ .flags = TRX_CH_FLAG_AUTO, .rx_fn = rx_sch_fn, }, - [TRXC_BCCH] = { + [L1SCHED_BCCH] = { .name = "BCCH", /* 3GPP TS 05.02, section 3.3.2.3 */ .desc = "Broadcast control channel", .gsmtap_chan_type = GSMTAP_CHANNEL_BCCH, @@ -103,7 +103,7 @@ .flags = TRX_CH_FLAG_AUTO, .rx_fn = rx_data_fn, }, - [TRXC_RACH] = { + [L1SCHED_RACH] = { .name = "RACH", /* 3GPP TS 05.02, section 3.3.3.1 */ .desc = "Random access channel", .gsmtap_chan_type = GSMTAP_CHANNEL_RACH, @@ -113,7 +113,7 @@ .flags = TRX_CH_FLAG_AUTO, .tx_fn = tx_rach_fn, }, - [TRXC_CCCH] = { + [L1SCHED_CCCH] = { .name = "CCCH", /* 3GPP TS 05.02, section 3.3.3.1 */ .desc = "Common control channel", .gsmtap_chan_type = GSMTAP_CHANNEL_CCCH, @@ -126,7 +126,7 @@ .flags = TRX_CH_FLAG_AUTO, .rx_fn = rx_data_fn, }, - [TRXC_TCHF] = { + [L1SCHED_TCHF] = { .name = "TCH/F", /* 3GPP TS 05.02, section 3.2 */ .desc = "Full Rate traffic channel", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_F, @@ -149,7 +149,7 @@ .rx_fn = rx_tchf_fn, .tx_fn = tx_tchf_fn, }, - [TRXC_TCHH_0] = { + [L1SCHED_TCHH_0] = { .name = "TCH/H(0)", /* 3GPP TS 05.02, section 3.2 */ .desc = "Half Rate traffic channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_H, @@ -178,7 +178,7 @@ .rx_fn = rx_tchh_fn, .tx_fn = tx_tchh_fn, }, - [TRXC_TCHH_1] = { + [L1SCHED_TCHH_1] = { .name = "TCH/H(1)", /* 3GPP TS 05.02, section 3.2 */ .desc = "Half Rate traffic channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_H, @@ -186,13 +186,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 1, - /* Same as for TRXC_TCHH_0, see above. */ + /* Same as for L1SCHED_TCHH_0, see above. */ .burst_buf_size = 6 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_tchh_fn, .tx_fn = tx_tchh_fn, }, - [TRXC_SDCCH4_0] = { + [L1SCHED_SDCCH4_0] = { .name = "SDCCH/4(0)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4, @@ -200,13 +200,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 0, - /* Same as for TRXC_BCCH (xCCH), see above. */ + /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH4_1] = { + [L1SCHED_SDCCH4_1] = { .name = "SDCCH/4(1)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4, @@ -214,13 +214,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 1, - /* Same as for TRXC_BCCH (xCCH), see above. */ + /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH4_2] = { + [L1SCHED_SDCCH4_2] = { .name = "SDCCH/4(2)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 2)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4, @@ -228,13 +228,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 2, - /* Same as for TRXC_BCCH (xCCH), see above. */ + /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH4_3] = { + [L1SCHED_SDCCH4_3] = { .name = "SDCCH/4(3)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 3)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4, @@ -242,13 +242,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 3, - /* Same as for TRXC_BCCH (xCCH), see above. */ + /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH8_0] = { + [L1SCHED_SDCCH8_0] = { .name = "SDCCH/8(0)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, @@ -256,13 +256,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 0, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH8_1] = { + [L1SCHED_SDCCH8_1] = { .name = "SDCCH/8(1)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, @@ -270,13 +270,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 1, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH8_2] = { + [L1SCHED_SDCCH8_2] = { .name = "SDCCH/8(2)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 2)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, @@ -284,13 +284,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 2, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH8_3] = { + [L1SCHED_SDCCH8_3] = { .name = "SDCCH/8(3)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 3)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, @@ -298,13 +298,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 3, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH8_4] = { + [L1SCHED_SDCCH8_4] = { .name = "SDCCH/8(4)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 4)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, @@ -312,13 +312,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 4, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH8_5] = { + [L1SCHED_SDCCH8_5] = { .name = "SDCCH/8(5)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 5)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, @@ -326,13 +326,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 5, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH8_6] = { + [L1SCHED_SDCCH8_6] = { .name = "SDCCH/8(6)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 6)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, @@ -340,13 +340,13 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 6, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SDCCH8_7] = { + [L1SCHED_SDCCH8_7] = { .name = "SDCCH/8(7)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Stand-alone dedicated control channel (sub-channel 7)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8, @@ -354,26 +354,26 @@ .link_id = TRX_CH_LID_DEDIC, .ss_nr = 7, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCHTF] = { + [L1SCHED_SACCHTF] = { .name = "SACCH/TF", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow TCH/F associated control channel", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_F | GSMTAP_CHANNEL_ACCH, .chan_nr = RSL_CHAN_Bm_ACCHs, .link_id = TRX_CH_LID_SACCH, - /* Same as for TRXC_BCCH (xCCH), see above. */ + /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCHTH_0] = { + [L1SCHED_SACCHTH_0] = { .name = "SACCH/TH(0)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow TCH/H associated control channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_H | GSMTAP_CHANNEL_ACCH, @@ -381,13 +381,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 0, - /* Same as for TRXC_BCCH (xCCH), see above. */ + /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCHTH_1] = { + [L1SCHED_SACCHTH_1] = { .name = "SACCH/TH(1)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow TCH/H associated control channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_TCH_H | GSMTAP_CHANNEL_ACCH, @@ -395,13 +395,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 1, - /* Same as for TRXC_BCCH (xCCH), see above. */ + /* Same as for L1SCHED_BCCH (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH4_0] = { + [L1SCHED_SACCH4_0] = { .name = "SACCH/4(0)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/4 associated control channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4 | GSMTAP_CHANNEL_ACCH, @@ -409,13 +409,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 0, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH4_1] = { + [L1SCHED_SACCH4_1] = { .name = "SACCH/4(1)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/4 associated control channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4 | GSMTAP_CHANNEL_ACCH, @@ -423,13 +423,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 1, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH4_2] = { + [L1SCHED_SACCH4_2] = { .name = "SACCH/4(2)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/4 associated control channel (sub-channel 2)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4 | GSMTAP_CHANNEL_ACCH, @@ -437,13 +437,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 2, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH4_3] = { + [L1SCHED_SACCH4_3] = { .name = "SACCH/4(3)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/4 associated control channel (sub-channel 3)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH4 | GSMTAP_CHANNEL_ACCH, @@ -451,13 +451,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 3, - /* Same as for TRXC_BCCH and TRXC_SDCCH4_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH4_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH8_0] = { + [L1SCHED_SACCH8_0] = { .name = "SACCH/8(0)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/8 associated control channel (sub-channel 0)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, @@ -465,13 +465,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 0, - /* Same as for TRXC_BCCH and TRXC_SDCCH8_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH8_1] = { + [L1SCHED_SACCH8_1] = { .name = "SACCH/8(1)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/8 associated control channel (sub-channel 1)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, @@ -479,13 +479,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 1, - /* Same as for TRXC_BCCH and TRXC_SDCCH8_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH8_2] = { + [L1SCHED_SACCH8_2] = { .name = "SACCH/8(2)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/8 associated control channel (sub-channel 2)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, @@ -493,13 +493,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 2, - /* Same as for TRXC_BCCH and TRXC_SDCCH8_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH8_3] = { + [L1SCHED_SACCH8_3] = { .name = "SACCH/8(3)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/8 associated control channel (sub-channel 3)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, @@ -507,13 +507,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 3, - /* Same as for TRXC_BCCH and TRXC_SDCCH8_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH8_4] = { + [L1SCHED_SACCH8_4] = { .name = "SACCH/8(4)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/8 associated control channel (sub-channel 4)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, @@ -521,13 +521,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 4, - /* Same as for TRXC_BCCH and TRXC_SDCCH8_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH8_5] = { + [L1SCHED_SACCH8_5] = { .name = "SACCH/8(5)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/8 associated control channel (sub-channel 5)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, @@ -535,13 +535,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 5, - /* Same as for TRXC_BCCH and TRXC_SDCCH8_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH8_6] = { + [L1SCHED_SACCH8_6] = { .name = "SACCH/8(6)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/8 associated control channel (sub-channel 6)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, @@ -549,13 +549,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 6, - /* Same as for TRXC_BCCH and TRXC_SDCCH8_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_SACCH8_7] = { + [L1SCHED_SACCH8_7] = { .name = "SACCH/8(7)", /* 3GPP TS 05.02, section 3.3.4.1 */ .desc = "Slow SDCCH/8 associated control channel (sub-channel 7)", .gsmtap_chan_type = GSMTAP_CHANNEL_SDCCH8 | GSMTAP_CHANNEL_ACCH, @@ -563,13 +563,13 @@ .link_id = TRX_CH_LID_SACCH, .ss_nr = 7, - /* Same as for TRXC_BCCH and TRXC_SDCCH8_* (xCCH), see above. */ + /* Same as for L1SCHED_BCCH and L1SCHED_SDCCH8_* (xCCH), see above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_CBTX, .rx_fn = rx_data_fn, .tx_fn = tx_data_fn, }, - [TRXC_PDTCH] = { + [L1SCHED_PDTCH] = { .name = "PDTCH", /* 3GPP TS 05.02, sections 3.2.4, 3.3.2.4 */ .desc = "Packet data traffic & control channel", .gsmtap_chan_type = GSMTAP_CHANNEL_PDTCH, @@ -584,7 +584,7 @@ .rx_fn = rx_pdtch_fn, .tx_fn = tx_pdtch_fn, }, - [TRXC_PTCCH] = { + [L1SCHED_PTCCH] = { .name = "PTCCH", /* 3GPP TS 05.02, section 3.3.4.2 */ .desc = "Packet Timing advance control channel", .gsmtap_chan_type = GSMTAP_CHANNEL_PTCCH, @@ -601,26 +601,26 @@ .rx_fn = rx_pdtch_fn, .tx_fn = tx_rach_fn, }, - [TRXC_SDCCH4_CBCH] = { + [L1SCHED_SDCCH4_CBCH] = { .name = "SDCCH/4(CBCH)", /* 3GPP TS 05.02, section 3.3.5 */ .desc = "Cell Broadcast channel on SDCCH/4", .gsmtap_chan_type = GSMTAP_CHANNEL_CBCH51, .chan_nr = RSL_CHAN_OSMO_CBCH4, .ss_nr = 2, - /* Same as for TRXC_BCCH (xCCH), but Rx only. See above. */ + /* Same as for L1SCHED_BCCH (xCCH), but Rx only. See above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .flags = TRX_CH_FLAG_AUTO, .rx_fn = rx_data_fn, }, - [TRXC_SDCCH8_CBCH] = { + [L1SCHED_SDCCH8_CBCH] = { .name = "SDCCH/8(CBCH)", /* 3GPP TS 05.02, section 3.3.5 */ .desc = "Cell Broadcast channel on SDCCH/8", .gsmtap_chan_type = GSMTAP_CHANNEL_CBCH52, .chan_nr = RSL_CHAN_OSMO_CBCH8, .ss_nr = 2, - /* Same as for TRXC_BCCH (xCCH), but Rx only. See above. */ + /* Same as for L1SCHED_BCCH (xCCH), but Rx only. See above. */ .burst_buf_size = 4 * GSM_BURST_PL_LEN, .rx_fn = rx_data_fn, }, diff --git a/src/host/trxcon/src/sched_lchan_tchh.c b/src/host/trxcon/src/sched_lchan_tchh.c index 3be3a59..673e5ea 100644 --- a/src/host/trxcon/src/sched_lchan_tchh.c +++ b/src/host/trxcon/src/sched_lchan_tchh.c @@ -90,21 +90,21 @@ * * See GSM 05.02, clause 7, table 1 * - * @param chan channel type (TRXC_TCHH_0 or TRXC_TCHH_1) + * @param chan channel type (L1SCHED_TCHH_0 or L1SCHED_TCHH_1) * @param fn the current frame number * @param ul Uplink or Downlink? * @param facch FACCH/H or traffic? * @param start init or end of transmission? * @return true (yes) or false (no) */ -bool sched_tchh_block_map_fn(enum trx_lchan_type chan, +bool sched_tchh_block_map_fn(enum l1sched_lchan_type chan, uint32_t fn, bool ul, bool facch, bool start) { uint8_t fn_mf; int i = 0; /* Just to be sure */ - OSMO_ASSERT(chan == TRXC_TCHH_0 || chan == TRXC_TCHH_1); + OSMO_ASSERT(chan == L1SCHED_TCHH_0 || chan == L1SCHED_TCHH_1); /* Calculate a modulo */ fn_mf = facch ? (fn % 26) : (fn % 13); @@ -121,18 +121,18 @@ /* Choose a proper block map */ if (facch) { if (ul) { - if (chan == TRXC_TCHH_0) + if (chan == L1SCHED_TCHH_0) BLOCK_MAP_FN(tch_h0_ul_facch_block_map); else BLOCK_MAP_FN(tch_h1_ul_facch_block_map); } else { - if (chan == TRXC_TCHH_0) + if (chan == L1SCHED_TCHH_0) BLOCK_MAP_FN(tch_h0_dl_facch_block_map); else BLOCK_MAP_FN(tch_h1_dl_facch_block_map); } } else { - if (chan == TRXC_TCHH_0) + if (chan == L1SCHED_TCHH_0) BLOCK_MAP_FN(tch_h0_traffic_block_map); else BLOCK_MAP_FN(tch_h1_traffic_block_map); @@ -147,20 +147,20 @@ * * See GSM 05.02, clause 7, table 1 * - * @param chan channel type (TRXC_TCHH_0 or TRXC_TCHH_1) + * @param chan channel type (L1SCHED_TCHH_0 or L1SCHED_TCHH_1) * @param last_fn frame number of the last burst * @param facch FACCH/H or traffic? * @return either frame number of the first burst, * or fn=last_fn if calculation failed */ -uint32_t sched_tchh_block_dl_first_fn(enum trx_lchan_type chan, +uint32_t sched_tchh_block_dl_first_fn(enum l1sched_lchan_type chan, uint32_t last_fn, bool facch) { uint8_t fn_mf, fn_diff; int i = 0; /* Just to be sure */ - OSMO_ASSERT(chan == TRXC_TCHH_0 || chan == TRXC_TCHH_1); + OSMO_ASSERT(chan == L1SCHED_TCHH_0 || chan == L1SCHED_TCHH_1); /* Calculate a modulo */ fn_mf = facch ? (last_fn % 26) : (last_fn % 13); @@ -175,12 +175,12 @@ /* Choose a proper block map */ if (facch) { - if (chan == TRXC_TCHH_0) + if (chan == L1SCHED_TCHH_0) BLOCK_FIRST_FN(tch_h0_dl_facch_block_map); else BLOCK_FIRST_FN(tch_h1_dl_facch_block_map); } else { - if (chan == TRXC_TCHH_0) + if (chan == L1SCHED_TCHH_0) BLOCK_FIRST_FN(tch_h0_traffic_block_map); else BLOCK_FIRST_FN(tch_h1_traffic_block_map); diff --git a/src/host/trxcon/src/sched_mframe.c b/src/host/trxcon/src/sched_mframe.c index f5fb6c9..e8125ea 100644 --- a/src/host/trxcon/src/sched_mframe.c +++ b/src/host/trxcon/src/sched_mframe.c @@ -29,1891 +29,1891 @@ /* Non-combined CCCH */ static const struct trx_frame frame_bcch[51] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_BCCH, 0, TRXC_RACH, 0 }, - { TRXC_BCCH, 1, TRXC_RACH, 0 }, - { TRXC_BCCH, 2, TRXC_RACH, 0 }, - { TRXC_BCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_IDLE, 0, TRXC_RACH, 0 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_BCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_BCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_BCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_BCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_IDLE, 0, L1SCHED_RACH, 0 }, }; /* Combined CCCH+SDCCH4 */ static const struct trx_frame frame_bcch_sdcch4[102] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_FCCH, 0, TRXC_SDCCH4_3, 0 }, - { TRXC_SCH, 0, TRXC_SDCCH4_3, 1 }, - { TRXC_BCCH, 0, TRXC_SDCCH4_3, 2 }, - { TRXC_BCCH, 1, TRXC_SDCCH4_3, 3 }, - { TRXC_BCCH, 2, TRXC_RACH, 0 }, - { TRXC_BCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_SACCH4_2, 0 }, - { TRXC_CCCH, 1, TRXC_SACCH4_2, 1 }, - { TRXC_CCCH, 2, TRXC_SACCH4_2, 2 }, - { TRXC_CCCH, 3, TRXC_SACCH4_2, 3 }, - { TRXC_FCCH, 0, TRXC_SACCH4_3, 0 }, - { TRXC_SCH, 0, TRXC_SACCH4_3, 1 }, - { TRXC_CCCH, 0, TRXC_SACCH4_3, 2 }, - { TRXC_CCCH, 1, TRXC_SACCH4_3, 3 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 3, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_2, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_2, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_2, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_2, 3, TRXC_RACH, 0 }, - { TRXC_SDCCH4_3, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_3, 1, TRXC_SDCCH4_0, 0 }, - { TRXC_SDCCH4_3, 2, TRXC_SDCCH4_0, 1 }, - { TRXC_SDCCH4_3, 3, TRXC_SDCCH4_0, 2 }, - { TRXC_FCCH, 0, TRXC_SDCCH4_0, 3 }, - { TRXC_SCH, 0, TRXC_SDCCH4_1, 0 }, - { TRXC_SACCH4_0, 0, TRXC_SDCCH4_1, 1 }, - { TRXC_SACCH4_0, 1, TRXC_SDCCH4_1, 2 }, - { TRXC_SACCH4_0, 2, TRXC_SDCCH4_1, 3 }, - { TRXC_SACCH4_0, 3, TRXC_RACH, 0 }, - { TRXC_SACCH4_1, 0, TRXC_RACH, 0 }, - { TRXC_SACCH4_1, 1, TRXC_SDCCH4_2, 0 }, - { TRXC_SACCH4_1, 2, TRXC_SDCCH4_2, 1 }, - { TRXC_SACCH4_1, 3, TRXC_SDCCH4_2, 2 }, - { TRXC_IDLE, 0, TRXC_SDCCH4_2, 3 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_FCCH, 0, L1SCHED_SDCCH4_3, 0 }, + { L1SCHED_SCH, 0, L1SCHED_SDCCH4_3, 1 }, + { L1SCHED_BCCH, 0, L1SCHED_SDCCH4_3, 2 }, + { L1SCHED_BCCH, 1, L1SCHED_SDCCH4_3, 3 }, + { L1SCHED_BCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_BCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_SACCH4_2, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_SACCH4_2, 1 }, + { L1SCHED_CCCH, 2, L1SCHED_SACCH4_2, 2 }, + { L1SCHED_CCCH, 3, L1SCHED_SACCH4_2, 3 }, + { L1SCHED_FCCH, 0, L1SCHED_SACCH4_3, 0 }, + { L1SCHED_SCH, 0, L1SCHED_SACCH4_3, 1 }, + { L1SCHED_CCCH, 0, L1SCHED_SACCH4_3, 2 }, + { L1SCHED_CCCH, 1, L1SCHED_SACCH4_3, 3 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_2, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_2, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_2, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_2, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_3, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_3, 1, L1SCHED_SDCCH4_0, 0 }, + { L1SCHED_SDCCH4_3, 2, L1SCHED_SDCCH4_0, 1 }, + { L1SCHED_SDCCH4_3, 3, L1SCHED_SDCCH4_0, 2 }, + { L1SCHED_FCCH, 0, L1SCHED_SDCCH4_0, 3 }, + { L1SCHED_SCH, 0, L1SCHED_SDCCH4_1, 0 }, + { L1SCHED_SACCH4_0, 0, L1SCHED_SDCCH4_1, 1 }, + { L1SCHED_SACCH4_0, 1, L1SCHED_SDCCH4_1, 2 }, + { L1SCHED_SACCH4_0, 2, L1SCHED_SDCCH4_1, 3 }, + { L1SCHED_SACCH4_0, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SACCH4_1, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SACCH4_1, 1, L1SCHED_SDCCH4_2, 0 }, + { L1SCHED_SACCH4_1, 2, L1SCHED_SDCCH4_2, 1 }, + { L1SCHED_SACCH4_1, 3, L1SCHED_SDCCH4_2, 2 }, + { L1SCHED_IDLE, 0, L1SCHED_SDCCH4_2, 3 }, - { TRXC_FCCH, 0, TRXC_SDCCH4_3, 0 }, - { TRXC_SCH, 0, TRXC_SDCCH4_3, 1 }, - { TRXC_BCCH, 0, TRXC_SDCCH4_3, 2 }, - { TRXC_BCCH, 1, TRXC_SDCCH4_3, 3 }, - { TRXC_BCCH, 2, TRXC_RACH, 0 }, - { TRXC_BCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_SACCH4_0, 0 }, - { TRXC_CCCH, 1, TRXC_SACCH4_0, 1 }, - { TRXC_CCCH, 2, TRXC_SACCH4_0, 2 }, - { TRXC_CCCH, 3, TRXC_SACCH4_0, 3 }, - { TRXC_FCCH, 0, TRXC_SACCH4_1, 0 }, - { TRXC_SCH, 0, TRXC_SACCH4_1, 1 }, - { TRXC_CCCH, 0, TRXC_SACCH4_1, 2 }, - { TRXC_CCCH, 1, TRXC_SACCH4_1, 3 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 3, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_2, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_2, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_2, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_2, 3, TRXC_RACH, 0 }, - { TRXC_SDCCH4_3, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_3, 1, TRXC_SDCCH4_0, 0 }, - { TRXC_SDCCH4_3, 2, TRXC_SDCCH4_0, 1 }, - { TRXC_SDCCH4_3, 3, TRXC_SDCCH4_0, 2 }, - { TRXC_FCCH, 0, TRXC_SDCCH4_0, 3 }, - { TRXC_SCH, 0, TRXC_SDCCH4_1, 0 }, - { TRXC_SACCH4_2, 0, TRXC_SDCCH4_1, 1 }, - { TRXC_SACCH4_2, 1, TRXC_SDCCH4_1, 2 }, - { TRXC_SACCH4_2, 2, TRXC_SDCCH4_1, 3 }, - { TRXC_SACCH4_2, 3, TRXC_RACH, 0 }, - { TRXC_SACCH4_3, 0, TRXC_RACH, 0 }, - { TRXC_SACCH4_3, 1, TRXC_SDCCH4_2, 0 }, - { TRXC_SACCH4_3, 2, TRXC_SDCCH4_2, 1 }, - { TRXC_SACCH4_3, 3, TRXC_SDCCH4_2, 2 }, - { TRXC_IDLE, 0, TRXC_SDCCH4_2, 3 }, + { L1SCHED_FCCH, 0, L1SCHED_SDCCH4_3, 0 }, + { L1SCHED_SCH, 0, L1SCHED_SDCCH4_3, 1 }, + { L1SCHED_BCCH, 0, L1SCHED_SDCCH4_3, 2 }, + { L1SCHED_BCCH, 1, L1SCHED_SDCCH4_3, 3 }, + { L1SCHED_BCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_BCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_SACCH4_0, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_SACCH4_0, 1 }, + { L1SCHED_CCCH, 2, L1SCHED_SACCH4_0, 2 }, + { L1SCHED_CCCH, 3, L1SCHED_SACCH4_0, 3 }, + { L1SCHED_FCCH, 0, L1SCHED_SACCH4_1, 0 }, + { L1SCHED_SCH, 0, L1SCHED_SACCH4_1, 1 }, + { L1SCHED_CCCH, 0, L1SCHED_SACCH4_1, 2 }, + { L1SCHED_CCCH, 1, L1SCHED_SACCH4_1, 3 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_2, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_2, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_2, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_2, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_3, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_3, 1, L1SCHED_SDCCH4_0, 0 }, + { L1SCHED_SDCCH4_3, 2, L1SCHED_SDCCH4_0, 1 }, + { L1SCHED_SDCCH4_3, 3, L1SCHED_SDCCH4_0, 2 }, + { L1SCHED_FCCH, 0, L1SCHED_SDCCH4_0, 3 }, + { L1SCHED_SCH, 0, L1SCHED_SDCCH4_1, 0 }, + { L1SCHED_SACCH4_2, 0, L1SCHED_SDCCH4_1, 1 }, + { L1SCHED_SACCH4_2, 1, L1SCHED_SDCCH4_1, 2 }, + { L1SCHED_SACCH4_2, 2, L1SCHED_SDCCH4_1, 3 }, + { L1SCHED_SACCH4_2, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SACCH4_3, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SACCH4_3, 1, L1SCHED_SDCCH4_2, 0 }, + { L1SCHED_SACCH4_3, 2, L1SCHED_SDCCH4_2, 1 }, + { L1SCHED_SACCH4_3, 3, L1SCHED_SDCCH4_2, 2 }, + { L1SCHED_IDLE, 0, L1SCHED_SDCCH4_2, 3 }, }; static const struct trx_frame frame_bcch_sdcch4_cbch[102] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_FCCH, 0, TRXC_SDCCH4_3, 0 }, - { TRXC_SCH, 0, TRXC_SDCCH4_3, 1 }, - { TRXC_BCCH, 0, TRXC_SDCCH4_3, 2 }, - { TRXC_BCCH, 1, TRXC_SDCCH4_3, 3 }, - { TRXC_BCCH, 2, TRXC_RACH, 0 }, - { TRXC_BCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_IDLE, 0 }, - { TRXC_CCCH, 1, TRXC_IDLE, 1 }, - { TRXC_CCCH, 2, TRXC_IDLE, 2 }, - { TRXC_CCCH, 3, TRXC_IDLE, 3 }, - { TRXC_FCCH, 0, TRXC_SACCH4_3, 0 }, - { TRXC_SCH, 0, TRXC_SACCH4_3, 1 }, - { TRXC_CCCH, 0, TRXC_SACCH4_3, 2 }, - { TRXC_CCCH, 1, TRXC_SACCH4_3, 3 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 3, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_CBCH, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_CBCH, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_CBCH, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_CBCH, 3, TRXC_RACH, 0 }, - { TRXC_SDCCH4_3, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_3, 1, TRXC_SDCCH4_0, 0 }, - { TRXC_SDCCH4_3, 2, TRXC_SDCCH4_0, 1 }, - { TRXC_SDCCH4_3, 3, TRXC_SDCCH4_0, 2 }, - { TRXC_FCCH, 0, TRXC_SDCCH4_0, 3 }, - { TRXC_SCH, 0, TRXC_SDCCH4_1, 0 }, - { TRXC_SACCH4_0, 0, TRXC_SDCCH4_1, 1 }, - { TRXC_SACCH4_0, 1, TRXC_SDCCH4_1, 2 }, - { TRXC_SACCH4_0, 2, TRXC_SDCCH4_1, 3 }, - { TRXC_SACCH4_0, 3, TRXC_RACH, 0 }, - { TRXC_SACCH4_1, 0, TRXC_RACH, 0 }, - { TRXC_SACCH4_1, 1, TRXC_IDLE, 0 }, - { TRXC_SACCH4_1, 2, TRXC_IDLE, 1 }, - { TRXC_SACCH4_1, 3, TRXC_IDLE, 2 }, - { TRXC_IDLE, 0, TRXC_IDLE, 3 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_FCCH, 0, L1SCHED_SDCCH4_3, 0 }, + { L1SCHED_SCH, 0, L1SCHED_SDCCH4_3, 1 }, + { L1SCHED_BCCH, 0, L1SCHED_SDCCH4_3, 2 }, + { L1SCHED_BCCH, 1, L1SCHED_SDCCH4_3, 3 }, + { L1SCHED_BCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_BCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_IDLE, 1 }, + { L1SCHED_CCCH, 2, L1SCHED_IDLE, 2 }, + { L1SCHED_CCCH, 3, L1SCHED_IDLE, 3 }, + { L1SCHED_FCCH, 0, L1SCHED_SACCH4_3, 0 }, + { L1SCHED_SCH, 0, L1SCHED_SACCH4_3, 1 }, + { L1SCHED_CCCH, 0, L1SCHED_SACCH4_3, 2 }, + { L1SCHED_CCCH, 1, L1SCHED_SACCH4_3, 3 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_CBCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_CBCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_CBCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_CBCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_3, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_3, 1, L1SCHED_SDCCH4_0, 0 }, + { L1SCHED_SDCCH4_3, 2, L1SCHED_SDCCH4_0, 1 }, + { L1SCHED_SDCCH4_3, 3, L1SCHED_SDCCH4_0, 2 }, + { L1SCHED_FCCH, 0, L1SCHED_SDCCH4_0, 3 }, + { L1SCHED_SCH, 0, L1SCHED_SDCCH4_1, 0 }, + { L1SCHED_SACCH4_0, 0, L1SCHED_SDCCH4_1, 1 }, + { L1SCHED_SACCH4_0, 1, L1SCHED_SDCCH4_1, 2 }, + { L1SCHED_SACCH4_0, 2, L1SCHED_SDCCH4_1, 3 }, + { L1SCHED_SACCH4_0, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SACCH4_1, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SACCH4_1, 1, L1SCHED_IDLE, 0 }, + { L1SCHED_SACCH4_1, 2, L1SCHED_IDLE, 1 }, + { L1SCHED_SACCH4_1, 3, L1SCHED_IDLE, 2 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 3 }, - { TRXC_FCCH, 0, TRXC_SDCCH4_3, 0 }, - { TRXC_SCH, 0, TRXC_SDCCH4_3, 1 }, - { TRXC_BCCH, 0, TRXC_SDCCH4_3, 2 }, - { TRXC_BCCH, 1, TRXC_SDCCH4_3, 3 }, - { TRXC_BCCH, 2, TRXC_RACH, 0 }, - { TRXC_BCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_SACCH4_0, 0 }, - { TRXC_CCCH, 1, TRXC_SACCH4_0, 1 }, - { TRXC_CCCH, 2, TRXC_SACCH4_0, 2 }, - { TRXC_CCCH, 3, TRXC_SACCH4_0, 3 }, - { TRXC_FCCH, 0, TRXC_SACCH4_1, 0 }, - { TRXC_SCH, 0, TRXC_SACCH4_1, 1 }, - { TRXC_CCCH, 0, TRXC_SACCH4_1, 2 }, - { TRXC_CCCH, 1, TRXC_SACCH4_1, 3 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_CCCH, 0, TRXC_RACH, 0 }, - { TRXC_CCCH, 1, TRXC_RACH, 0 }, - { TRXC_CCCH, 2, TRXC_RACH, 0 }, - { TRXC_CCCH, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_0, 3, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_1, 3, TRXC_RACH, 0 }, - { TRXC_FCCH, 0, TRXC_RACH, 0 }, - { TRXC_SCH, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_CBCH, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_CBCH, 1, TRXC_RACH, 0 }, - { TRXC_SDCCH4_CBCH, 2, TRXC_RACH, 0 }, - { TRXC_SDCCH4_CBCH, 3, TRXC_RACH, 0 }, - { TRXC_SDCCH4_3, 0, TRXC_RACH, 0 }, - { TRXC_SDCCH4_3, 1, TRXC_SDCCH4_0, 0 }, - { TRXC_SDCCH4_3, 2, TRXC_SDCCH4_0, 1 }, - { TRXC_SDCCH4_3, 3, TRXC_SDCCH4_0, 2 }, - { TRXC_FCCH, 0, TRXC_SDCCH4_0, 3 }, - { TRXC_SCH, 0, TRXC_SDCCH4_1, 0 }, - { TRXC_IDLE, 0, TRXC_SDCCH4_1, 1 }, - { TRXC_IDLE, 1, TRXC_SDCCH4_1, 2 }, - { TRXC_IDLE, 2, TRXC_SDCCH4_1, 3 }, - { TRXC_IDLE, 3, TRXC_RACH, 0 }, - { TRXC_SACCH4_3, 0, TRXC_RACH, 0 }, - { TRXC_SACCH4_3, 1, TRXC_IDLE, 0 }, - { TRXC_SACCH4_3, 2, TRXC_IDLE, 1 }, - { TRXC_SACCH4_3, 3, TRXC_IDLE, 2 }, - { TRXC_IDLE, 0, TRXC_IDLE, 3 }, + { L1SCHED_FCCH, 0, L1SCHED_SDCCH4_3, 0 }, + { L1SCHED_SCH, 0, L1SCHED_SDCCH4_3, 1 }, + { L1SCHED_BCCH, 0, L1SCHED_SDCCH4_3, 2 }, + { L1SCHED_BCCH, 1, L1SCHED_SDCCH4_3, 3 }, + { L1SCHED_BCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_BCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_SACCH4_0, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_SACCH4_0, 1 }, + { L1SCHED_CCCH, 2, L1SCHED_SACCH4_0, 2 }, + { L1SCHED_CCCH, 3, L1SCHED_SACCH4_0, 3 }, + { L1SCHED_FCCH, 0, L1SCHED_SACCH4_1, 0 }, + { L1SCHED_SCH, 0, L1SCHED_SACCH4_1, 1 }, + { L1SCHED_CCCH, 0, L1SCHED_SACCH4_1, 2 }, + { L1SCHED_CCCH, 1, L1SCHED_SACCH4_1, 3 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_CCCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_0, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_1, 3, L1SCHED_RACH, 0 }, + { L1SCHED_FCCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_CBCH, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_CBCH, 1, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_CBCH, 2, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_CBCH, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_3, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SDCCH4_3, 1, L1SCHED_SDCCH4_0, 0 }, + { L1SCHED_SDCCH4_3, 2, L1SCHED_SDCCH4_0, 1 }, + { L1SCHED_SDCCH4_3, 3, L1SCHED_SDCCH4_0, 2 }, + { L1SCHED_FCCH, 0, L1SCHED_SDCCH4_0, 3 }, + { L1SCHED_SCH, 0, L1SCHED_SDCCH4_1, 0 }, + { L1SCHED_IDLE, 0, L1SCHED_SDCCH4_1, 1 }, + { L1SCHED_IDLE, 1, L1SCHED_SDCCH4_1, 2 }, + { L1SCHED_IDLE, 2, L1SCHED_SDCCH4_1, 3 }, + { L1SCHED_IDLE, 3, L1SCHED_RACH, 0 }, + { L1SCHED_SACCH4_3, 0, L1SCHED_RACH, 0 }, + { L1SCHED_SACCH4_3, 1, L1SCHED_IDLE, 0 }, + { L1SCHED_SACCH4_3, 2, L1SCHED_IDLE, 1 }, + { L1SCHED_SACCH4_3, 3, L1SCHED_IDLE, 2 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 3 }, }; static const struct trx_frame frame_sdcch8[102] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_SDCCH8_0, 0, TRXC_SACCH8_5, 0 }, - { TRXC_SDCCH8_0, 1, TRXC_SACCH8_5, 1 }, - { TRXC_SDCCH8_0, 2, TRXC_SACCH8_5, 2 }, - { TRXC_SDCCH8_0, 3, TRXC_SACCH8_5, 3 }, - { TRXC_SDCCH8_1, 0, TRXC_SACCH8_6, 0 }, - { TRXC_SDCCH8_1, 1, TRXC_SACCH8_6, 1 }, - { TRXC_SDCCH8_1, 2, TRXC_SACCH8_6, 2 }, - { TRXC_SDCCH8_1, 3, TRXC_SACCH8_6, 3 }, - { TRXC_SDCCH8_2, 0, TRXC_SACCH8_7, 0 }, - { TRXC_SDCCH8_2, 1, TRXC_SACCH8_7, 1 }, - { TRXC_SDCCH8_2, 2, TRXC_SACCH8_7, 2 }, - { TRXC_SDCCH8_2, 3, TRXC_SACCH8_7, 3 }, - { TRXC_SDCCH8_3, 0, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 1, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 2, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 3, TRXC_SDCCH8_0, 0 }, - { TRXC_SDCCH8_4, 0, TRXC_SDCCH8_0, 1 }, - { TRXC_SDCCH8_4, 1, TRXC_SDCCH8_0, 2 }, - { TRXC_SDCCH8_4, 2, TRXC_SDCCH8_0, 3 }, - { TRXC_SDCCH8_4, 3, TRXC_SDCCH8_1, 0 }, - { TRXC_SDCCH8_5, 0, TRXC_SDCCH8_1, 1 }, - { TRXC_SDCCH8_5, 1, TRXC_SDCCH8_1, 2 }, - { TRXC_SDCCH8_5, 2, TRXC_SDCCH8_1, 3 }, - { TRXC_SDCCH8_5, 3, TRXC_SDCCH8_2, 0 }, - { TRXC_SDCCH8_6, 0, TRXC_SDCCH8_2, 1 }, - { TRXC_SDCCH8_6, 1, TRXC_SDCCH8_2, 2 }, - { TRXC_SDCCH8_6, 2, TRXC_SDCCH8_2, 3 }, - { TRXC_SDCCH8_6, 3, TRXC_SDCCH8_3, 0 }, - { TRXC_SDCCH8_7, 0, TRXC_SDCCH8_3, 1 }, - { TRXC_SDCCH8_7, 1, TRXC_SDCCH8_3, 2 }, - { TRXC_SDCCH8_7, 2, TRXC_SDCCH8_3, 3 }, - { TRXC_SDCCH8_7, 3, TRXC_SDCCH8_4, 0 }, - { TRXC_SACCH8_0, 0, TRXC_SDCCH8_4, 1 }, - { TRXC_SACCH8_0, 1, TRXC_SDCCH8_4, 2 }, - { TRXC_SACCH8_0, 2, TRXC_SDCCH8_4, 3 }, - { TRXC_SACCH8_0, 3, TRXC_SDCCH8_5, 0 }, - { TRXC_SACCH8_1, 0, TRXC_SDCCH8_5, 1 }, - { TRXC_SACCH8_1, 1, TRXC_SDCCH8_5, 2 }, - { TRXC_SACCH8_1, 2, TRXC_SDCCH8_5, 3 }, - { TRXC_SACCH8_1, 3, TRXC_SDCCH8_6, 0 }, - { TRXC_SACCH8_2, 0, TRXC_SDCCH8_6, 1 }, - { TRXC_SACCH8_2, 1, TRXC_SDCCH8_6, 2 }, - { TRXC_SACCH8_2, 2, TRXC_SDCCH8_6, 3 }, - { TRXC_SACCH8_2, 3, TRXC_SDCCH8_7, 0 }, - { TRXC_SACCH8_3, 0, TRXC_SDCCH8_7, 1 }, - { TRXC_SACCH8_3, 1, TRXC_SDCCH8_7, 2 }, - { TRXC_SACCH8_3, 2, TRXC_SDCCH8_7, 3 }, - { TRXC_SACCH8_3, 3, TRXC_SACCH8_0, 0 }, - { TRXC_IDLE, 0, TRXC_SACCH8_0, 1 }, - { TRXC_IDLE, 0, TRXC_SACCH8_0, 2 }, - { TRXC_IDLE, 0, TRXC_SACCH8_0, 3 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_SDCCH8_0, 0, L1SCHED_SACCH8_5, 0 }, + { L1SCHED_SDCCH8_0, 1, L1SCHED_SACCH8_5, 1 }, + { L1SCHED_SDCCH8_0, 2, L1SCHED_SACCH8_5, 2 }, + { L1SCHED_SDCCH8_0, 3, L1SCHED_SACCH8_5, 3 }, + { L1SCHED_SDCCH8_1, 0, L1SCHED_SACCH8_6, 0 }, + { L1SCHED_SDCCH8_1, 1, L1SCHED_SACCH8_6, 1 }, + { L1SCHED_SDCCH8_1, 2, L1SCHED_SACCH8_6, 2 }, + { L1SCHED_SDCCH8_1, 3, L1SCHED_SACCH8_6, 3 }, + { L1SCHED_SDCCH8_2, 0, L1SCHED_SACCH8_7, 0 }, + { L1SCHED_SDCCH8_2, 1, L1SCHED_SACCH8_7, 1 }, + { L1SCHED_SDCCH8_2, 2, L1SCHED_SACCH8_7, 2 }, + { L1SCHED_SDCCH8_2, 3, L1SCHED_SACCH8_7, 3 }, + { L1SCHED_SDCCH8_3, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 1, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 2, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 3, L1SCHED_SDCCH8_0, 0 }, + { L1SCHED_SDCCH8_4, 0, L1SCHED_SDCCH8_0, 1 }, + { L1SCHED_SDCCH8_4, 1, L1SCHED_SDCCH8_0, 2 }, + { L1SCHED_SDCCH8_4, 2, L1SCHED_SDCCH8_0, 3 }, + { L1SCHED_SDCCH8_4, 3, L1SCHED_SDCCH8_1, 0 }, + { L1SCHED_SDCCH8_5, 0, L1SCHED_SDCCH8_1, 1 }, + { L1SCHED_SDCCH8_5, 1, L1SCHED_SDCCH8_1, 2 }, + { L1SCHED_SDCCH8_5, 2, L1SCHED_SDCCH8_1, 3 }, + { L1SCHED_SDCCH8_5, 3, L1SCHED_SDCCH8_2, 0 }, + { L1SCHED_SDCCH8_6, 0, L1SCHED_SDCCH8_2, 1 }, + { L1SCHED_SDCCH8_6, 1, L1SCHED_SDCCH8_2, 2 }, + { L1SCHED_SDCCH8_6, 2, L1SCHED_SDCCH8_2, 3 }, + { L1SCHED_SDCCH8_6, 3, L1SCHED_SDCCH8_3, 0 }, + { L1SCHED_SDCCH8_7, 0, L1SCHED_SDCCH8_3, 1 }, + { L1SCHED_SDCCH8_7, 1, L1SCHED_SDCCH8_3, 2 }, + { L1SCHED_SDCCH8_7, 2, L1SCHED_SDCCH8_3, 3 }, + { L1SCHED_SDCCH8_7, 3, L1SCHED_SDCCH8_4, 0 }, + { L1SCHED_SACCH8_0, 0, L1SCHED_SDCCH8_4, 1 }, + { L1SCHED_SACCH8_0, 1, L1SCHED_SDCCH8_4, 2 }, + { L1SCHED_SACCH8_0, 2, L1SCHED_SDCCH8_4, 3 }, + { L1SCHED_SACCH8_0, 3, L1SCHED_SDCCH8_5, 0 }, + { L1SCHED_SACCH8_1, 0, L1SCHED_SDCCH8_5, 1 }, + { L1SCHED_SACCH8_1, 1, L1SCHED_SDCCH8_5, 2 }, + { L1SCHED_SACCH8_1, 2, L1SCHED_SDCCH8_5, 3 }, + { L1SCHED_SACCH8_1, 3, L1SCHED_SDCCH8_6, 0 }, + { L1SCHED_SACCH8_2, 0, L1SCHED_SDCCH8_6, 1 }, + { L1SCHED_SACCH8_2, 1, L1SCHED_SDCCH8_6, 2 }, + { L1SCHED_SACCH8_2, 2, L1SCHED_SDCCH8_6, 3 }, + { L1SCHED_SACCH8_2, 3, L1SCHED_SDCCH8_7, 0 }, + { L1SCHED_SACCH8_3, 0, L1SCHED_SDCCH8_7, 1 }, + { L1SCHED_SACCH8_3, 1, L1SCHED_SDCCH8_7, 2 }, + { L1SCHED_SACCH8_3, 2, L1SCHED_SDCCH8_7, 3 }, + { L1SCHED_SACCH8_3, 3, L1SCHED_SACCH8_0, 0 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 1 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 2 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 3 }, - { TRXC_SDCCH8_0, 0, TRXC_SACCH8_1, 0 }, - { TRXC_SDCCH8_0, 1, TRXC_SACCH8_1, 1 }, - { TRXC_SDCCH8_0, 2, TRXC_SACCH8_1, 2 }, - { TRXC_SDCCH8_0, 3, TRXC_SACCH8_1, 3 }, - { TRXC_SDCCH8_1, 0, TRXC_SACCH8_2, 0 }, - { TRXC_SDCCH8_1, 1, TRXC_SACCH8_2, 1 }, - { TRXC_SDCCH8_1, 2, TRXC_SACCH8_2, 2 }, - { TRXC_SDCCH8_1, 3, TRXC_SACCH8_2, 3 }, - { TRXC_SDCCH8_2, 0, TRXC_SACCH8_3, 0 }, - { TRXC_SDCCH8_2, 1, TRXC_SACCH8_3, 1 }, - { TRXC_SDCCH8_2, 2, TRXC_SACCH8_3, 2 }, - { TRXC_SDCCH8_2, 3, TRXC_SACCH8_3, 3 }, - { TRXC_SDCCH8_3, 0, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 1, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 2, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 3, TRXC_SDCCH8_0, 0 }, - { TRXC_SDCCH8_4, 0, TRXC_SDCCH8_0, 1 }, - { TRXC_SDCCH8_4, 1, TRXC_SDCCH8_0, 2 }, - { TRXC_SDCCH8_4, 2, TRXC_SDCCH8_0, 3 }, - { TRXC_SDCCH8_4, 3, TRXC_SDCCH8_1, 0 }, - { TRXC_SDCCH8_5, 0, TRXC_SDCCH8_1, 1 }, - { TRXC_SDCCH8_5, 1, TRXC_SDCCH8_1, 2 }, - { TRXC_SDCCH8_5, 2, TRXC_SDCCH8_1, 3 }, - { TRXC_SDCCH8_5, 3, TRXC_SDCCH8_2, 0 }, - { TRXC_SDCCH8_6, 0, TRXC_SDCCH8_2, 1 }, - { TRXC_SDCCH8_6, 1, TRXC_SDCCH8_2, 2 }, - { TRXC_SDCCH8_6, 2, TRXC_SDCCH8_2, 3 }, - { TRXC_SDCCH8_6, 3, TRXC_SDCCH8_3, 0 }, - { TRXC_SDCCH8_7, 0, TRXC_SDCCH8_3, 1 }, - { TRXC_SDCCH8_7, 1, TRXC_SDCCH8_3, 2 }, - { TRXC_SDCCH8_7, 2, TRXC_SDCCH8_3, 3 }, - { TRXC_SDCCH8_7, 3, TRXC_SDCCH8_4, 0 }, - { TRXC_SACCH8_4, 0, TRXC_SDCCH8_4, 1 }, - { TRXC_SACCH8_4, 1, TRXC_SDCCH8_4, 2 }, - { TRXC_SACCH8_4, 2, TRXC_SDCCH8_4, 3 }, - { TRXC_SACCH8_4, 3, TRXC_SDCCH8_5, 0 }, - { TRXC_SACCH8_5, 0, TRXC_SDCCH8_5, 1 }, - { TRXC_SACCH8_5, 1, TRXC_SDCCH8_5, 2 }, - { TRXC_SACCH8_5, 2, TRXC_SDCCH8_5, 3 }, - { TRXC_SACCH8_5, 3, TRXC_SDCCH8_6, 0 }, - { TRXC_SACCH8_6, 0, TRXC_SDCCH8_6, 1 }, - { TRXC_SACCH8_6, 1, TRXC_SDCCH8_6, 2 }, - { TRXC_SACCH8_6, 2, TRXC_SDCCH8_6, 3 }, - { TRXC_SACCH8_6, 3, TRXC_SDCCH8_7, 0 }, - { TRXC_SACCH8_7, 0, TRXC_SDCCH8_7, 1 }, - { TRXC_SACCH8_7, 1, TRXC_SDCCH8_7, 2 }, - { TRXC_SACCH8_7, 2, TRXC_SDCCH8_7, 3 }, - { TRXC_SACCH8_7, 3, TRXC_SACCH8_4, 0 }, - { TRXC_IDLE, 0, TRXC_SACCH8_4, 1 }, - { TRXC_IDLE, 0, TRXC_SACCH8_4, 2 }, - { TRXC_IDLE, 0, TRXC_SACCH8_4, 3 }, + { L1SCHED_SDCCH8_0, 0, L1SCHED_SACCH8_1, 0 }, + { L1SCHED_SDCCH8_0, 1, L1SCHED_SACCH8_1, 1 }, + { L1SCHED_SDCCH8_0, 2, L1SCHED_SACCH8_1, 2 }, + { L1SCHED_SDCCH8_0, 3, L1SCHED_SACCH8_1, 3 }, + { L1SCHED_SDCCH8_1, 0, L1SCHED_SACCH8_2, 0 }, + { L1SCHED_SDCCH8_1, 1, L1SCHED_SACCH8_2, 1 }, + { L1SCHED_SDCCH8_1, 2, L1SCHED_SACCH8_2, 2 }, + { L1SCHED_SDCCH8_1, 3, L1SCHED_SACCH8_2, 3 }, + { L1SCHED_SDCCH8_2, 0, L1SCHED_SACCH8_3, 0 }, + { L1SCHED_SDCCH8_2, 1, L1SCHED_SACCH8_3, 1 }, + { L1SCHED_SDCCH8_2, 2, L1SCHED_SACCH8_3, 2 }, + { L1SCHED_SDCCH8_2, 3, L1SCHED_SACCH8_3, 3 }, + { L1SCHED_SDCCH8_3, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 1, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 2, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 3, L1SCHED_SDCCH8_0, 0 }, + { L1SCHED_SDCCH8_4, 0, L1SCHED_SDCCH8_0, 1 }, + { L1SCHED_SDCCH8_4, 1, L1SCHED_SDCCH8_0, 2 }, + { L1SCHED_SDCCH8_4, 2, L1SCHED_SDCCH8_0, 3 }, + { L1SCHED_SDCCH8_4, 3, L1SCHED_SDCCH8_1, 0 }, + { L1SCHED_SDCCH8_5, 0, L1SCHED_SDCCH8_1, 1 }, + { L1SCHED_SDCCH8_5, 1, L1SCHED_SDCCH8_1, 2 }, + { L1SCHED_SDCCH8_5, 2, L1SCHED_SDCCH8_1, 3 }, + { L1SCHED_SDCCH8_5, 3, L1SCHED_SDCCH8_2, 0 }, + { L1SCHED_SDCCH8_6, 0, L1SCHED_SDCCH8_2, 1 }, + { L1SCHED_SDCCH8_6, 1, L1SCHED_SDCCH8_2, 2 }, + { L1SCHED_SDCCH8_6, 2, L1SCHED_SDCCH8_2, 3 }, + { L1SCHED_SDCCH8_6, 3, L1SCHED_SDCCH8_3, 0 }, + { L1SCHED_SDCCH8_7, 0, L1SCHED_SDCCH8_3, 1 }, + { L1SCHED_SDCCH8_7, 1, L1SCHED_SDCCH8_3, 2 }, + { L1SCHED_SDCCH8_7, 2, L1SCHED_SDCCH8_3, 3 }, + { L1SCHED_SDCCH8_7, 3, L1SCHED_SDCCH8_4, 0 }, + { L1SCHED_SACCH8_4, 0, L1SCHED_SDCCH8_4, 1 }, + { L1SCHED_SACCH8_4, 1, L1SCHED_SDCCH8_4, 2 }, + { L1SCHED_SACCH8_4, 2, L1SCHED_SDCCH8_4, 3 }, + { L1SCHED_SACCH8_4, 3, L1SCHED_SDCCH8_5, 0 }, + { L1SCHED_SACCH8_5, 0, L1SCHED_SDCCH8_5, 1 }, + { L1SCHED_SACCH8_5, 1, L1SCHED_SDCCH8_5, 2 }, + { L1SCHED_SACCH8_5, 2, L1SCHED_SDCCH8_5, 3 }, + { L1SCHED_SACCH8_5, 3, L1SCHED_SDCCH8_6, 0 }, + { L1SCHED_SACCH8_6, 0, L1SCHED_SDCCH8_6, 1 }, + { L1SCHED_SACCH8_6, 1, L1SCHED_SDCCH8_6, 2 }, + { L1SCHED_SACCH8_6, 2, L1SCHED_SDCCH8_6, 3 }, + { L1SCHED_SACCH8_6, 3, L1SCHED_SDCCH8_7, 0 }, + { L1SCHED_SACCH8_7, 0, L1SCHED_SDCCH8_7, 1 }, + { L1SCHED_SACCH8_7, 1, L1SCHED_SDCCH8_7, 2 }, + { L1SCHED_SACCH8_7, 2, L1SCHED_SDCCH8_7, 3 }, + { L1SCHED_SACCH8_7, 3, L1SCHED_SACCH8_4, 0 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 1 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 2 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 3 }, }; static const struct trx_frame frame_sdcch8_cbch[102] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_SDCCH8_0, 0, TRXC_SACCH8_5, 0 }, - { TRXC_SDCCH8_0, 1, TRXC_SACCH8_5, 1 }, - { TRXC_SDCCH8_0, 2, TRXC_SACCH8_5, 2 }, - { TRXC_SDCCH8_0, 3, TRXC_SACCH8_5, 3 }, - { TRXC_SDCCH8_1, 0, TRXC_SACCH8_6, 0 }, - { TRXC_SDCCH8_1, 1, TRXC_SACCH8_6, 1 }, - { TRXC_SDCCH8_1, 2, TRXC_SACCH8_6, 2 }, - { TRXC_SDCCH8_1, 3, TRXC_SACCH8_6, 3 }, - { TRXC_SDCCH8_CBCH, 0, TRXC_SACCH8_7, 0 }, - { TRXC_SDCCH8_CBCH, 1, TRXC_SACCH8_7, 1 }, - { TRXC_SDCCH8_CBCH, 2, TRXC_SACCH8_7, 2 }, - { TRXC_SDCCH8_CBCH, 3, TRXC_SACCH8_7, 3 }, - { TRXC_SDCCH8_3, 0, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 1, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 2, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 3, TRXC_SDCCH8_0, 0 }, - { TRXC_SDCCH8_4, 0, TRXC_SDCCH8_0, 1 }, - { TRXC_SDCCH8_4, 1, TRXC_SDCCH8_0, 2 }, - { TRXC_SDCCH8_4, 2, TRXC_SDCCH8_0, 3 }, - { TRXC_SDCCH8_4, 3, TRXC_SDCCH8_1, 0 }, - { TRXC_SDCCH8_5, 0, TRXC_SDCCH8_1, 1 }, - { TRXC_SDCCH8_5, 1, TRXC_SDCCH8_1, 2 }, - { TRXC_SDCCH8_5, 2, TRXC_SDCCH8_1, 3 }, - { TRXC_SDCCH8_5, 3, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_6, 0, TRXC_IDLE, 1 }, - { TRXC_SDCCH8_6, 1, TRXC_IDLE, 2 }, - { TRXC_SDCCH8_6, 2, TRXC_IDLE, 3 }, - { TRXC_SDCCH8_6, 3, TRXC_SDCCH8_3, 0 }, - { TRXC_SDCCH8_7, 0, TRXC_SDCCH8_3, 1 }, - { TRXC_SDCCH8_7, 1, TRXC_SDCCH8_3, 2 }, - { TRXC_SDCCH8_7, 2, TRXC_SDCCH8_3, 3 }, - { TRXC_SDCCH8_7, 3, TRXC_SDCCH8_4, 0 }, - { TRXC_SACCH8_0, 0, TRXC_SDCCH8_4, 1 }, - { TRXC_SACCH8_0, 1, TRXC_SDCCH8_4, 2 }, - { TRXC_SACCH8_0, 2, TRXC_SDCCH8_4, 3 }, - { TRXC_SACCH8_0, 3, TRXC_SDCCH8_5, 0 }, - { TRXC_SACCH8_1, 0, TRXC_SDCCH8_5, 1 }, - { TRXC_SACCH8_1, 1, TRXC_SDCCH8_5, 2 }, - { TRXC_SACCH8_1, 2, TRXC_SDCCH8_5, 3 }, - { TRXC_SACCH8_1, 3, TRXC_SDCCH8_6, 0 }, - { TRXC_IDLE, 0, TRXC_SDCCH8_6, 1 }, - { TRXC_IDLE, 1, TRXC_SDCCH8_6, 2 }, - { TRXC_IDLE, 2, TRXC_SDCCH8_6, 3 }, - { TRXC_IDLE, 3, TRXC_SDCCH8_7, 0 }, - { TRXC_SACCH8_3, 0, TRXC_SDCCH8_7, 1 }, - { TRXC_SACCH8_3, 1, TRXC_SDCCH8_7, 2 }, - { TRXC_SACCH8_3, 2, TRXC_SDCCH8_7, 3 }, - { TRXC_SACCH8_3, 3, TRXC_SACCH8_0, 0 }, - { TRXC_IDLE, 0, TRXC_SACCH8_0, 1 }, - { TRXC_IDLE, 0, TRXC_SACCH8_0, 2 }, - { TRXC_IDLE, 0, TRXC_SACCH8_0, 3 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_SDCCH8_0, 0, L1SCHED_SACCH8_5, 0 }, + { L1SCHED_SDCCH8_0, 1, L1SCHED_SACCH8_5, 1 }, + { L1SCHED_SDCCH8_0, 2, L1SCHED_SACCH8_5, 2 }, + { L1SCHED_SDCCH8_0, 3, L1SCHED_SACCH8_5, 3 }, + { L1SCHED_SDCCH8_1, 0, L1SCHED_SACCH8_6, 0 }, + { L1SCHED_SDCCH8_1, 1, L1SCHED_SACCH8_6, 1 }, + { L1SCHED_SDCCH8_1, 2, L1SCHED_SACCH8_6, 2 }, + { L1SCHED_SDCCH8_1, 3, L1SCHED_SACCH8_6, 3 }, + { L1SCHED_SDCCH8_CBCH, 0, L1SCHED_SACCH8_7, 0 }, + { L1SCHED_SDCCH8_CBCH, 1, L1SCHED_SACCH8_7, 1 }, + { L1SCHED_SDCCH8_CBCH, 2, L1SCHED_SACCH8_7, 2 }, + { L1SCHED_SDCCH8_CBCH, 3, L1SCHED_SACCH8_7, 3 }, + { L1SCHED_SDCCH8_3, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 1, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 2, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 3, L1SCHED_SDCCH8_0, 0 }, + { L1SCHED_SDCCH8_4, 0, L1SCHED_SDCCH8_0, 1 }, + { L1SCHED_SDCCH8_4, 1, L1SCHED_SDCCH8_0, 2 }, + { L1SCHED_SDCCH8_4, 2, L1SCHED_SDCCH8_0, 3 }, + { L1SCHED_SDCCH8_4, 3, L1SCHED_SDCCH8_1, 0 }, + { L1SCHED_SDCCH8_5, 0, L1SCHED_SDCCH8_1, 1 }, + { L1SCHED_SDCCH8_5, 1, L1SCHED_SDCCH8_1, 2 }, + { L1SCHED_SDCCH8_5, 2, L1SCHED_SDCCH8_1, 3 }, + { L1SCHED_SDCCH8_5, 3, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_6, 0, L1SCHED_IDLE, 1 }, + { L1SCHED_SDCCH8_6, 1, L1SCHED_IDLE, 2 }, + { L1SCHED_SDCCH8_6, 2, L1SCHED_IDLE, 3 }, + { L1SCHED_SDCCH8_6, 3, L1SCHED_SDCCH8_3, 0 }, + { L1SCHED_SDCCH8_7, 0, L1SCHED_SDCCH8_3, 1 }, + { L1SCHED_SDCCH8_7, 1, L1SCHED_SDCCH8_3, 2 }, + { L1SCHED_SDCCH8_7, 2, L1SCHED_SDCCH8_3, 3 }, + { L1SCHED_SDCCH8_7, 3, L1SCHED_SDCCH8_4, 0 }, + { L1SCHED_SACCH8_0, 0, L1SCHED_SDCCH8_4, 1 }, + { L1SCHED_SACCH8_0, 1, L1SCHED_SDCCH8_4, 2 }, + { L1SCHED_SACCH8_0, 2, L1SCHED_SDCCH8_4, 3 }, + { L1SCHED_SACCH8_0, 3, L1SCHED_SDCCH8_5, 0 }, + { L1SCHED_SACCH8_1, 0, L1SCHED_SDCCH8_5, 1 }, + { L1SCHED_SACCH8_1, 1, L1SCHED_SDCCH8_5, 2 }, + { L1SCHED_SACCH8_1, 2, L1SCHED_SDCCH8_5, 3 }, + { L1SCHED_SACCH8_1, 3, L1SCHED_SDCCH8_6, 0 }, + { L1SCHED_IDLE, 0, L1SCHED_SDCCH8_6, 1 }, + { L1SCHED_IDLE, 1, L1SCHED_SDCCH8_6, 2 }, + { L1SCHED_IDLE, 2, L1SCHED_SDCCH8_6, 3 }, + { L1SCHED_IDLE, 3, L1SCHED_SDCCH8_7, 0 }, + { L1SCHED_SACCH8_3, 0, L1SCHED_SDCCH8_7, 1 }, + { L1SCHED_SACCH8_3, 1, L1SCHED_SDCCH8_7, 2 }, + { L1SCHED_SACCH8_3, 2, L1SCHED_SDCCH8_7, 3 }, + { L1SCHED_SACCH8_3, 3, L1SCHED_SACCH8_0, 0 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 1 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 2 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_0, 3 }, - { TRXC_SDCCH8_0, 0, TRXC_SACCH8_1, 0 }, - { TRXC_SDCCH8_0, 1, TRXC_SACCH8_1, 1 }, - { TRXC_SDCCH8_0, 2, TRXC_SACCH8_1, 2 }, - { TRXC_SDCCH8_0, 3, TRXC_SACCH8_1, 3 }, - { TRXC_SDCCH8_1, 0, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_1, 1, TRXC_IDLE, 1 }, - { TRXC_SDCCH8_1, 2, TRXC_IDLE, 2 }, - { TRXC_SDCCH8_1, 3, TRXC_IDLE, 3 }, - { TRXC_SDCCH8_CBCH, 0, TRXC_SACCH8_3, 0 }, - { TRXC_SDCCH8_CBCH, 1, TRXC_SACCH8_3, 1 }, - { TRXC_SDCCH8_CBCH, 2, TRXC_SACCH8_3, 2 }, - { TRXC_SDCCH8_CBCH, 3, TRXC_SACCH8_3, 3 }, - { TRXC_SDCCH8_3, 0, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 1, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 2, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_3, 3, TRXC_SDCCH8_0, 0 }, - { TRXC_SDCCH8_4, 0, TRXC_SDCCH8_0, 1 }, - { TRXC_SDCCH8_4, 1, TRXC_SDCCH8_0, 2 }, - { TRXC_SDCCH8_4, 2, TRXC_SDCCH8_0, 3 }, - { TRXC_SDCCH8_4, 3, TRXC_SDCCH8_1, 0 }, - { TRXC_SDCCH8_5, 0, TRXC_SDCCH8_1, 1 }, - { TRXC_SDCCH8_5, 1, TRXC_SDCCH8_1, 2 }, - { TRXC_SDCCH8_5, 2, TRXC_SDCCH8_1, 3 }, - { TRXC_SDCCH8_5, 3, TRXC_IDLE, 0 }, - { TRXC_SDCCH8_6, 0, TRXC_IDLE, 1 }, - { TRXC_SDCCH8_6, 1, TRXC_IDLE, 2 }, - { TRXC_SDCCH8_6, 2, TRXC_IDLE, 3 }, - { TRXC_SDCCH8_6, 3, TRXC_SDCCH8_3, 0 }, - { TRXC_SDCCH8_7, 0, TRXC_SDCCH8_3, 1 }, - { TRXC_SDCCH8_7, 1, TRXC_SDCCH8_3, 2 }, - { TRXC_SDCCH8_7, 2, TRXC_SDCCH8_3, 3 }, - { TRXC_SDCCH8_7, 3, TRXC_SDCCH8_4, 0 }, - { TRXC_SACCH8_4, 0, TRXC_SDCCH8_4, 1 }, - { TRXC_SACCH8_4, 1, TRXC_SDCCH8_4, 2 }, - { TRXC_SACCH8_4, 2, TRXC_SDCCH8_4, 3 }, - { TRXC_SACCH8_4, 3, TRXC_SDCCH8_5, 0 }, - { TRXC_SACCH8_5, 0, TRXC_SDCCH8_5, 1 }, - { TRXC_SACCH8_5, 1, TRXC_SDCCH8_5, 2 }, - { TRXC_SACCH8_5, 2, TRXC_SDCCH8_5, 3 }, - { TRXC_SACCH8_5, 3, TRXC_SDCCH8_6, 0 }, - { TRXC_SACCH8_6, 0, TRXC_SDCCH8_6, 1 }, - { TRXC_SACCH8_6, 1, TRXC_SDCCH8_6, 2 }, - { TRXC_SACCH8_6, 2, TRXC_SDCCH8_6, 3 }, - { TRXC_SACCH8_6, 3, TRXC_SDCCH8_7, 0 }, - { TRXC_SACCH8_7, 0, TRXC_SDCCH8_7, 1 }, - { TRXC_SACCH8_7, 1, TRXC_SDCCH8_7, 2 }, - { TRXC_SACCH8_7, 2, TRXC_SDCCH8_7, 3 }, - { TRXC_SACCH8_7, 3, TRXC_SACCH8_4, 0 }, - { TRXC_IDLE, 0, TRXC_SACCH8_4, 1 }, - { TRXC_IDLE, 0, TRXC_SACCH8_4, 2 }, - { TRXC_IDLE, 0, TRXC_SACCH8_4, 3 }, + { L1SCHED_SDCCH8_0, 0, L1SCHED_SACCH8_1, 0 }, + { L1SCHED_SDCCH8_0, 1, L1SCHED_SACCH8_1, 1 }, + { L1SCHED_SDCCH8_0, 2, L1SCHED_SACCH8_1, 2 }, + { L1SCHED_SDCCH8_0, 3, L1SCHED_SACCH8_1, 3 }, + { L1SCHED_SDCCH8_1, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_1, 1, L1SCHED_IDLE, 1 }, + { L1SCHED_SDCCH8_1, 2, L1SCHED_IDLE, 2 }, + { L1SCHED_SDCCH8_1, 3, L1SCHED_IDLE, 3 }, + { L1SCHED_SDCCH8_CBCH, 0, L1SCHED_SACCH8_3, 0 }, + { L1SCHED_SDCCH8_CBCH, 1, L1SCHED_SACCH8_3, 1 }, + { L1SCHED_SDCCH8_CBCH, 2, L1SCHED_SACCH8_3, 2 }, + { L1SCHED_SDCCH8_CBCH, 3, L1SCHED_SACCH8_3, 3 }, + { L1SCHED_SDCCH8_3, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 1, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 2, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_3, 3, L1SCHED_SDCCH8_0, 0 }, + { L1SCHED_SDCCH8_4, 0, L1SCHED_SDCCH8_0, 1 }, + { L1SCHED_SDCCH8_4, 1, L1SCHED_SDCCH8_0, 2 }, + { L1SCHED_SDCCH8_4, 2, L1SCHED_SDCCH8_0, 3 }, + { L1SCHED_SDCCH8_4, 3, L1SCHED_SDCCH8_1, 0 }, + { L1SCHED_SDCCH8_5, 0, L1SCHED_SDCCH8_1, 1 }, + { L1SCHED_SDCCH8_5, 1, L1SCHED_SDCCH8_1, 2 }, + { L1SCHED_SDCCH8_5, 2, L1SCHED_SDCCH8_1, 3 }, + { L1SCHED_SDCCH8_5, 3, L1SCHED_IDLE, 0 }, + { L1SCHED_SDCCH8_6, 0, L1SCHED_IDLE, 1 }, + { L1SCHED_SDCCH8_6, 1, L1SCHED_IDLE, 2 }, + { L1SCHED_SDCCH8_6, 2, L1SCHED_IDLE, 3 }, + { L1SCHED_SDCCH8_6, 3, L1SCHED_SDCCH8_3, 0 }, + { L1SCHED_SDCCH8_7, 0, L1SCHED_SDCCH8_3, 1 }, + { L1SCHED_SDCCH8_7, 1, L1SCHED_SDCCH8_3, 2 }, + { L1SCHED_SDCCH8_7, 2, L1SCHED_SDCCH8_3, 3 }, + { L1SCHED_SDCCH8_7, 3, L1SCHED_SDCCH8_4, 0 }, + { L1SCHED_SACCH8_4, 0, L1SCHED_SDCCH8_4, 1 }, + { L1SCHED_SACCH8_4, 1, L1SCHED_SDCCH8_4, 2 }, + { L1SCHED_SACCH8_4, 2, L1SCHED_SDCCH8_4, 3 }, + { L1SCHED_SACCH8_4, 3, L1SCHED_SDCCH8_5, 0 }, + { L1SCHED_SACCH8_5, 0, L1SCHED_SDCCH8_5, 1 }, + { L1SCHED_SACCH8_5, 1, L1SCHED_SDCCH8_5, 2 }, + { L1SCHED_SACCH8_5, 2, L1SCHED_SDCCH8_5, 3 }, + { L1SCHED_SACCH8_5, 3, L1SCHED_SDCCH8_6, 0 }, + { L1SCHED_SACCH8_6, 0, L1SCHED_SDCCH8_6, 1 }, + { L1SCHED_SACCH8_6, 1, L1SCHED_SDCCH8_6, 2 }, + { L1SCHED_SACCH8_6, 2, L1SCHED_SDCCH8_6, 3 }, + { L1SCHED_SACCH8_6, 3, L1SCHED_SDCCH8_7, 0 }, + { L1SCHED_SACCH8_7, 0, L1SCHED_SDCCH8_7, 1 }, + { L1SCHED_SACCH8_7, 1, L1SCHED_SDCCH8_7, 2 }, + { L1SCHED_SACCH8_7, 2, L1SCHED_SDCCH8_7, 3 }, + { L1SCHED_SACCH8_7, 3, L1SCHED_SACCH8_4, 0 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 1 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 2 }, + { L1SCHED_IDLE, 0, L1SCHED_SACCH8_4, 3 }, }; static const struct trx_frame frame_tchf_ts0[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 0, TRXC_SACCHTF, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 1, TRXC_SACCHTF, 1 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 2, TRXC_SACCHTF, 2 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 3, TRXC_SACCHTF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, }; static const struct trx_frame frame_tchf_ts1[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 0, TRXC_SACCHTF, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 1, TRXC_SACCHTF, 1 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 2, TRXC_SACCHTF, 2 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 3, TRXC_SACCHTF, 3 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 }, }; static const struct trx_frame frame_tchf_ts2[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 3, TRXC_SACCHTF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 0, TRXC_SACCHTF, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 1, TRXC_SACCHTF, 1 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 2, TRXC_SACCHTF, 2 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, }; static const struct trx_frame frame_tchf_ts3[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 3, TRXC_SACCHTF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 0, TRXC_SACCHTF, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 1, TRXC_SACCHTF, 1 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 2, TRXC_SACCHTF, 2 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 }, }; static const struct trx_frame frame_tchf_ts4[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 2, TRXC_SACCHTF, 2 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 3, TRXC_SACCHTF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 0, TRXC_SACCHTF, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 1, TRXC_SACCHTF, 1 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, }; static const struct trx_frame frame_tchf_ts5[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 2, TRXC_SACCHTF, 2 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 3, TRXC_SACCHTF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 0, TRXC_SACCHTF, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 1, TRXC_SACCHTF, 1 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 }, }; static const struct trx_frame frame_tchf_ts6[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 1, TRXC_SACCHTF, 1 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 2, TRXC_SACCHTF, 2 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 3, TRXC_SACCHTF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 0, TRXC_SACCHTF, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, }; static const struct trx_frame frame_tchf_ts7[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 1, TRXC_SACCHTF, 1 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 2, TRXC_SACCHTF, 2 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 3, TRXC_SACCHTF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_TCHF, 0, TRXC_TCHF, 0 }, - { TRXC_TCHF, 1, TRXC_TCHF, 1 }, - { TRXC_TCHF, 2, TRXC_TCHF, 2 }, - { TRXC_TCHF, 3, TRXC_TCHF, 3 }, - { TRXC_SACCHTF, 0, TRXC_SACCHTF, 0 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 1, L1SCHED_SACCHTF, 1 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 2, L1SCHED_SACCHTF, 2 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 3, L1SCHED_SACCHTF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_TCHF, 0, L1SCHED_TCHF, 0 }, + { L1SCHED_TCHF, 1, L1SCHED_TCHF, 1 }, + { L1SCHED_TCHF, 2, L1SCHED_TCHF, 2 }, + { L1SCHED_TCHF, 3, L1SCHED_TCHF, 3 }, + { L1SCHED_SACCHTF, 0, L1SCHED_SACCHTF, 0 }, }; static const struct trx_frame frame_tchh_ts01[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 0, TRXC_SACCHTH_0, 0 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 0, TRXC_SACCHTH_1, 0 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 1, TRXC_SACCHTH_0, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 1, TRXC_SACCHTH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 2, TRXC_SACCHTH_0, 2 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 2, TRXC_SACCHTH_1, 2 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 3, TRXC_SACCHTH_0, 3 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 3, TRXC_SACCHTH_1, 3 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 0, L1SCHED_SACCHTH_0, 0 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 0, L1SCHED_SACCHTH_1, 0 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 1, L1SCHED_SACCHTH_0, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 1, L1SCHED_SACCHTH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 2, L1SCHED_SACCHTH_0, 2 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 2, L1SCHED_SACCHTH_1, 2 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 3, L1SCHED_SACCHTH_0, 3 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 3, L1SCHED_SACCHTH_1, 3 }, }; static const struct trx_frame frame_tchh_ts23[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 3, TRXC_SACCHTH_0, 3 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 3, TRXC_SACCHTH_1, 3 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 0, TRXC_SACCHTH_0, 0 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 0, TRXC_SACCHTH_1, 0 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 1, TRXC_SACCHTH_0, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 1, TRXC_SACCHTH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 2, TRXC_SACCHTH_0, 2 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 2, TRXC_SACCHTH_1, 2 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 3, L1SCHED_SACCHTH_0, 3 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 3, L1SCHED_SACCHTH_1, 3 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 0, L1SCHED_SACCHTH_0, 0 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 0, L1SCHED_SACCHTH_1, 0 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 1, L1SCHED_SACCHTH_0, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 1, L1SCHED_SACCHTH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 2, L1SCHED_SACCHTH_0, 2 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 2, L1SCHED_SACCHTH_1, 2 }, }; static const struct trx_frame frame_tchh_ts45[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 2, TRXC_SACCHTH_0, 2 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 2, TRXC_SACCHTH_1, 2 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 3, TRXC_SACCHTH_0, 3 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 3, TRXC_SACCHTH_1, 3 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 0, TRXC_SACCHTH_0, 0 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 0, TRXC_SACCHTH_1, 0 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 1, TRXC_SACCHTH_0, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 1, TRXC_SACCHTH_1, 1 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 2, L1SCHED_SACCHTH_0, 2 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 2, L1SCHED_SACCHTH_1, 2 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 3, L1SCHED_SACCHTH_0, 3 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 3, L1SCHED_SACCHTH_1, 3 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 0, L1SCHED_SACCHTH_0, 0 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 0, L1SCHED_SACCHTH_1, 0 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 1, L1SCHED_SACCHTH_0, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 1, L1SCHED_SACCHTH_1, 1 }, }; static const struct trx_frame frame_tchh_ts67[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 1, TRXC_SACCHTH_0, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 1, TRXC_SACCHTH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 2, TRXC_SACCHTH_0, 2 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 2, TRXC_SACCHTH_1, 2 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 3, TRXC_SACCHTH_0, 3 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 3, TRXC_SACCHTH_1, 3 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_0, 0, TRXC_SACCHTH_0, 0 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_TCHH_0, 0, TRXC_TCHH_0, 0 }, - { TRXC_TCHH_1, 0, TRXC_TCHH_1, 0 }, - { TRXC_TCHH_0, 1, TRXC_TCHH_0, 1 }, - { TRXC_TCHH_1, 1, TRXC_TCHH_1, 1 }, - { TRXC_SACCHTH_1, 0, TRXC_SACCHTH_1, 0 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 1, L1SCHED_SACCHTH_0, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 1, L1SCHED_SACCHTH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 2, L1SCHED_SACCHTH_0, 2 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 2, L1SCHED_SACCHTH_1, 2 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 3, L1SCHED_SACCHTH_0, 3 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 3, L1SCHED_SACCHTH_1, 3 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_0, 0, L1SCHED_SACCHTH_0, 0 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_TCHH_0, 0, L1SCHED_TCHH_0, 0 }, + { L1SCHED_TCHH_1, 0, L1SCHED_TCHH_1, 0 }, + { L1SCHED_TCHH_0, 1, L1SCHED_TCHH_0, 1 }, + { L1SCHED_TCHH_1, 1, L1SCHED_TCHH_1, 1 }, + { L1SCHED_SACCHTH_1, 0, L1SCHED_SACCHTH_1, 0 }, }; static const struct trx_frame frame_pdch[104] = { - /* dl_chan dl_bid ul_chan ul_bid */ - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PTCCH, 0, TRXC_PTCCH, 0 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PTCCH, 1, TRXC_PTCCH, 1 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PTCCH, 2, TRXC_PTCCH, 2 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PTCCH, 3, TRXC_PTCCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_PDTCH, 0, TRXC_PDTCH, 0 }, - { TRXC_PDTCH, 1, TRXC_PDTCH, 1 }, - { TRXC_PDTCH, 2, TRXC_PDTCH, 2 }, - { TRXC_PDTCH, 3, TRXC_PDTCH, 3 }, - { TRXC_IDLE, 0, TRXC_IDLE, 0 }, + /* dl_chan dl_bid ul_chan ul_bid */ + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PTCCH, 0, L1SCHED_PTCCH, 0 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PTCCH, 1, L1SCHED_PTCCH, 1 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PTCCH, 2, L1SCHED_PTCCH, 2 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PTCCH, 3, L1SCHED_PTCCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_PDTCH, 0, L1SCHED_PDTCH, 0 }, + { L1SCHED_PDTCH, 1, L1SCHED_PDTCH, 1 }, + { L1SCHED_PDTCH, 2, L1SCHED_PDTCH, 2 }, + { L1SCHED_PDTCH, 3, L1SCHED_PDTCH, 3 }, + { L1SCHED_IDLE, 0, L1SCHED_IDLE, 0 }, }; /* Logical channel mask for a single channel */ @@ -1923,42 +1923,42 @@ /* Logical channel mask for BCCH+CCCH */ #define M64_BCCH_CCCH \ (uint64_t) 0x00 \ - | M64(TRXC_FCCH) \ - | M64(TRXC_SCH) \ - | M64(TRXC_BCCH) \ - | M64(TRXC_RACH) \ - | M64(TRXC_CCCH) + | M64(L1SCHED_FCCH) \ + | M64(L1SCHED_SCH) \ + | M64(L1SCHED_BCCH) \ + | M64(L1SCHED_RACH) \ + | M64(L1SCHED_CCCH) /* Logical channel mask for SDCCH4 (with SACCH, all sub-channels) */ #define M64_SDCCH4 \ (uint64_t) 0x00 \ - | M64(TRXC_SDCCH4_0) | M64(TRXC_SACCH4_0) \ - | M64(TRXC_SDCCH4_1) | M64(TRXC_SACCH4_1) \ - | M64(TRXC_SDCCH4_2) | M64(TRXC_SACCH4_2) \ - | M64(TRXC_SDCCH4_3) | M64(TRXC_SACCH4_3) + | M64(L1SCHED_SDCCH4_0) | M64(L1SCHED_SACCH4_0) \ + | M64(L1SCHED_SDCCH4_1) | M64(L1SCHED_SACCH4_1) \ + | M64(L1SCHED_SDCCH4_2) | M64(L1SCHED_SACCH4_2) \ + | M64(L1SCHED_SDCCH4_3) | M64(L1SCHED_SACCH4_3) /* Logical channel mask for SDCCH8 (with SACCH, all sub-channels) */ #define M64_SDCCH8 \ (uint64_t) 0x00 \ - | M64(TRXC_SDCCH8_0) | M64(TRXC_SACCH8_0) \ - | M64(TRXC_SDCCH8_1) | M64(TRXC_SACCH8_1) \ - | M64(TRXC_SDCCH8_2) | M64(TRXC_SACCH8_2) \ - | M64(TRXC_SDCCH8_3) | M64(TRXC_SACCH8_3) \ - | M64(TRXC_SDCCH8_4) | M64(TRXC_SACCH8_4) \ - | M64(TRXC_SDCCH8_5) | M64(TRXC_SACCH8_5) \ - | M64(TRXC_SDCCH8_6) | M64(TRXC_SACCH8_6) \ - | M64(TRXC_SDCCH8_7) | M64(TRXC_SACCH8_7) + | M64(L1SCHED_SDCCH8_0) | M64(L1SCHED_SACCH8_0) \ + | M64(L1SCHED_SDCCH8_1) | M64(L1SCHED_SACCH8_1) \ + | M64(L1SCHED_SDCCH8_2) | M64(L1SCHED_SACCH8_2) \ + | M64(L1SCHED_SDCCH8_3) | M64(L1SCHED_SACCH8_3) \ + | M64(L1SCHED_SDCCH8_4) | M64(L1SCHED_SACCH8_4) \ + | M64(L1SCHED_SDCCH8_5) | M64(L1SCHED_SACCH8_5) \ + | M64(L1SCHED_SDCCH8_6) | M64(L1SCHED_SACCH8_6) \ + | M64(L1SCHED_SDCCH8_7) | M64(L1SCHED_SACCH8_7) /* Logical channel mask for TCH/F (with SACCH) */ #define M64_TCHF \ (uint64_t) 0x00 \ - | M64(TRXC_TCHF) | M64(TRXC_SACCHTF) + | M64(L1SCHED_TCHF) | M64(L1SCHED_SACCHTF) /* Logical channel mask for TCH/H (with SACCH, all sub-channels) */ #define M64_TCHH \ (uint64_t) 0x00 \ - | M64(TRXC_TCHH_0) | M64(TRXC_SACCHTH_0) \ - | M64(TRXC_TCHH_1) | M64(TRXC_SACCHTH_1) + | M64(L1SCHED_TCHH_0) | M64(L1SCHED_SACCHTH_0) \ + | M64(L1SCHED_TCHH_1) | M64(L1SCHED_SACCHTH_1) /** * A few notes about frame count: @@ -1991,7 +1991,7 @@ { GSM_PCHAN_CCCH_SDCCH4_CBCH, "BCCH+CCCH+SDCCH/4+SACCH/4+CBCH", 102, 0xff, - M64_BCCH_CCCH | M64_SDCCH4 | M64(TRXC_SDCCH4_CBCH), + M64_BCCH_CCCH | M64_SDCCH4 | M64(L1SCHED_SDCCH4_CBCH), frame_bcch_sdcch4_cbch }, { @@ -2003,7 +2003,7 @@ { GSM_PCHAN_SDCCH8_SACCH8C_CBCH, "SDCCH/8+SACCH/8+CBCH", 102, 0xff, - M64_SDCCH8 | M64(TRXC_SDCCH8_CBCH), + M64_SDCCH8 | M64(L1SCHED_SDCCH8_CBCH), frame_sdcch8_cbch }, { @@ -2081,7 +2081,7 @@ { GSM_PCHAN_PDCH, "PDCH", 104, 0xff, - M64(TRXC_PDTCH) | M64(TRXC_PTCCH), + M64(L1SCHED_PDTCH) | M64(L1SCHED_PTCCH), frame_pdch }, }; diff --git a/src/host/trxcon/src/sched_prim.c b/src/host/trxcon/src/sched_prim.c index 847ebd3..9d0101c 100644 --- a/src/host/trxcon/src/sched_prim.c +++ b/src/host/trxcon/src/sched_prim.c @@ -48,7 +48,7 @@ int sched_prim_init(void *ctx, struct trx_ts_prim **prim, size_t pl_len, uint8_t chan_nr, uint8_t link_id) { - enum trx_lchan_type lchan_type; + enum l1sched_lchan_type lchan_type; struct trx_ts_prim *new_prim; uint8_t len; @@ -314,7 +314,7 @@ /* Dequeues a primitive of a given channel type */ static struct trx_ts_prim *prim_dequeue_one(struct llist_head *queue, - enum trx_lchan_type lchan_type) + enum l1sched_lchan_type lchan_type) { struct trx_ts_prim *prim; @@ -344,13 +344,13 @@ * * @param queue transmit queue to take a prim from * @param lchan_type required channel type of a primitive, - * e.g. TRXC_TCHF, TRXC_TCHH_0, or TRXC_TCHH_1 + * e.g. L1SCHED_TCHF, L1SCHED_TCHH_0, or L1SCHED_TCHH_1 * @param facch FACCH (true) or speech (false) prim? * @return either a FACCH, or a TCH primitive if found, * otherwise NULL */ static struct trx_ts_prim *prim_dequeue_tch(struct llist_head *queue, - enum trx_lchan_type lchan_type, bool facch) + enum l1sched_lchan_type lchan_type, bool facch) { struct trx_ts_prim *prim; @@ -388,8 +388,8 @@ struct trx_ts_prim *tch; /* Attempt to find a pair of both FACCH/F and TCH/F frames */ - facch = prim_dequeue_tch(queue, TRXC_TCHF, true); - tch = prim_dequeue_tch(queue, TRXC_TCHF, false); + facch = prim_dequeue_tch(queue, L1SCHED_TCHF, true); + tch = prim_dequeue_tch(queue, L1SCHED_TCHF, false); /* Prioritize FACCH/F, if found */ if (facch) { @@ -429,7 +429,7 @@ * otherwise NULL */ static struct trx_ts_prim *prim_dequeue_tch_h(struct llist_head *queue, - uint32_t fn, enum trx_lchan_type lchan_type) + uint32_t fn, enum l1sched_lchan_type lchan_type) { struct trx_ts_prim *facch; struct trx_ts_prim *tch; @@ -485,12 +485,12 @@ switch (lchan->type) { /* TCH/F requires FACCH/F prioritization */ - case TRXC_TCHF: + case L1SCHED_TCHF: return prim_dequeue_tch_f(queue); /* FACCH/H prioritization is a bit more complex */ - case TRXC_TCHH_0: - case TRXC_TCHH_1: + case L1SCHED_TCHH_0: + case L1SCHED_TCHH_1: return prim_dequeue_tch_h(queue, fn, lchan->type); /* Other kinds of logical channels */ @@ -521,7 +521,7 @@ */ int sched_prim_dummy(struct trx_lchan_state *lchan) { - enum trx_lchan_type chan = lchan->type; + enum l1sched_lchan_type chan = lchan->type; uint8_t tch_mode = lchan->tch_mode; struct trx_ts_prim *prim; uint8_t prim_buffer[40]; diff --git a/src/host/trxcon/src/sched_trx.c b/src/host/trxcon/src/sched_trx.c index 618ce8b..fe9f783 100644 --- a/src/host/trxcon/src/sched_trx.c +++ b/src/host/trxcon/src/sched_trx.c @@ -47,7 +47,7 @@ const struct trx_frame *frame; struct trx_lchan_state *lchan; trx_lchan_tx_func *handler; - enum trx_lchan_type chan; + enum l1sched_lchan_type chan; uint8_t offset; struct trx_ts *ts; int i; @@ -124,8 +124,8 @@ /* Handover RACH needs to be handled regardless of the * current channel type and the associated handler. */ - if (PRIM_IS_RACH(lchan->prim) && lchan->prim->chan != TRXC_RACH) - handler = trx_lchan_desc[TRXC_RACH].tx_fn; + if (PRIM_IS_RACH(lchan->prim) && lchan->prim->chan != L1SCHED_RACH) + handler = trx_lchan_desc[L1SCHED_RACH].tx_fn; /* Poke lchan handler */ handler(trx, ts, lchan, &br[i]); @@ -263,7 +263,7 @@ enum gsm_phys_chan_config config) { struct trx_lchan_state *lchan; - enum trx_lchan_type type; + enum l1sched_lchan_type type; struct trx_ts *ts; /* Try to find specified ts */ @@ -294,7 +294,7 @@ INIT_LLIST_HEAD(&ts->lchans); /* Allocate channel states */ - for (type = 0; type < _TRX_CHAN_MAX; type++) { + for (type = 0; type < _L1SCHED_CHAN_MAX; type++) { if (!LAYOUT_HAS_LCHAN(ts->mf_layout, type)) continue; @@ -387,7 +387,7 @@ } struct trx_lchan_state *sched_trx_find_lchan(struct trx_ts *ts, - enum trx_lchan_type chan) + enum l1sched_lchan_type chan) { struct trx_lchan_state *lchan; @@ -426,7 +426,7 @@ return rc; } -int sched_trx_activate_lchan(struct trx_ts *ts, enum trx_lchan_type chan) +int sched_trx_activate_lchan(struct trx_ts *ts, enum l1sched_lchan_type chan) { const struct trx_lchan_desc *lchan_desc = &trx_lchan_desc[chan]; struct trx_lchan_state *lchan; @@ -516,7 +516,7 @@ memset(&lchan->tdma, 0x00, sizeof(lchan->tdma)); } -int sched_trx_deactivate_lchan(struct trx_ts *ts, enum trx_lchan_type chan) +int sched_trx_deactivate_lchan(struct trx_ts *ts, enum l1sched_lchan_type chan) { struct trx_lchan_state *lchan; @@ -585,18 +585,18 @@ return GSM_PCHAN_NONE; } -enum trx_lchan_type sched_trx_chan_nr2lchan_type(uint8_t chan_nr, +enum l1sched_lchan_type sched_trx_chan_nr2lchan_type(uint8_t chan_nr, uint8_t link_id) { int i; /* Iterate over all known lchan types */ - for (i = 0; i < _TRX_CHAN_MAX; i++) + for (i = 0; i < _L1SCHED_CHAN_MAX; i++) if (trx_lchan_desc[i].chan_nr == (chan_nr & 0xf8)) if (trx_lchan_desc[i].link_id == link_id) return i; - return TRXC_IDLE; + return L1SCHED_IDLE; } static void sched_trx_a5_burst_dec(struct trx_lchan_state *lchan, @@ -717,7 +717,7 @@ struct trx_ts *ts; trx_lchan_rx_func *handler; - enum trx_lchan_type chan; + enum l1sched_lchan_type chan; uint8_t offset, bid; int rc; -- To view, visit https://gerrit.osmocom.org/c/osmocom-bb/+/28545 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmocom-bb Gerrit-Branch: master Gerrit-Change-Id: I76a7d9fed3d6ab47725fceb803aa16ddbfd2e1a2 Gerrit-Change-Number: 28545 Gerrit-PatchSet: 2 Gerrit-Owner: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: laforge <laforge(a)osmocom.org> Gerrit-Reviewer: pespin <pespin(a)sysmocom.de> Gerrit-MessageType: merged

2 years, 11 months

Change in osmocom-bb[master]: trxcon: group *.c files into 'src' directory

by fixeria

fixeria has submitted this change. ( https://gerrit.osmocom.org/c/osmocom-bb/+/28543 ) Change subject: trxcon: group *.c files into 'src' directory ...................................................................... trxcon: group *.c files into 'src' directory Change-Id: I1a3703e48507cd51cd8198f13b993f54c44bc41e Related: OS#5599, OS#3761 --- M src/host/trxcon/.gitignore M src/host/trxcon/Makefile.am M src/host/trxcon/configure.ac A src/host/trxcon/src/Makefile.am R src/host/trxcon/src/l1ctl.c R src/host/trxcon/src/l1ctl_link.c R src/host/trxcon/src/logging.c R src/host/trxcon/src/sched_clck.c R src/host/trxcon/src/sched_lchan_common.c R src/host/trxcon/src/sched_lchan_desc.c R src/host/trxcon/src/sched_lchan_pdtch.c R src/host/trxcon/src/sched_lchan_rach.c R src/host/trxcon/src/sched_lchan_sch.c R src/host/trxcon/src/sched_lchan_tchf.c R src/host/trxcon/src/sched_lchan_tchh.c R src/host/trxcon/src/sched_lchan_xcch.c R src/host/trxcon/src/sched_mframe.c R src/host/trxcon/src/sched_prim.c R src/host/trxcon/src/sched_trx.c R src/host/trxcon/src/trx_if.c R src/host/trxcon/src/trxcon.c 21 files changed, 46 insertions(+), 45 deletions(-) Approvals: Jenkins Builder: Verified pespin: Looks good to me, but someone else must approve laforge: Looks good to me, approved diff --git a/src/host/trxcon/.gitignore b/src/host/trxcon/.gitignore index fe90e43..1cc7ffb 100644 --- a/src/host/trxcon/.gitignore +++ b/src/host/trxcon/.gitignore @@ -20,7 +20,7 @@ *.o *.a -trxcon +/src/trxcon # various .version diff --git a/src/host/trxcon/Makefile.am b/src/host/trxcon/Makefile.am index aa0ae56..276eb06 100644 --- a/src/host/trxcon/Makefile.am +++ b/src/host/trxcon/Makefile.am @@ -2,50 +2,7 @@ SUBDIRS = \ include \ - $(NULL) - -AM_CPPFLAGS = \ - $(all_includes) \ - -I$(top_srcdir)/include \ - $(NULL) - -AM_CFLAGS = \ - -Wall \ - $(LIBOSMOCORE_CFLAGS) \ - $(LIBOSMOCODING_CFLAGS) \ - $(LIBOSMOGSM_CFLAGS) \ - $(NULL) - -bin_PROGRAMS = trxcon - -trxcon_SOURCES = \ - l1ctl_link.c \ - l1ctl.c \ - trx_if.c \ - logging.c \ - trxcon.c \ - $(NULL) - -# Scheduler -trxcon_SOURCES += \ - sched_lchan_common.c \ - sched_lchan_pdtch.c \ - sched_lchan_desc.c \ - sched_lchan_xcch.c \ - sched_lchan_tchf.c \ - sched_lchan_tchh.c \ - sched_lchan_rach.c \ - sched_lchan_sch.c \ - sched_mframe.c \ - sched_clck.c \ - sched_prim.c \ - sched_trx.c \ - $(NULL) - -trxcon_LDADD = \ - $(LIBOSMOCORE_LIBS) \ - $(LIBOSMOCODING_LIBS) \ - $(LIBOSMOGSM_LIBS) \ + src \ $(NULL) BUILT_SOURCES = \ diff --git a/src/host/trxcon/configure.ac b/src/host/trxcon/configure.ac index 0e5ce6f..68bb3bd 100644 --- a/src/host/trxcon/configure.ac +++ b/src/host/trxcon/configure.ac @@ -35,5 +35,6 @@ include/osmocom/Makefile include/osmocom/bb/Makefile include/osmocom/bb/trxcon/Makefile + src/Makefile Makefile]) AC_OUTPUT diff --git a/src/host/trxcon/src/Makefile.am b/src/host/trxcon/src/Makefile.am new file mode 100644 index 0000000..bc2aa91 --- /dev/null +++ b/src/host/trxcon/src/Makefile.am @@ -0,0 +1,43 @@ +AM_CPPFLAGS = \ + $(all_includes) \ + -I$(top_srcdir)/include \ + $(NULL) + +AM_CFLAGS = \ + -Wall \ + $(LIBOSMOCORE_CFLAGS) \ + $(LIBOSMOCODING_CFLAGS) \ + $(LIBOSMOGSM_CFLAGS) \ + $(NULL) + +bin_PROGRAMS = trxcon + +trxcon_SOURCES = \ + l1ctl_link.c \ + l1ctl.c \ + trx_if.c \ + logging.c \ + trxcon.c \ + $(NULL) + +# Scheduler +trxcon_SOURCES += \ + sched_lchan_common.c \ + sched_lchan_pdtch.c \ + sched_lchan_desc.c \ + sched_lchan_xcch.c \ + sched_lchan_tchf.c \ + sched_lchan_tchh.c \ + sched_lchan_rach.c \ + sched_lchan_sch.c \ + sched_mframe.c \ + sched_clck.c \ + sched_prim.c \ + sched_trx.c \ + $(NULL) + +trxcon_LDADD = \ + $(LIBOSMOCORE_LIBS) \ + $(LIBOSMOCODING_LIBS) \ + $(LIBOSMOGSM_LIBS) \ + $(NULL) diff --git a/src/host/trxcon/l1ctl.c b/src/host/trxcon/src/l1ctl.c similarity index 100% rename from src/host/trxcon/l1ctl.c rename to src/host/trxcon/src/l1ctl.c diff --git a/src/host/trxcon/l1ctl_link.c b/src/host/trxcon/src/l1ctl_link.c similarity index 100% rename from src/host/trxcon/l1ctl_link.c rename to src/host/trxcon/src/l1ctl_link.c diff --git a/src/host/trxcon/logging.c b/src/host/trxcon/src/logging.c similarity index 100% rename from src/host/trxcon/logging.c rename to src/host/trxcon/src/logging.c diff --git a/src/host/trxcon/sched_clck.c b/src/host/trxcon/src/sched_clck.c similarity index 100% rename from src/host/trxcon/sched_clck.c rename to src/host/trxcon/src/sched_clck.c diff --git a/src/host/trxcon/sched_lchan_common.c b/src/host/trxcon/src/sched_lchan_common.c similarity index 100% rename from src/host/trxcon/sched_lchan_common.c rename to src/host/trxcon/src/sched_lchan_common.c diff --git a/src/host/trxcon/sched_lchan_desc.c b/src/host/trxcon/src/sched_lchan_desc.c similarity index 100% rename from src/host/trxcon/sched_lchan_desc.c rename to src/host/trxcon/src/sched_lchan_desc.c diff --git a/src/host/trxcon/sched_lchan_pdtch.c b/src/host/trxcon/src/sched_lchan_pdtch.c similarity index 100% rename from src/host/trxcon/sched_lchan_pdtch.c rename to src/host/trxcon/src/sched_lchan_pdtch.c diff --git a/src/host/trxcon/sched_lchan_rach.c b/src/host/trxcon/src/sched_lchan_rach.c similarity index 100% rename from src/host/trxcon/sched_lchan_rach.c rename to src/host/trxcon/src/sched_lchan_rach.c diff --git a/src/host/trxcon/sched_lchan_sch.c b/src/host/trxcon/src/sched_lchan_sch.c similarity index 100% rename from src/host/trxcon/sched_lchan_sch.c rename to src/host/trxcon/src/sched_lchan_sch.c diff --git a/src/host/trxcon/sched_lchan_tchf.c b/src/host/trxcon/src/sched_lchan_tchf.c similarity index 100% rename from src/host/trxcon/sched_lchan_tchf.c rename to src/host/trxcon/src/sched_lchan_tchf.c diff --git a/src/host/trxcon/sched_lchan_tchh.c b/src/host/trxcon/src/sched_lchan_tchh.c similarity index 100% rename from src/host/trxcon/sched_lchan_tchh.c rename to src/host/trxcon/src/sched_lchan_tchh.c diff --git a/src/host/trxcon/sched_lchan_xcch.c b/src/host/trxcon/src/sched_lchan_xcch.c similarity index 100% rename from src/host/trxcon/sched_lchan_xcch.c rename to src/host/trxcon/src/sched_lchan_xcch.c diff --git a/src/host/trxcon/sched_mframe.c b/src/host/trxcon/src/sched_mframe.c similarity index 100% rename from src/host/trxcon/sched_mframe.c rename to src/host/trxcon/src/sched_mframe.c diff --git a/src/host/trxcon/sched_prim.c b/src/host/trxcon/src/sched_prim.c similarity index 100% rename from src/host/trxcon/sched_prim.c rename to src/host/trxcon/src/sched_prim.c diff --git a/src/host/trxcon/sched_trx.c b/src/host/trxcon/src/sched_trx.c similarity index 100% rename from src/host/trxcon/sched_trx.c rename to src/host/trxcon/src/sched_trx.c diff --git a/src/host/trxcon/trx_if.c b/src/host/trxcon/src/trx_if.c similarity index 100% rename from src/host/trxcon/trx_if.c rename to src/host/trxcon/src/trx_if.c diff --git a/src/host/trxcon/trxcon.c b/src/host/trxcon/src/trxcon.c similarity index 100% rename from src/host/trxcon/trxcon.c rename to src/host/trxcon/src/trxcon.c -- To view, visit https://gerrit.osmocom.org/c/osmocom-bb/+/28543 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmocom-bb Gerrit-Branch: master Gerrit-Change-Id: I1a3703e48507cd51cd8198f13b993f54c44bc41e Gerrit-Change-Number: 28543 Gerrit-PatchSet: 1 Gerrit-Owner: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: laforge <laforge(a)osmocom.org> Gerrit-Reviewer: pespin <pespin(a)sysmocom.de> Gerrit-MessageType: merged

2 years, 11 months

Change in osmocom-bb[master]: trxcon: rename 'enum trx_lchan_type' and its items

by fixeria

fixeria has posted comments on this change. ( https://gerrit.osmocom.org/c/osmocom-bb/+/28545 ) Change subject: trxcon: rename 'enum trx_lchan_type' and its items ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://gerrit.osmocom.org/c/osmocom-bb/+/28545 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmocom-bb Gerrit-Branch: master Gerrit-Change-Id: I76a7d9fed3d6ab47725fceb803aa16ddbfd2e1a2 Gerrit-Change-Number: 28545 Gerrit-PatchSet: 2 Gerrit-Owner: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: laforge <laforge(a)osmocom.org> Gerrit-Reviewer: pespin <pespin(a)sysmocom.de> Gerrit-Comment-Date: Mon, 11 Jul 2022 19:33:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

2 years, 11 months

Change in osmocom-bb[master]: trxcon: use 'l1sched_' prefix for scheduler API

by fixeria

fixeria has posted comments on this change. ( https://gerrit.osmocom.org/c/osmocom-bb/+/28546 ) Change subject: trxcon: use 'l1sched_' prefix for scheduler API ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://gerrit.osmocom.org/c/osmocom-bb/+/28546 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmocom-bb Gerrit-Branch: master Gerrit-Change-Id: I370aa5084a4e3eb94168b96df94dbbee606adaab Gerrit-Change-Number: 28546 Gerrit-PatchSet: 3 Gerrit-Owner: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: laforge <laforge(a)osmocom.org> Gerrit-Reviewer: pespin <pespin(a)sysmocom.de> Gerrit-Comment-Date: Mon, 11 Jul 2022 19:33:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

2 years, 11 months

Change in osmocom-bb[master]: trxcon: merge 'sched_trx.h' and 'scheduler.h' into 'l1sched.h'

by fixeria

fixeria has posted comments on this change. ( https://gerrit.osmocom.org/c/osmocom-bb/+/28547 ) Change subject: trxcon: merge 'sched_trx.h' and 'scheduler.h' into 'l1sched.h' ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://gerrit.osmocom.org/c/osmocom-bb/+/28547 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmocom-bb Gerrit-Branch: master Gerrit-Change-Id: Ide1e3ccdf32fdc255acc943e0c0936d15cf0c680 Gerrit-Change-Number: 28547 Gerrit-PatchSet: 3 Gerrit-Owner: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: Jenkins Builder Gerrit-Reviewer: fixeria <vyanitskiy(a)sysmocom.de> Gerrit-Reviewer: laforge <laforge(a)osmocom.org> Gerrit-Reviewer: pespin <pespin(a)sysmocom.de> Gerrit-Comment-Date: Mon, 11 Jul 2022 19:33:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

2 years, 11 months

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