Re: SIMtrace v0.6 schema

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hi Kevin. I took a look at your shema, here are my thoughts: The SC_SW line controls all analog switch pins. I think you should be a bit more selective here. To create a situation like this for example: VCC, RST, CLK are connected through and I/O is connected to the man in the middle who can manipulate the traffic in realtime. I have looked at the QS3245 datasheet. It has only one OE input pin ;-/ With your current design you will have do generate the smartcard clock yourself, you could use the clock from the target (with care!) when you can switch at least I/O seperatly. You can leave the VPP away, it is deprecated. (save PCB-Space ;-) Maybe you can leave Jtag away (save even more PCB-Space ;-) the AT91SAM7 series have fancy bootloaders - but maybe you will need the JTAG for debugging so it is your decision. You should give the BATT-PWR/USB-PWR construct a short test. Maybe it is problematic when one power source drives into another that is switched off. regards. Philipp - -- ______________________________________ Philipp Fabian Benedikt Maier philipp.maier(a)runningserver.com Funk: DO5DXT http://www.runningserver.com http://www.diskettenschlitz.de ______________________________________