19 Feb
2012
19 Feb
'12
9:03 a.m.
Hi
On Sun, Feb 19, 2012 at 1:02 AM, Peter Stuge peter@stuge.se wrote:
Peter Stuge wrote:
Perhaps writing to the FIFO can happen already when initially receiving the data from the serial port
Another approach is to do copying with interrupts enabled. It might then instead require a bit from the buffer management, to avoid the receive interrupt from stomping on unsent data.
Are FIQ disabled as well ? Or could we move uart RX to fiq ?
Cheers,
Sylvain