pespin has uploaded this change for review. ( https://gerrit.osmocom.org/c/libosmo-gprs/+/33770 )
Change subject: rlcmac: Introduce L1CTL-CCCH_READY.ind primitive ......................................................................
rlcmac: Introduce L1CTL-CCCH_READY.ind primitive
This is used by lower layer L1CTL to notify the upper layer RLCMAC when it's prepared to use CCCH.
Change-Id: I4cfb1e2db217a97b7a1dc8849cd13d58e4034c56 --- M include/osmocom/gprs/rlcmac/rlcmac_prim.h M src/rlcmac/gre.c M src/rlcmac/rlcmac_prim.c M tests/rlcmac/rlcmac_prim_test.err M tests/rlcmac/rlcmac_prim_test.ok 5 files changed, 62 insertions(+), 34 deletions(-)
git pull ssh://gerrit.osmocom.org:29418/libosmo-gprs refs/changes/70/33770/1
diff --git a/include/osmocom/gprs/rlcmac/rlcmac_prim.h b/include/osmocom/gprs/rlcmac/rlcmac_prim.h index 16d43d1..70d1075 100644 --- a/include/osmocom/gprs/rlcmac/rlcmac_prim.h +++ b/include/osmocom/gprs/rlcmac/rlcmac_prim.h @@ -113,6 +113,7 @@ OSMO_GPRS_RLCMAC_L1CTL_CFG_DL_TBF, OSMO_GPRS_RLCMAC_L1CTL_PDCH_ESTABLISH, OSMO_GPRS_RLCMAC_L1CTL_PDCH_RELEASE, + OSMO_GPRS_RLCMAC_L1CTL_CCCH_READY, };
extern const struct value_string osmo_gprs_rlcmac_l1ctl_prim_type_names[]; @@ -192,6 +193,9 @@ } fhp; /* fh == true */ }; } pdch_est_req; + /* OSMO_GPRS_RLCMAC_L1CTL_CCCH_READY | Ind */ + struct { + } ccch_ready; }; };
@@ -231,3 +235,4 @@ struct osmo_gprs_rlcmac_prim *osmo_gprs_rlcmac_prim_alloc_l1ctl_pdch_rts_ind(uint8_t ts_nr, uint32_t fn, uint8_t usf); struct osmo_gprs_rlcmac_prim *gprs_rlcmac_prim_alloc_l1ctl_pdch_est_req(uint8_t ts_nr, uint8_t tsc, uint8_t ta); struct osmo_gprs_rlcmac_prim *gprs_rlcmac_prim_alloc_l1ctl_pdch_rel_req(void); +struct osmo_gprs_rlcmac_prim *osmo_gprs_rlcmac_prim_alloc_l1ctl_ccch_ready_ind(void); diff --git a/src/rlcmac/gre.c b/src/rlcmac/gre.c index 3d2297f..b941435 100644 --- a/src/rlcmac/gre.c +++ b/src/rlcmac/gre.c @@ -39,9 +39,9 @@ /* We have to defer going to CCCH a bit to leave space for last PKT CTRL ACK to be transmitted */ static void _defer_pkt_idle_timer_cb(void *data) { - struct gprs_rlcmac_entity *gre = data; + //struct gprs_rlcmac_entity *gre = data; gprs_rlcmac_submit_l1ctl_pdch_rel_req(); - gprs_rlcmac_entity_start_ul_tbf_pkt_acc_proc_if_needed(gre); + /* Wait for L1CTL-CCCH_READY.ind before attempting new pkt-access-procedure if needed. */ }
struct gprs_rlcmac_entity *gprs_rlcmac_entity_alloc(uint32_t tlli) diff --git a/src/rlcmac/rlcmac_prim.c b/src/rlcmac/rlcmac_prim.c index 5261a73..d3df15f 100644 --- a/src/rlcmac/rlcmac_prim.c +++ b/src/rlcmac/rlcmac_prim.c @@ -72,6 +72,7 @@ { OSMO_GPRS_RLCMAC_L1CTL_CFG_DL_TBF, "CFG_DL_TBF" }, { OSMO_GPRS_RLCMAC_L1CTL_PDCH_ESTABLISH, "PDCH_ESTABLISH" }, { OSMO_GPRS_RLCMAC_L1CTL_PDCH_RELEASE, "PDCH_RELEASE" }, + { OSMO_GPRS_RLCMAC_L1CTL_CCCH_READY, "CCCH_READY" }, { 0, NULL } };
@@ -346,6 +347,14 @@ return rlcmac_prim; }
+/* L1CTL-CCCH_READY.ind */ +struct osmo_gprs_rlcmac_prim *osmo_gprs_rlcmac_prim_alloc_l1ctl_ccch_ready_ind(void) +{ + struct osmo_gprs_rlcmac_prim *rlcmac_prim; + rlcmac_prim = rlcmac_prim_l1ctl_alloc(OSMO_GPRS_RLCMAC_L1CTL_CCCH_READY, PRIM_OP_INDICATION, 0); + return rlcmac_prim; +} + int gprs_rlcmac_prim_handle_unsupported(struct osmo_gprs_rlcmac_prim *rlcmac_prim) { LOGRLCMAC(LOGL_ERROR, "Unsupported rlcmac_prim! %s\n", osmo_gprs_rlcmac_prim_name(rlcmac_prim)); @@ -602,6 +611,19 @@ return rc; }
+static int rlcmac_prim_handle_l1ctl_ccch_ready_ind(struct osmo_gprs_rlcmac_prim *rlcmac_prim) +{ + struct gprs_rlcmac_entity *gre; + + /* Lower layers are synced to CCCH, check if some MS was waiting for + * that condition to start packet-access-procedure (see + * _defer_pkt_idle_timer_cb) */ + llist_for_each_entry(gre, &g_rlcmac_ctx->gre_list, entry) + gprs_rlcmac_entity_start_ul_tbf_pkt_acc_proc_if_needed(gre); + return 0; + +} + static int gprs_rlcmac_prim_l1ctl_lower_up(struct osmo_gprs_rlcmac_prim *rlcmac_prim) { int rc; @@ -616,6 +638,9 @@ case OSMO_PRIM(OSMO_GPRS_RLCMAC_L1CTL_CCCH_DATA, PRIM_OP_INDICATION): rc = rlcmac_prim_handle_l1ctl_ccch_data_ind(rlcmac_prim); break; + case OSMO_PRIM(OSMO_GPRS_RLCMAC_L1CTL_CCCH_READY, PRIM_OP_INDICATION): + rc = rlcmac_prim_handle_l1ctl_ccch_ready_ind(rlcmac_prim); + break; default: rc = -ENOTSUP; } diff --git a/tests/rlcmac/rlcmac_prim_test.err b/tests/rlcmac/rlcmac_prim_test.err index c6a7a73..fd43fe3 100644 --- a/tests/rlcmac/rlcmac_prim_test.err +++ b/tests/rlcmac/rlcmac_prim_test.err @@ -175,19 +175,7 @@ DLGLOBAL INFO UL_TBF{FLOW}: Deallocated DLGLOBAL INFO Tx L1CTL-PDCH_REL.req DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_RELEASE.request -DLGLOBAL INFO UL_TBF{NEW}: Allocated -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Allocated -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START -DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START -DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7a -DLGLOBAL DEBUG Tx to lower layers: L1CTL-RACH.request -DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to WAIT_CCCH_IMM_ASS DLGLOBAL INFO DL_TBF_ASS{IDLE}: Deallocated -DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Deallocated -DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=1 (release) -DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request -DLGLOBAL INFO UL_TBF{ASSIGN}: Deallocated DLGLOBAL INFO Rx from upper layers: GRR-UNITDATA.request DLGLOBAL INFO TLLI=0x00002342 not found, creating entity on the fly DLGLOBAL INFO DL_TBF_ASS{IDLE}: Allocated @@ -196,7 +184,7 @@ DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7c +DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7a DLGLOBAL DEBUG Tx to lower layers: L1CTL-RACH.request DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to WAIT_CCCH_IMM_ASS DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication @@ -234,7 +222,7 @@ DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x79 +DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7c DLGLOBAL DEBUG Tx to lower layers: L1CTL-RACH.request DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to WAIT_CCCH_IMM_ASS DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication @@ -269,7 +257,7 @@ DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7d +DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x79 DLGLOBAL DEBUG Tx to lower layers: L1CTL-RACH.request DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to WAIT_CCCH_IMM_ASS DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication @@ -304,7 +292,7 @@ DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7a +DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7d DLGLOBAL DEBUG Tx to lower layers: L1CTL-RACH.request DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to WAIT_CCCH_IMM_ASS DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication @@ -349,7 +337,7 @@ DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7b +DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7a DLGLOBAL DEBUG Tx to lower layers: L1CTL-RACH.request DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to WAIT_CCCH_IMM_ASS DLGLOBAL INFO Rx from upper layers: GRR-UNITDATA.request @@ -495,7 +483,7 @@ DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7a +DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7b DLGLOBAL DEBUG Tx to lower layers: L1CTL-RACH.request DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to WAIT_CCCH_IMM_ASS DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_DATA.request @@ -523,7 +511,7 @@ DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7b +DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7a DLGLOBAL DEBUG Tx to lower layers: L1CTL-RACH.request DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to WAIT_CCCH_IMM_ASS DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication @@ -703,7 +691,7 @@ DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7e +DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7b DLGLOBAL DEBUG Tx to lower layers: L1CTL-RACH.request DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to WAIT_CCCH_IMM_ASS DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication @@ -812,7 +800,7 @@ DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN -DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7c +DLGLOBAL INFO UL_TBF_ASS{IDLE}: Send RACH.req ra=0x7e DLGLOBAL DEBUG Tx to lower layers: L1CTL-RACH.request DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to WAIT_CCCH_IMM_ASS DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication diff --git a/tests/rlcmac/rlcmac_prim_test.ok b/tests/rlcmac/rlcmac_prim_test.ok index 731bd20..daea0f2 100644 --- a/tests/rlcmac/rlcmac_prim_test.ok +++ b/tests/rlcmac/rlcmac_prim_test.ok @@ -45,11 +45,9 @@ sys={20.027690}, mono={20.027690}: clock_override_add sys={20.027690}, mono={20.027690}: Expect defer_pkt_idle_timer timeout test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_RELEASE.request -test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7a -test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=1 ul_slotmask=0x00 === test_ul_tbf_t3166_timeout start === sys={0.000000}, mono={0.000000}: clock_override_set -test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7c +test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7a test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_ESTABLISH.request test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x80 test_rlcmac_prim_up_cb(): Rx GMMRR-LLC_TRANSMITTED.indication TLLI=0x00002342 @@ -58,7 +56,7 @@ sys={5.000000}, mono={5.000000}: Expect T3166 timeout test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x00 test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_RELEASE.request -test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x79 +test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7c test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_ESTABLISH.request test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x80 test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_DATA.request fn=4 ts=7 data_len=34 data=[3c 01 01 00 00 23 42 01 c0 00 08 01 01 d5 71 00 00 08 29 26 24 00 00 00 00 71 62 f2 24 6c 84 44 04 00 ] @@ -66,7 +64,7 @@ sys={10.000000}, mono={10.000000}: Expect T3166 timeout test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x00 test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_RELEASE.request -test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7d +test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x79 test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_ESTABLISH.request test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x80 test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_DATA.request fn=4 ts=7 data_len=34 data=[3c 01 01 00 00 23 42 01 c0 00 08 01 01 d5 71 00 00 08 29 26 24 00 00 00 00 71 62 f2 24 6c 84 44 04 00 ] @@ -74,7 +72,7 @@ sys={15.000000}, mono={15.000000}: Expect T3166 timeout test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x00 test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_RELEASE.request -test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7a +test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7d test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_ESTABLISH.request test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x80 test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_DATA.request fn=4 ts=7 data_len=34 data=[3c 01 01 00 00 23 42 01 c0 00 08 01 01 d5 71 00 00 08 29 26 24 00 00 00 00 71 62 f2 24 6c 84 44 04 00 ] @@ -87,7 +85,7 @@ test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_RELEASE.request === test_ul_tbf_n3104_timeout start === sys={0.000000}, mono={0.000000}: clock_override_set -test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7b +test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7a test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_ESTABLISH.request test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x80 RTS 0: FN=8 @@ -117,7 +115,7 @@ RTS 11: FN=56 test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x00 test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_RELEASE.request -test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7a +test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7b test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_DATA.request fn=56 ts=7 data_len=34 data=[00 01 04 3d 00 00 23 42 71 62 f2 24 6c 84 44 04 11 e5 10 00 e2 18 f2 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 00 ] test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_ESTABLISH.request test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x80 @@ -125,7 +123,7 @@ test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x00 === test_ul_tbf_t3182_timeout start === sys={0.000000}, mono={0.000000}: clock_override_set -test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7b +test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7a test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_ESTABLISH.request test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x80 test_rlcmac_prim_up_cb(): Rx GMMRR-LLC_TRANSMITTED.indication TLLI=0x00002342 @@ -161,7 +159,7 @@ test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_RELEASE.request === test_ul_tbf_countdown_procedure start === sys={0.000000}, mono={0.000000}: clock_override_set -test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7e +test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7b test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_ESTABLISH.request test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x80 test_rlcmac_prim_up_cb(): Rx GMMRR-LLC_TRANSMITTED.indication TLLI=0x00002342 @@ -182,7 +180,7 @@ test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x00 === test_ul_tbf_request_another_ul_tbf start === sys={0.000000}, mono={0.000000}: clock_override_set -test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7c +test_rlcmac_prim_down_cb(): Rx L1CTL-RACH.request ra=0x7e test_rlcmac_prim_down_cb(): Rx L1CTL-PDCH_ESTABLISH.request test_rlcmac_prim_down_cb(): Rx L1CTL-CFG_UL_TBF.request ul_tbf_nr=0 ul_slotmask=0x80 test_rlcmac_prim_up_cb(): Rx GMMRR-LLC_TRANSMITTED.indication TLLI=0x00002342
-
pespin