[M] Change in libosmo-gprs[master]: rlcmac: fix typo in TBF CFG logging messages

24 Apr 2023

pespin has submitted this change. ( https://gerrit.osmocom.org/c/libosmo-gprs/+/32412 )
Change subject: rlcmac: fix typo in TBF CFG logging messages
......................................................................
rlcmac: fix typo in TBF CFG logging messages
Change-Id: I46bcbdb35ee52575e778464b93a8a3b21b8f465b
Related: OS#5500
---
M src/rlcmac/tbf_dl.c
M src/rlcmac/tbf_ul_fsm.c
M tests/rlcmac/rlcmac_prim_test.err
3 files changed, 45 insertions(+), 35 deletions(-)
Approvals:
  Jenkins Builder: Verified
  pespin: Looks good to me, approved

diff --git a/src/rlcmac/tbf_dl.c b/src/rlcmac/tbf_dl.c
index 741f2a0..77110a9 100644
--- a/src/rlcmac/tbf_dl.c
+++ b/src/rlcmac/tbf_dl.c
@@ -100,7 +100,7 @@
    struct osmo_gprs_rlcmac_prim *rlcmac_prim;
    uint8_t dl_slotmask = dl_tbf_dl_slotmask(dl_tbf);
-	 LOGPTBFDL(dl_tbf, LOGL_INFO, "Send L1CTL-CF_DL_TBF.req dl_slotmask=0x%02x dl_tfi=%u\n",
+	 LOGPTBFDL(dl_tbf, LOGL_INFO, "Send L1CTL-CFG_DL_TBF.req dl_slotmask=0x%02x dl_tfi=%u\n",
    	   dl_slotmask, dl_tbf->cur_alloc.dl_tfi);
    rlcmac_prim = gprs_rlcmac_prim_alloc_l1ctl_cfg_dl_tbf_req(dl_tbf->tbf.nr,
    							  dl_slotmask,
diff --git a/src/rlcmac/tbf_ul_fsm.c b/src/rlcmac/tbf_ul_fsm.c
index 1e56d18..dbc5954 100644
--- a/src/rlcmac/tbf_ul_fsm.c
+++ b/src/rlcmac/tbf_ul_fsm.c
@@ -76,7 +76,7 @@
ul_slotmask = release ? 0 : ul_tbf_ul_slotmask(ctx->ul_tbf);
-	LOGPFSML(ctx->fi, LOGL_INFO, "Send L1CTL-CF_UL_TBF.req ul_tbf_nr=%u ul_slotmask=0x%02x %s\n",
+	LOGPFSML(ctx->fi, LOGL_INFO, "Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=%u ul_slotmask=0x%02x %s\n",
    	 ctx->tbf->nr, ul_slotmask, release ? "(release)" : "(reconf)");
    rlcmac_prim = gprs_rlcmac_prim_alloc_l1ctl_cfg_ul_tbf_req(ctx->tbf->nr, ul_slotmask);
    return gprs_rlcmac_prim_call_down_cb(rlcmac_prim);
diff --git a/tests/rlcmac/rlcmac_prim_test.err b/tests/rlcmac/rlcmac_prim_test.err
index 2e0740b..48329d5 100644
--- a/tests/rlcmac/rlcmac_prim_test.err
+++ b/tests/rlcmac/rlcmac_prim_test.err
@@ -15,7 +15,7 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -63,7 +63,7 @@
 DLGLOBAL DEBUG (ts=7,fn=21,usf=0) Tx Pkt Control Ack (UL ACK/NACK poll)
 DLGLOBAL DEBUG GRE(00002342) Tx Packet Control Ack
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Deallocated
-DLGLOBAL INFO UL_TBF{RELEASING}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{RELEASING}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{RELEASING}: Deallocated
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_DATA.request
@@ -85,14 +85,14 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
 DLGLOBAL INFO UL_TBF{FLOW}: Timeout of T3164
 DLGLOBAL INFO UL_TBF{FLOW}: T3164 timeout attempts=1
 DLGLOBAL INFO UL_TBF{FLOW}: state_chg to NEW
-DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START
 DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START
@@ -106,14 +106,14 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
 DLGLOBAL INFO UL_TBF{FLOW}: Timeout of T3164
 DLGLOBAL INFO UL_TBF{FLOW}: T3164 timeout attempts=2
 DLGLOBAL INFO UL_TBF{FLOW}: state_chg to NEW
-DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START
 DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START
@@ -127,14 +127,14 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
 DLGLOBAL INFO UL_TBF{FLOW}: Timeout of T3164
 DLGLOBAL INFO UL_TBF{FLOW}: T3164 timeout attempts=3
 DLGLOBAL INFO UL_TBF{FLOW}: state_chg to NEW
-DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START
 DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START
@@ -148,7 +148,7 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -156,7 +156,7 @@
 DLGLOBAL INFO UL_TBF{FLOW}: T3164 timeout attempts=4
 DLGLOBAL NOTICE UL_TBF{FLOW}: TBF establishment failure (T3164 timeout attempts=4)
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Deallocated
-DLGLOBAL INFO UL_TBF{FLOW}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{FLOW}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{FLOW}: Deallocated
 DLGLOBAL INFO DL_TBF_ASS{IDLE}: Deallocated
@@ -177,7 +177,7 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -198,7 +198,7 @@
 DLGLOBAL INFO UL_TBF{FLOW}: Timeout of T3166
 DLGLOBAL INFO UL_TBF{FLOW}: T3166 timeout attempts=1
 DLGLOBAL INFO UL_TBF{FLOW}: state_chg to NEW
-DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START
 DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START
@@ -212,7 +212,7 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -230,7 +230,7 @@
 DLGLOBAL INFO UL_TBF{FLOW}: Timeout of T3166
 DLGLOBAL INFO UL_TBF{FLOW}: T3166 timeout attempts=2
 DLGLOBAL INFO UL_TBF{FLOW}: state_chg to NEW
-DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START
 DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START
@@ -244,7 +244,7 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -262,7 +262,7 @@
 DLGLOBAL INFO UL_TBF{FLOW}: Timeout of T3166
 DLGLOBAL INFO UL_TBF{FLOW}: T3166 timeout attempts=3
 DLGLOBAL INFO UL_TBF{FLOW}: state_chg to NEW
-DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START
 DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START
@@ -276,7 +276,7 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -295,7 +295,7 @@
 DLGLOBAL INFO UL_TBF{FLOW}: T3166 timeout attempts=4
 DLGLOBAL NOTICE UL_TBF{FLOW}: TBF establishment failure (T3166 timeout attempts=4)
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Deallocated
-DLGLOBAL INFO UL_TBF{FLOW}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{FLOW}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{FLOW}: Deallocated
 DLGLOBAL INFO DL_TBF_ASS{IDLE}: Deallocated
@@ -318,7 +318,7 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -417,7 +417,7 @@
 DLGLOBAL NOTICE TBF(UL:NR-0:TLLI-00002342) N3104_MAX (9) reached
 DLGLOBAL INFO UL_TBF{FINISHED}: Received Event N3104_MAX
 DLGLOBAL INFO UL_TBF{FINISHED}: state_chg to NEW
-DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{NEW}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Received Event START
 DLGLOBAL INFO UL_TBF{NEW}: Received Event UL_ASS_START
@@ -432,13 +432,13 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
 DLGLOBAL INFO DL_TBF_ASS{IDLE}: Deallocated
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Deallocated
-DLGLOBAL INFO UL_TBF{FLOW}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{FLOW}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{FLOW}: Deallocated
 DLGLOBAL INFO Rx from upper layers: GRR-UNITDATA.request
@@ -458,7 +458,7 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -500,7 +500,7 @@
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_DATA.request
 DLGLOBAL INFO UL_TBF{FINISHED}: Timeout of T3182
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Deallocated
-DLGLOBAL INFO UL_TBF{FINISHED}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{FINISHED}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{FINISHED}: Deallocated
 DLGLOBAL INFO DL_TBF_ASS{IDLE}: Deallocated
@@ -521,7 +521,7 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -606,7 +606,7 @@
 DLGLOBAL INFO UL_TBF{FINISHED}: Last UL block sent (CV=0), start T3182
 DLGLOBAL NOTICE UL_TBF{FINISHED}: TBF establishment failure (Data block with CV=0 retransmit attempts=4)
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Deallocated
-DLGLOBAL INFO UL_TBF{FINISHED}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{FINISHED}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{FINISHED}: Deallocated
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_DATA.request
@@ -628,7 +628,7 @@
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x80 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -671,7 +671,7 @@
 DLGLOBAL INFO UL_TBF{NEW}: state_chg to ASSIGN
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: state_chg to SCHED_PKT_RES_REQ
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Deallocated
-DLGLOBAL INFO UL_TBF{RELEASING}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{RELEASING}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{RELEASING}: Deallocated
 DLGLOBAL INFO UL_TBF_ASS{SCHED_PKT_RES_REQ}: Received Event CREATE_RLCMAC_MSG
@@ -679,7 +679,7 @@
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_DATA.request
 DLGLOBAL INFO DL_TBF_ASS{IDLE}: Deallocated
 DLGLOBAL INFO UL_TBF_ASS{WAIT_PKT_UL_ASS}: Deallocated
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=1 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=1 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: Deallocated
 DLGLOBAL INFO Rx from upper layers: GMMRR-ASSIGN.request
@@ -691,7 +691,7 @@
 DLGLOBAL INFO DL_TBF_ASS{IDLE}: state_chg to COMPLETED
 DLGLOBAL INFO DL_TBF{NEW}: Allocated
 DLGLOBAL INFO DL_TBF{NEW}: Received Event DL_ASS_COMPL
-DLGLOBAL INFO TBF(DL:NR-0:TLLI-00000001) Send L1CTL-CF_DL_TBF.req dl_slotmask=0x80 dl_tfi=0
+DLGLOBAL INFO TBF(DL:NR-0:TLLI-00000001) Send L1CTL-CFG_DL_TBF.req dl_slotmask=0x80 dl_tfi=0
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_DL_TBF.request
 DLGLOBAL INFO DL_TBF{NEW}: state_chg to FLOW
 DLGLOBAL INFO DL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -727,7 +727,7 @@
 DLGLOBAL INFO DL_TBF_ASS{IDLE}: state_chg to COMPLETED
 DLGLOBAL INFO DL_TBF{NEW}: Allocated
 DLGLOBAL INFO DL_TBF{NEW}: Received Event DL_ASS_COMPL
-DLGLOBAL INFO TBF(DL:NR-0:TLLI-00000001) Send L1CTL-CF_DL_TBF.req dl_slotmask=0x80 dl_tfi=0
+DLGLOBAL INFO TBF(DL:NR-0:TLLI-00000001) Send L1CTL-CFG_DL_TBF.req dl_slotmask=0x80 dl_tfi=0
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_DL_TBF.request
 DLGLOBAL INFO DL_TBF{NEW}: state_chg to FLOW
 DLGLOBAL INFO DL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -765,7 +765,7 @@
 DLGLOBAL DEBUG Register POLL (TS=7 FN=43, reason=UL_ASS)
 DLGLOBAL INFO UL_TBF_ASS{WAIT_PKT_UL_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
-DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0xc0 (reconf)
+DLGLOBAL INFO UL_TBF{ASSIGN}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0xc0 (reconf)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{ASSIGN}: state_chg to FLOW
 DLGLOBAL INFO UL_TBF_ASS{COMPLETED}: state_chg to IDLE
@@ -793,6 +793,6 @@
 DLGLOBAL INFO DL_TBF_ASS{IDLE}: Deallocated
 DLGLOBAL INFO DL_TBF{FINISHED}: Deallocated
 DLGLOBAL INFO UL_TBF_ASS{IDLE}: Deallocated
-DLGLOBAL INFO UL_TBF{FINISHED}: Send L1CTL-CF_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
+DLGLOBAL INFO UL_TBF{FINISHED}: Send L1CTL-CFG_UL_TBF.req ul_tbf_nr=0 ul_slotmask=0x00 (release)
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-CFG_UL_TBF.request
 DLGLOBAL INFO UL_TBF{FINISHED}: Deallocated
-- 
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Gerrit-Project: libosmo-gprs
Gerrit-Branch: master
Gerrit-Change-Id: I46bcbdb35ee52575e778464b93a8a3b21b8f465b
Gerrit-Change-Number: 32412
Gerrit-PatchSet: 2
Gerrit-Owner: fixeria vyanitskiy@sysmocom.de
Gerrit-Reviewer: Jenkins Builder
Gerrit-Reviewer: pespin pespin@sysmocom.de
Gerrit-MessageType: merged



    

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[M] Change in libosmo-gprs[master]: rlcmac: fix typo in TBF CFG logging messages