pespin has submitted this change. ( https://gerrit.osmocom.org/c/osmo-bts/+/32270 )
Change subject: bts-sysmo: Fix pinst->version filled too early ......................................................................
bts-sysmo: Fix pinst->version filled too early
The fields used to fill in pinst->version are set when info_compl_cb() is called, which happens asynchronously and hence later than when in bts_model_phy_link_open(). Hence, copying the values when in bts_model_phy_link_open() (l1if_open()) makes no sense at all. Fill in pinst->version in info_compl_cb(), just when the layer receives the required information.
Related: OS#5978 Change-Id: Ica53a5d852214b24de7f75b08ad7e595ce5236ee --- M src/osmo-bts-sysmo/l1_if.c 1 file changed, 24 insertions(+), 8 deletions(-)
Approvals: Jenkins Builder: Verified osmith: Looks good to me, but someone else must approve fixeria: Looks good to me, approved
diff --git a/src/osmo-bts-sysmo/l1_if.c b/src/osmo-bts-sysmo/l1_if.c index 786382c..59a168f 100644 --- a/src/osmo-bts-sysmo/l1_if.c +++ b/src/osmo-bts-sysmo/l1_if.c @@ -1474,10 +1474,12 @@ fl1h->hw_info.ver_minor = sic->boardVersion.option; #endif
- LOGP(DL1C, LOGL_INFO, "DSP v%u.%u.%u, FPGA v%u.%u.%u\nn", - sic->dspVersion.major, sic->dspVersion.minor, - sic->dspVersion.build, sic->fpgaVersion.major, - sic->fpgaVersion.minor, sic->fpgaVersion.build); + snprintf(trx->pinst->version, sizeof(trx->pinst->version), "%u.%u dsp %u.%u.%u fpga %u.%u.%u", + fl1h->hw_info.ver_major, fl1h->hw_info.ver_minor, + fl1h->hw_info.dsp_version[0], fl1h->hw_info.dsp_version[1], fl1h->hw_info.dsp_version[2], + fl1h->hw_info.fpga_version[0], fl1h->hw_info.fpga_version[1], fl1h->hw_info.fpga_version[2]); + + LOGP(DL1C, LOGL_INFO, "%s\n", trx->pinst->version);
#ifdef HW_SYSMOBTS_V1 if (sic->rfBand.gsm850) @@ -1914,10 +1916,6 @@
hdl = pinst->u.sysmobts.hdl; osmo_strlcpy(bts->sub_model, sysmobts_model(hdl->hw_info.model_nr, hdl->hw_info.trx_nr), sizeof(bts->sub_model)); - snprintf(pinst->version, sizeof(pinst->version), "%u.%u dsp %u.%u.%u fpga %u.%u.%u", - hdl->hw_info.ver_major, hdl->hw_info.ver_minor, - hdl->hw_info.dsp_version[0], hdl->hw_info.dsp_version[1], hdl->hw_info.dsp_version[2], - hdl->hw_info.fpga_version[0], hdl->hw_info.fpga_version[1], hdl->hw_info.fpga_version[2]);
phy_link_state_set(plink, PHY_LINK_CONNECTED);