Hello, just my comments: Whats your planed form factor of the board? Do you have choose the concrete calypso cpu already? On 10.07.2012 19:00, Harald Welte wrote:
* expose JTAG
1.27mm 10 pol Pin-Header on the opposite side of the board edge connector, this make it possible to debug the board in a backplane
* board-edge connector for plugging many boards into one backplane
I would suggest the ERNI SMC. There are also a cable assembly available. http://www.erni.com/fileadmin/medien/downloadcenter/smc/ERNI-SMC-e.pdf
* I2C/SPI and both UARTs available on headers * on-board EEPROM for storing persistent data, even beyond NOR flashing
There are different types available: 64KBIT: SOT23-5 - MICROCHIP - 24AA64T-I/OT 512KBIT: 8TSSOP - MICROCHIP - 24AA512-I/ST ... It is a question of how much memory we need.
* SIM card slot, SIM interface also present on header * additional / unused TPU ports * header for TSP / TPU and all data/control interfaces between iota/rita/calypso * RTC crystal and footprint for lithium backup battery * version of the board with uplink / downlink filters switched
Regards, Mathias