Sources for VHDL and FPGA flashing committed

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello everybody, I've committed the VHDL source code and the needed projects files for Lattice Diamond into the repository. With this everybody can build a FPGA image for the OsmoSDR. The most important feature in this new FPGA firmware version is, that we now have an integrated decimation filter, which can be configured in from 1:2 to 1:64. I have added a tool to convert the files, that Lattice Diamond produces to something we can upload via USB DFU and I also modified the DFU loader to include FPGA flashing support. Since the post office was already closed yesterday and today we had a holiday in Germany, the boards will find their way to the mail tomorrow. Best regards, Christian - -- - --------------------------------------------------- | maintech # Dipl. Inf (FH) Christian Daniel | | GmbH ### Otto-Hahn-Str. 15 · D-97204 Höchberg | - --------------------------------------------------- | AG Würzburg, HRB 8790 Tax-ID DE242279645 | - --------------------------------------------------- | http://www.maintech.de cd(a)maintech.de | - ---------------------------------------------------