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Madhu Macaque Labs madhu at
Sat Apr 16 12:23:22 UTC 2016

We do plan to have large PCIe card type format to test the UE side, so we
will probably end up
using your setup first. W are also using the ADR xcvr for our GPS/IRNSS

For MS apps, we are evaluating the various parts used in mid range handsets.
Will select the one that has the most open documentation. No sure how
open silicon motion is.

I have no illusions about the difficulty of our project ! But high speed
digital design is
our bread and butter, so hopefully we should be able to make progress. L1
processing is the
tricky part. The main RISCV CPU core is already developed and online in our
Probably 2-4 cores with
a vector processor accelerator will suffice for the L2/L3 stack. Will use a
ringbus or a crossbar
as the interconnect.

It would help if folks in this  forum had any opinions on the UCB VP. See

On Sat, Apr 16, 2016 at 4:24 PM, Alexander Chemeris <
alexander.chemeris at> wrote:

> Madhu,
> On Mon, Apr 11, 2016 at 6:20 PM, Madhu Macaque Labs <madhu at>
> wrote:
> > Plan to use the AD SDR board for the SDR section. So it will be a large
> board that is
> > not optimized for size.
> Just curious - which exact transceiver chip are you planing to use?
> Would be great to have more open-source SDR designs out there for
> different use cases.
> We've developed open-source SDR based on LMS6, but it targets network
> side and is too power hungry for an MS. Otherwise I would offer our
> help, as I appreciate your effort. This a really amazing project and I
> hope you'll be able to pull it off.
> --
> Regards,
> Alexander Chemeris.
> CEO, Fairwaves, Inc.
> Subscribe to Fairwaves news:

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