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Harald Welte laforge at gnumonks.orgOn Sun, Feb 19, 2012 at 10:03:30AM +0100, Sylvain Munaut wrote:
> Hi
>
> On Sun, Feb 19, 2012 at 1:02 AM, Peter Stuge <peter at stuge.se> wrote:
> > Peter Stuge wrote:
> >> Perhaps writing to the FIFO can happen already when initially
> >> receiving the data from the serial port
> >
> > Another approach is to do copying with interrupts enabled. It might
> > then instead require a bit from the buffer management, to avoid the
> > receive interrupt from stomping on unsent data.
>
> Are FIQ disabled as well ? Or could we move uart RX to fiq ?
IIRC, the UART is even DMA capable (via the PDC), but the problem is
that we have to act on each byte in realtime to watch for Fi/Di changes
(PPS) which can occur basically at any time. So I think it will have
to remain software manually pulling out each byte from the UART.
--
- Harald Welte <laforge at gnumonks.org> http://laforge.gnumonks.org/
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