OsmoSDR Hardware Design Questions
sandor.szilvasi at gmail.com
Tue Jul 10 15:05:30 UTC 2012
I was going to start a home project *very similar* to yours, when I bumped
into the OsmoSDR. So, I'd like to ask a few questions regarding the OsmoSDR
1. Based on the
could handle BGA packages. Why didn't you use the BGA packaged
Atmel SAM3U MCU instead of the LQFP one?
2. The Lattice LatticeXP2 FPGA is available in the same package but in
larger size at almost identical price. Why did you pick the smallest
available FPGA, the LFXP-5E ($16) instead of the LFXP-8E ($20)?
3. You are using the SAM3U SSC to transfer data from the FPGA. Before
seeing your design I had the idea to use the EBI to interface with the
FPGA. After all, the EBI is on the AHB and I assume you have a bunch of
FPGA I/Os left. What do you think the drawbacks of using the EBI would be?
4. The differential clock output oscillator was connected in a weird
way, but I can see that it has been corrected in Rev 2.
5. My understanding is that you configure the FPGA using the JTAG lines
in bit-bang mode through SAM3U GPIOs. Why don't you use the sysConfig port
of the Lattice FPGA? It's faster, easier to implement with the SAM3U SPI
peripheral (and it's also a feature I haven't seen with other FPGAs). See
Lattice TN1141 <http://www.latticesemi.com/documents/TN1141.pdf>.
6. The board seems to be powered from the USB only, but the oscillator
already draws ~100mA and it's always enabled. Adding the consumption of the
MCU and the FPGA you are already above 100mA. If it's really powered only
from the USB, how is it ensured that you stay below the 100mA limit
specified by the USB standard until you ask for a higher current, say 500mA?
I hope you didn't mind my questions above, I didn't mean to be nosy. I just
got a little excited about this project.
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