OsmocomBB layer1 with FreeCalypso changes
mychaela.falconia at gmail.com
Fri Nov 24 20:13:45 UTC 2017
Hello OsmocomBB community,
I have just produced a modified version of the Calypso target fw part
of OsmocomBB, adding proper support for the FCDEV3B board target and
also bringing the pre-existing Calypso targets up to par while at it.
You can find it here:
obb-fcmods-r1 stands for "OsmocomBB with FreeCalypso modifications,
release 1". Here are the main changes relative to mainline OsmocomBB,
quoted from the README file inside the tarball:
* Added support for FreeCalypso FCDEV3B target, target name fcdev3b, new
board/fcdev3b directory, compiling into board/fcdev3b/layer1.highram.bin.
* Fixed GPIO and ASIC_CONF_REG configuration on the pre-existing Openmoko GTA0x
target: very similar to our own FCDEV3B, but not identical.
* Fixed ASIC_CONF_REG setting on the Pirelli DP-L10 target to match what
Pirelli's official fw sets.
* Implemented reading of factory RF calibration values, not only on our own
FCDEV3B, but also on the pre-existing Motorola C1xx, Openmoko GTA0x and
Pirelli DP-L10 targets.
* The old OsmocomBB Tx power level control code and tables have been removed
entirely and replaced with new logic that exactly matches what the official
chipset firmware (TI/FreeCalypso) does, using tables in TI/FreeCalypso
format. These tables are normally populated with factory-programmed RF
calibration values on all supported targets. Compiled-in tables serve as a
fallback and match each target's respective original fw.
* A different AFC slope value is used on different targets; OsmocomBB's
original value was/is only correct for the Mot C1xx family, whereas
GTA0x/FCDEV3B and Pirelli DP-L10 need different values because Openmoko's
VCXO (copied on the FCDEV3B) and Pirelli's VCTCXO are different from what
* The initial AFC DAC value for the FB search is taken from factory calibration
records on those targets on which it has been calibrated per unit at the
The tarball contains a source + build products tree, i.e., ready-to-use
board/*/layer1.highram.bin images are included. They have been compiled
with Tx support enabled.
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