Improving LMS6002 phase noise

Srdjan Milenkovic s.milenkovic at limemicro.com
Mon Jul 23 19:43:03 UTC 2012


Hi Andrey,

Plots are looking good. Just for your information, we reduced Ichp to 
400uA to reduce close to integer i.e. fractional spurs which you may 
have not seen yet but they are there. These have noting to do with GPS 
module on UmTRX board neither with LMS chip, it is just PLL nature. 
Please be aware of this while comparing different loop filters, 
especially different Ichp values, ...

Best regards, Srdjan

On 23/07/2012 19:44, Andrey Sviyazov wrote:
> Hi Srdjan.
>
> Today I found why noises and spurs are really happens in UmTRXv1.
>
> 1) Only full disabling (no power) GPS module can kill all near spurs.
> 2) To get good noises the next changes are required:
> - replace choke L6 by capacitor 10nF..0.1uF.
> - remove C45.
>
> I've assembled 100kHz loop filter with the next components:
> C82 = 100pF, C83=1500pF, C84=33pF, R106=2.2k, R109=3.3k.
>
> Result without GPS for IChP=0.4mA and due to several XO attached here.
> Also attached comparison of 50kHz/100kHz loop filters with optimal 
> IChp 1.2mA/0.4mA but with GPS module (no antenna).
> So, now we need to measure integrated LO noise (degrees) to understand 
> which filter and IChP better.
>
> Best regards,
> Andrey Sviyazov.
>
>
>
>
> 2012/7/23 Srdjan Milenkovic <s.milenkovic at limemicro.com 
> <mailto:s.milenkovic at limemicro.com>>
>
>     Hi Andrey,
>
>     Below is the loop filter for 100kHz loop bandwidth, 26MHz
>     reference clock, 400uA charge pump current. It has been tested and
>     should give you around -90dBc/Hz plateau.
>
>
>
>     C1 	R2 	C2 	R3 	C3
>
>     9.01E-11 	2.46E+03 	1.42E-09 	3280.93 	2.56E-11
>
>
>
>     Loop filter components for 10kHz bandwidth, 26MHz reference clock,
>     400uA charge pump current are below:
>
>     C1 	R2 	C2 	R3 	C3
>
>     9.01E-09 	2.46E+02 	1.42E-07 	328.09 	2.56E-09
>
>
>     There should not be any issue with loop stability even with 10kHz
>     filter. However, PLL settling time is increased so you have to
>     slow down VCOCAP auto-tune.
>
>     I would recommend to use 100kHz filter.
>
>     Regards, Srdjan
>
>
>     On 22/07/2012 20:53, Andrey Sviyazov wrote:
>>     Hi Srdjan.
>>
>>     First of all thank you for support.
>>
>>         We do not have register dump. However, Lime GUI project file
>>         used in this experiment is attached. You can use GUI
>>         File->Open Project option to import it. I see Ichp and Ichp
>>         offset currents are different from defaults but these still
>>         do not justify 5-12dB worse PN in your reports. You can give
>>         it a try though before changing TCXCO.
>>
>>
>>     We will try to adjust Ichp and offset first off all. Thank you
>>     for hint.
>>
>>         *Test Description:*
>>
>>           * DC MAX applied through analogue inputs, DACs off
>>
>>     It is quite important detail too.
>>
>>           * TXVGA1 and TXVGA2 at max gain
>>
>>     Similar.
>>
>>           * Loop filter redesigned for 100kHz loop bandwidth and
>>             40MHz reference
>>
>>           * Icp and Icp offset optimized at 25 deg. Same set up used
>>             at all other temperatures
>>
>>     Please inform us values of components for 100kHz BW filter.
>>     But we are forced to use one clock 26MHz for all because of
>>     target price.
>>
>>           * Cap code and VCO picked up by PLL tune routine
>>
>>     I implemented 10kHz BW filter for PLL and found that frequency
>>     locking become unstable because of calculated VCOCAP value a bit
>>     lower then required (too high capacity).
>>     If VCOCAP incremented manualy (after auto-tuned) then no any
>>     problems.
>>     What do you think about it.
>>     And could you please inform me values for 10 kHz BW filter, just
>>     to compare with my calculations.
>>
>>     Best regards,
>>     Andrey Sviyazov.
>>
>>
>
>

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