Change in osmo-pcu[master]: bts_rcv_rach(): Split code paths for Ass and Ass Rej

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pespin gerrit-no-reply at lists.osmocom.org
Mon Oct 18 11:40:31 UTC 2021


pespin has uploaded this change for review. ( https://gerrit.osmocom.org/c/osmo-pcu/+/25813 )


Change subject: bts_rcv_rach(): Split code paths for Ass and Ass Rej
......................................................................

bts_rcv_rach(): Split code paths for Ass and Ass Rej

The function becomes a bit more long but it's a lot easier to follow.

Change-Id: I80e554315d36a515a7edc9ae51057ce31eb9110d
---
M src/bts.cpp
1 file changed, 28 insertions(+), 26 deletions(-)



  git pull ssh://gerrit.osmocom.org:29418/osmo-pcu refs/changes/13/25813/1

diff --git a/src/bts.cpp b/src/bts.cpp
index 8d98fe4..aa713fe 100644
--- a/src/bts.cpp
+++ b/src/bts.cpp
@@ -867,13 +867,17 @@
 	struct chan_req_params chan_req = { 0 };
 	struct gprs_rlcmac_ul_tbf *tbf = NULL;
 	struct gprs_rlcmac_sba *sba;
-	struct gprs_rlcmac_pdch *pdch = NULL;
-	struct gprs_rlcmac_trx *trx = NULL;
+	struct gprs_rlcmac_pdch *pdch;
+	struct gprs_rlcmac_trx *trx;
 	uint32_t sb_fn = 0;
 	uint8_t usf = 7;
 	uint8_t tsc = 0;
 	int plen, rc;
 
+	/* Allocate a bit-vector for RR Immediate Assignment [Reject] */
+	struct bitvec *bv = bitvec_alloc(22, tall_pcu_ctx); /* without plen */
+	bitvec_unhex(bv, DUMMY_VEC); /* standard '2B'O padding */
+
 	bts_do_rate_ctr_inc(bts, CTR_RACH_REQUESTS);
 
 	if (rip->is_11bit)
@@ -938,36 +942,34 @@
 	}
 	trx = pdch->trx;
 
-send_imm_ass_rej:
-	/* Allocate a bit-vector for RR Immediate Assignment [Reject] */
-	struct bitvec *bv = bitvec_alloc(22, tall_pcu_ctx); /* without plen */
-	bitvec_unhex(bv, DUMMY_VEC); /* standard '2B'O padding */
-
-	if (rc != 0) {
-		LOGP(DRLCMAC, LOGL_DEBUG, "Tx Immediate Assignment Reject on AGCH\n");
-		plen = Encoding::write_immediate_assignment_reject(
-			bv, rip->ra, Fn, rip->burst_type,
-			(uint8_t)osmo_tdef_get(bts->T_defs_bts, 3142, OSMO_TDEF_S, -1));
-		bts_do_rate_ctr_inc(bts, CTR_IMMEDIATE_ASSIGN_REJ);
+	LOGP(DRLCMAC, LOGL_DEBUG, "Tx Immediate Assignment on AGCH: "
+	     "TRX=%u (ARFCN %u) TS=%u TA=%u TSC=%u TFI=%d USF=%d\n",
+	     trx->trx_no, trx->arfcn & ~ARFCN_FLAG_MASK,
+	     pdch->ts_no, ta, tsc, tbf ? tbf->tfi() : -1, usf);
+	plen = Encoding::write_immediate_assignment(pdch, tbf, bv,
+		false, rip->ra, Fn, ta, usf, false, sb_fn,
+		bts_get_ms_pwr_alpha(bts), bts->pcu->vty.gamma, -1,
+		rip->burst_type);
+	bts_do_rate_ctr_inc(bts, CTR_IMMEDIATE_ASSIGN_UL_TBF);
+	if (plen >= 0) {
+		pcu_l1if_tx_agch(bts, bv, plen);
+		rc = 0;
 	} else {
-		LOGP(DRLCMAC, LOGL_DEBUG, "Tx Immediate Assignment on AGCH: "
-		     "TRX=%u (ARFCN %u) TS=%u TA=%u TSC=%u TFI=%d USF=%d\n",
-		     trx->trx_no, trx->arfcn & ~ARFCN_FLAG_MASK,
-		     pdch->ts_no, ta, tsc, tbf ? tbf->tfi() : -1, usf);
-		plen = Encoding::write_immediate_assignment(pdch, tbf, bv,
-			false, rip->ra, Fn, ta, usf, false, sb_fn,
-			bts_get_ms_pwr_alpha(bts), bts->pcu->vty.gamma, -1,
-			rip->burst_type);
-		bts_do_rate_ctr_inc(bts, CTR_IMMEDIATE_ASSIGN_UL_TBF);
+		rc = plen;
 	}
+	bitvec_free(bv);
+	return rc;
 
+send_imm_ass_rej:
+	LOGP(DRLCMAC, LOGL_DEBUG, "Tx Immediate Assignment Reject on AGCH\n");
+	plen = Encoding::write_immediate_assignment_reject(
+		bv, rip->ra, Fn, rip->burst_type,
+		(uint8_t)osmo_tdef_get(bts->T_defs_bts, 3142, OSMO_TDEF_S, -1));
+	bts_do_rate_ctr_inc(bts, CTR_IMMEDIATE_ASSIGN_REJ);
 	if (plen >= 0)
 		pcu_l1if_tx_agch(bts, bv, plen);
-	else
-		rc = plen;
-
 	bitvec_free(bv);
-
+	/* rc was already properly set before goto */
 	return rc;
 }
 

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Gerrit-Project: osmo-pcu
Gerrit-Branch: master
Gerrit-Change-Id: I80e554315d36a515a7edc9ae51057ce31eb9110d
Gerrit-Change-Number: 25813
Gerrit-PatchSet: 1
Gerrit-Owner: pespin <pespin at sysmocom.de>
Gerrit-MessageType: newchange
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