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Josh Blum josh at joshknows.comOn 04/15/2014 03:59 AM, sergey kostanbaev wrote: > Hi guys, > > We cannot compare equally B2x0 and UmTRX, since > - B2x0 has CX3 USB3 interface which has ARM core inside and thus it doesn't > need a CPU inside FPGA > - Ethernet handling and USB is quite different, it's hard to have much code > in common. And SRAM is needed only for Ethernet handling. > - Also we're taking in mind to support PCIe at some time and PCIe needs > another handling interface. > So I don't think we need to move to B2x0 architecture completely. > > Probably we can grab some good ideas from B2x0, something like this (but > I'm not sure that are really good) > > - Each DSP module has own reconfigurable vita timer. That's plus. > - RX/TX control and RX/TX framer are new, DSP(DUC, DDC and so on) the > same. > > What do you think about > Instead of Wishbone bus there used AXI bus. > > Also see X300: https://github.com/EttusResearch/uhd/tree/master/fpga/usrp3/top/x300 Very similar design for the adc/dac side of things. But has external RAM for buffering, network capabilities, a ZPU core inside. Definitely bigger and more complex. -josh