transceiver won't start; fpga build error

Alexander Chemeris alexander.chemeris at gmail.com
Sat Feb 23 16:46:52 UTC 2013


Hi Stephane,

Glad to see first users starting to play with UmTRX. :)

Please use OpenBTS from our repository and use branch "umtrx" instead
of "master". UmTRX support is not merged into master yet.
git://github.com/fairwaves/openbts-2.8 umtrx

"Failed to set master clock rate" error is thrown because it thinks
you're using USRP N and tries to set frequency accordingly.

FPGA image should be the latest. You could download it here as well:
http://people.osmocom.org/ipse/umtrx-v2/fpga_bitsream/2013-02-03-394f48b7/

We'll look into the FPGA compilation issue - may be Andrew forgot to
check in that file. Thank you for reporting this.

On Sat, Feb 23, 2013 at 8:02 PM,  <stephane at shimaore.net> wrote:
> Hi,
>
> I went to pick up my UmTRX this morning. \o/
>
> It appears to start fine, but I'm hitting a couple issues trying to
> connect OpenBTS to it:
>
> transceiver won't start
> =======================
>
> I get the following errors when starting OpenBTS or the transceiver:
>
>   /home/stephane/Public/src/umtrx/openbts-p2.8/apps# ./transceiver
>   linux; GNU C++ version 4.7.2; Boost_104900; UHD_003.004.000-a52936a
>
>   ALERT 139976877029152 UHDDevice.cpp:434:open: No UHD devices found with address ''
>   ALERT 139976877029152 runTransceiver.cpp:94:main: Transceiver exiting...
>
>   /home/stephane/Public/src/umtrx/openbts-p2.8/apps# ./transceiver
>   linux; GNU C++ version 4.7.2; Boost_104900; UHD_003.004.000-a52936a
>
>   ALERT 139853627492128 UHDDevice.cpp:345:set_rates: Failed to set master clock rate
>   ALERT 139853627492128 UHDDevice.cpp:346:set_rates: Actual clock rate 1.3e+07
>   ALERT 139853627492128 runTransceiver.cpp:94:main: Transceiver exiting...
>
> (This is with latest UHD from git://github.com/chemeris/UHD-Fairwaves.git
> and latest openBTS from git://github.com/ttsou/openbts-p2.8.git )
>
> I assume the first one ('No UHD devices...') is a transcient problem.
>
> For the second issue I don't know whether this might be because the
> firmware on the unit I received might not be the latest, or because I
> really need to first upload the FPGA image (although I assumed ZPU wouldn't
> start in that case); here's the console output in any case:
>
>   USRP N210 UDP bootloader
>   FPGA compatibility number: 8
>   Firmware compatibility number: 11
>   Production image = 0
>   Checking for valid production FPGA image...
>   No valid production FPGA image found.
>
>   Valid production firmware found. Loading...
>   Finished loading. Starting image.
>
>   TxRx-UHD-ZPU
>   FPGA compatibility number: 8
>   Firmware compatibility number: 11
>   LMS1 chip version = 0x22
>   LMS2 chip version = 0x22
>   00:1F:11:02:19:01
>   192.168.10.2
>
> FPGA compilation error
> ======================
>
> Assuming this is because of a missing/out-of-date FPGA image, I tried to
> compile the latest (git) FPGA firmware:
>
>   cd UHD-Fairwaves/fpga/usrp2/top/N2x0/ ; make clean ; make UmTRXv2
>
> but got the following error:
>
>   ERROR:HDLCompiler:1654 - "/home/stephane/Public/src/umtrx/UHD-Fairwaves/fpga/usrp2/top/N2x0/u2plus_core.v" Line 734: Instantiating <rx_frontend_sw> from unknown module <frontend_sw>
>
> A quick `git blame` points to some changes in January but I wouldn't
> know where to start fixing this (or maybe this is an issue with my
> environemnt and not the code). In case this is the environemnt, I'm using
> ISE 14.4 on Linux/amd64.
>
> S.
>



--
Regards,
Alexander Chemeris.
CEO, Fairwaves LLC / ООО УмРадио
http://fairwaves.ru




More information about the UmTRX mailing list