RFC: osmo-clk-gen v2

Martin Schramm mschramm at sysmocom.de
Thu May 23 17:27:44 UTC 2019


>>> I'd use the DAC for software voltage tuning.
>>> Use 0R to select which bank uses which (default rail or programmable
>>> one, with just default to have 1/2 bank being the programmable vio).
>> Our solution so far was to have two banks fixed and two banks either
>> fixed or variable by means of (mechanical, tht) jumpers.  I'm not sure
>> we can fit our of them, or if we can fit 0R SMD resistors at lest. @Martin?

Now it contains a 4x3 jumper block to switch the io supply of four banks
(each forming two outputs) each between VDD fixed (3V3) and the
adjustable supply.

> considering the 5.6 mA max 
> bank I_DDOx current, that would suffice, I think?)

5.6mA is max I_DDOx, - but _per output_. So any adjustable source must
supply over 40mA to the PLL out drivers.

For the tracking LOD, I first selected the TLE4250. But lowest output
voltage of this part is 2.5V, and as we want to have e.g. 1V8 as well,
another part has to be found.
I again took a buffer (voltage follower) formed of a generic R2R-IO,
unity gain-stable CMOS opamp (MIC7300, TLV9001...). Those supply (or
sink) 40 mA and more. But the max. output current depends on the output
voltage, so, if we want to continue with that approach, I'd likely add a
BJT current helper stage behind the opamp (BJT collector on 5V). We have
almost no dynamic demands on that opamp, so disregarding any phase
errors we introduce by driving large capacitive and resistive loads, it
would work w/o a BJT, but let's see...

laforge just mentioned he wants to have added a very weak pull-down
between VOUT (DAC) and op amp input, to ground spikes during power-on
and fw started/GPIOs initialized. The PULLEN bits are 0 after reset, so
no PU should be set...

external voltage reference and its input:

> Knowing that 2.54 mm jumpers can be huge – can't one just add a
> resistor in series with the DAC output and connect both that and the
> external Vref input to the tracking input of the regulator? [...]

The DACVREFA (=ADCVREFA) pin has a limitation of AV_ref<= V_DDANA - 0.6V
. As I'd want to have V_DDANA connected w/ a ferrite to V_DD (3V3), we
can only use the internal reference 2, which is V_DDANA (SAMD21 ds:

So I don't see an external ref voltage input on that PCB... maybe your
use case would explain your needs here! ;)


>>> 3) should we keep the VCTCXO?
>> No.  As you explained I think it's better to split functions and not
>> overload this board.
>> happy to see we're in agreement here.


OK, thanks, part skipped and occupied area freed.
I'll keep you updated about the ongoing progress.


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