RFC: osmo-clk-gen v2

Sylvain Munaut 246tnt at gmail.com
Mon May 20 15:13:42 UTC 2019

> 2) allow different output voltages for two of the four banks of the Silabs chip
>    https://osmocom.org/issues/3905

I'd use the DAC for software voltage tuning.
Use 0R to select which bank uses which (default rail or programmable
one, with just default to have 1/2 bank being the programmable vio).

> 3) should we keep the VCTCXO?

No.  As you explained I think it's better to split functions and not
overload this board.

> 4) Use SAMD XOSC / PLL / GCLK to allow lower reference frequencies
>    https://osmocom.org/issues/3857
>    Where we'd actually use one of the SAMD GCLK outputs as one of the
>    intputs to the Si5351C, and expose a GCLK input of the SAMD on an
>    external header.  This way, much lower frequencies can be used to
>    driver the Si5351C.  Or one could even go for deriving them from the

Does that mean the SAMD core would be running from the reference clock
? (and so wouldn't run if there is no reference connected)



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