This is merely a historical archive of years 2008-2021, before the migration to mailman3.
A maintained and still updated list archive can be found at https://lists.osmocom.org/hyperkitty/list/osmocom-sdr@lists.osmocom.org/.
Alan Campbell alan_r_cam at yahoo.com.auAny idea when the SDR boards will be available to buy? And the cost? I was planning an SDR myself when I first saw the Osmo design. There are enough similarities to make yours worth buying - namely, the same FPGA I was looking at. I'm debating whether to buy the Lattice XP Brevia FPGA development kit. All else being equal, I'd rather give YOU guys the money... Regards, -- Alan Campbell - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - My own design ? That uses a SINGLE 12-bit ADC, clocked at 48 MHz (same as USB clock, makes for simpler circuit). The "Zero IF Tuner" becomes a superhet design, with an IF output of 60 MHz. Undersampling & downsampling in the FPGA gives a 12MHz bandwidth (actually less, depends if IFstage bandwidth & degree of downsampling) 2-stage RF front end: 1-30MHz (si 570 is 61-90MHz) and VHF 140-150MHz (si 570 is 80-90MHz). - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.osmocom.org/pipermail/osmocom-sdr/attachments/20120328/8ba548a8/attachment.htm>