Change in simtrace2[master]: cardem: use edge-triggered VCC ADC logic

[laforge]

Hello Jenkins Builder, tsaitgaist, 

I'd like you to reexamine a change. Please visit

    https://gerrit.osmocom.org/c/simtrace2/+/23616

to look at the new patch set (#2).

Change subject: cardem: use edge-triggered VCC ADC logic
......................................................................

cardem: use edge-triggered VCC ADC logic

Before this patch, we used to st ci->vcc_active depending on the
instantaneous ADC reading of VCC.  Is it > .5v, we claim VCC is active,
and if it's below, VCC is inactive.

With this patch we move to an edge triggered approach: Only change
ci->vcc_active if the previous reading was different from the current
reading.

FIXME: why?

Change-Id: I71b703162219484e43638f1f2f692e9dd554ef55
---
M firmware/libcommon/source/mode_cardemu.c
1 file changed, 8 insertions(+), 2 deletions(-)


  git pull ssh://gerrit.osmocom.org:29418/simtrace2 refs/changes/16/23616/2
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Gerrit-Project: simtrace2
Gerrit-Branch: master
Gerrit-Change-Id: I71b703162219484e43638f1f2f692e9dd554ef55
Gerrit-Change-Number: 23616
Gerrit-PatchSet: 2
Gerrit-Owner: laforge <laforge at osmocom.org>
Gerrit-Assignee: laforge <laforge at osmocom.org>
Gerrit-Reviewer: Jenkins Builder
Gerrit-Reviewer: tsaitgaist <kredon at sysmocom.de>
Gerrit-MessageType: newpatchset
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