Change in osmocom-bb[master]: firmware: gtm900b: fix MEMIF configuration

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laforge gerrit-no-reply at lists.osmocom.org
Wed Sep 30 23:39:27 UTC 2020


laforge has uploaded this change for review. ( https://gerrit.osmocom.org/c/osmocom-bb/+/20328 )


Change subject: firmware: gtm900b: fix MEMIF configuration
......................................................................

firmware: gtm900b: fix MEMIF configuration

* Switch Calypso output CS4/ADD22 to ADD22 function as needed
  in order to access the upper half of the flash on GTM900 hw
  variant MG01GSMT.

* Set WS=4 for safety - please refer to this technical article for
  the underlying theory:

https://www.freecalypso.org/hg/freecalypso-docs/file/tip/MEMIF-wait-states

Related: OS#4769
Change-Id: I1923243937d7251f6bcfe71a0b1cc0e206a81cfa
---
M src/target/firmware/board/gtm900b/init.c
1 file changed, 19 insertions(+), 3 deletions(-)



  git pull ssh://gerrit.osmocom.org:29418/osmocom-bb refs/changes/28/20328/1

diff --git a/src/target/firmware/board/gtm900b/init.c b/src/target/firmware/board/gtm900b/init.c
index f04d314..8de9956 100644
--- a/src/target/firmware/board/gtm900b/init.c
+++ b/src/target/firmware/board/gtm900b/init.c
@@ -50,6 +50,7 @@
 
 #define ARMIO_LATCH_OUT 0xfffe4802
 #define IO_CNTL_REG	0xfffe4804
+#define ARM_CONF_REG	0xfffef006
 #define ASIC_CONF_REG	0xfffef008
 #define IO_CONF_REG	0xfffef00a
 #define LPG_LCR_REG	0xfffe7800
@@ -77,13 +78,28 @@
 	/* Set LPG output permanently on (power LED) */
 	writew(1, LPG_PM_REG);
 	writew((1 << 7), LPG_LCR_REG);
+
+	/* configure ADD(22), needed for second half of flash on MG01GSMT */
+	reg = readw(ARM_CONF_REG);
+	reg |= (1 << 3);
+	writew(reg, ARM_CONF_REG);
 }
 
 void board_init(int with_irq)
 {
-	/* Configure the memory interface */
-	calypso_mem_cfg(CALYPSO_nCS0, 3, CALYPSO_MEM_16bit, 1);
-	calypso_mem_cfg(CALYPSO_nCS1, 3, CALYPSO_MEM_16bit, 1);
+	/*
+	 * Configure the memory interface.
+	 * Huawei's official fw sets WS=4 for RAM, but not for flash -
+	 * but let's be consistent and use WS=4 for both.  Please refer
+	 * to this technical article for the underlying theory:
+https://www.freecalypso.org/hg/freecalypso-docs/file/tip/MEMIF-wait-states
+	 */
+	calypso_mem_cfg(CALYPSO_nCS0, 4, CALYPSO_MEM_16bit, 1);
+	calypso_mem_cfg(CALYPSO_nCS1, 4, CALYPSO_MEM_16bit, 1);
+	/*
+	 * The remaining 3 chip selects are unused on this hw,
+	 * thus their settings are dummies.
+	 */
 	calypso_mem_cfg(CALYPSO_nCS2, 5, CALYPSO_MEM_16bit, 1);
 	calypso_mem_cfg(CALYPSO_nCS3, 5, CALYPSO_MEM_16bit, 1);
 	calypso_mem_cfg(CALYPSO_CS4, 0, CALYPSO_MEM_8bit, 1);

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Gerrit-Project: osmocom-bb
Gerrit-Branch: master
Gerrit-Change-Id: I1923243937d7251f6bcfe71a0b1cc0e206a81cfa
Gerrit-Change-Number: 20328
Gerrit-PatchSet: 1
Gerrit-Owner: laforge <laforge at osmocom.org>
Gerrit-MessageType: newchange
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