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Kévin Redon gerrit-no-reply at lists.osmocom.orgKévin Redon has uploaded this change for review. ( https://gerrit.osmocom.org/c/osmo-ccid-firmware/+/14391 Change subject: ASF: update e54 library ...................................................................... ASF: update e54 library E54 ASFv4 change from backend 1.5.122 update local files to stay in sync Change-Id: Ib9017744644357ba9ec99eddbcc89d7f95068c34 --- M sysmoOCTSIM/AtmelStart.gpdsc M sysmoOCTSIM/hri/hri_e54.h D sysmoOCTSIM/hri/hri_mpu_e54.h D sysmoOCTSIM/hri/hri_nvic_e54.h D sysmoOCTSIM/hri/hri_systemcontrol_e54.h D sysmoOCTSIM/hri/hri_systick_e54.h 6 files changed, 1 insertion(+), 2,057 deletions(-) git pull ssh://gerrit.osmocom.org:29418/osmo-ccid-firmware refs/changes/91/14391/1 diff --git a/sysmoOCTSIM/AtmelStart.gpdsc b/sysmoOCTSIM/AtmelStart.gpdsc index c7c5bd4..c2dfad4 100644 --- a/sysmoOCTSIM/AtmelStart.gpdsc +++ b/sysmoOCTSIM/AtmelStart.gpdsc @@ -127,8 +127,6 @@ <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_i2s_e54.h"/> <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_icm_e54.h"/> <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_mclk_e54.h"/> - <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_mpu_e54.h"/> - <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_nvic_e54.h"/> <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_nvmctrl_e54.h"/> <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_osc32kctrl_e54.h"/> <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_oscctrl_e54.h"/> @@ -144,8 +142,6 @@ <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_sdhc_e54.h"/> <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_sercom_e54.h"/> <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_supc_e54.h"/> - <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_systemcontrol_e54.h"/> - <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_systick_e54.h"/> <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_tc_e54.h"/> <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_tcc_e54.h"/> <file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_trng_e54.h"/> diff --git a/sysmoOCTSIM/hri/hri_e54.h b/sysmoOCTSIM/hri/hri_e54.h index a562a2d..46e77ca 100644 --- a/sysmoOCTSIM/hri/hri_e54.h +++ b/sysmoOCTSIM/hri/hri_e54.h @@ -3,7 +3,7 @@ * * \brief SAM E54 HRI top-level header file * - * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. + * Copyright (c) 2016-2019 Microchip Technology Inc. and its subsidiaries. * * \asf_license_start * @@ -52,8 +52,6 @@ #include <hri_i2s_e54.h> #include <hri_icm_e54.h> #include <hri_mclk_e54.h> -#include <hri_mpu_e54.h> -#include <hri_nvic_e54.h> #include <hri_nvmctrl_e54.h> #include <hri_osc32kctrl_e54.h> #include <hri_oscctrl_e54.h> @@ -69,8 +67,6 @@ #include <hri_sdhc_e54.h> #include <hri_sercom_e54.h> #include <hri_supc_e54.h> -#include <hri_systemcontrol_e54.h> -#include <hri_systick_e54.h> #include <hri_tc_e54.h> #include <hri_tcc_e54.h> #include <hri_trng_e54.h> diff --git a/sysmoOCTSIM/hri/hri_mpu_e54.h b/sysmoOCTSIM/hri/hri_mpu_e54.h deleted file mode 100644 index b195272..0000000 --- a/sysmoOCTSIM/hri/hri_mpu_e54.h +++ /dev/null @@ -1,518 +0,0 @@ -/** - * \file - * - * \brief SAM MPU - * - * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. - * - * \asf_license_start - * - * \page License - * - * Subject to your compliance with these terms, you may use Microchip - * software and any derivatives exclusively with Microchip products. - * It is your responsibility to comply with third party license terms applicable - * to your use of third party software (including open source software) that - * may accompany Microchip software. - * - * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, - * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, - * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE - * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL - * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE - * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE - * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT - * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY - * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, - * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. - * - * \asf_license_stop - * - */ - -#ifdef _SAME54_MPU_COMPONENT_ -#ifndef _HRI_MPU_E54_H_INCLUDED_ -#define _HRI_MPU_E54_H_INCLUDED_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include <stdbool.h> -#include <hal_atomic.h> - -#if defined(ENABLE_MPU_CRITICAL_SECTIONS) -#define MPU_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER() -#define MPU_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE() -#else -#define MPU_CRITICAL_SECTION_ENTER() -#define MPU_CRITICAL_SECTION_LEAVE() -#endif - -typedef uint32_t hri_mpu_ctrl_reg_t; -typedef uint32_t hri_mpu_rasr_a1_reg_t; -typedef uint32_t hri_mpu_rasr_a2_reg_t; -typedef uint32_t hri_mpu_rasr_a3_reg_t; -typedef uint32_t hri_mpu_rasr_reg_t; -typedef uint32_t hri_mpu_rbar_a1_reg_t; -typedef uint32_t hri_mpu_rbar_a2_reg_t; -typedef uint32_t hri_mpu_rbar_a3_reg_t; -typedef uint32_t hri_mpu_rbar_reg_t; -typedef uint32_t hri_mpu_rnr_reg_t; -typedef uint32_t hri_mpu_type_reg_t; - -static inline bool hri_mpu_get_TYPE_SEPARATE_bit(const void *const hw) -{ - return (((Mpu *)hw)->TYPE.reg & MPU_TYPE_SEPARATE) >> 0; -} - -static inline hri_mpu_type_reg_t hri_mpu_get_TYPE_DREGION_bf(const void *const hw, hri_mpu_type_reg_t mask) -{ - return (((Mpu *)hw)->TYPE.reg & MPU_TYPE_DREGION(mask)) >> 8; -} - -static inline hri_mpu_type_reg_t hri_mpu_read_TYPE_DREGION_bf(const void *const hw) -{ - return (((Mpu *)hw)->TYPE.reg & MPU_TYPE_DREGION_Msk) >> 8; -} - -static inline hri_mpu_type_reg_t hri_mpu_get_TYPE_IREGION_bf(const void *const hw, hri_mpu_type_reg_t mask) -{ - return (((Mpu *)hw)->TYPE.reg & MPU_TYPE_IREGION(mask)) >> 16; -} - -static inline hri_mpu_type_reg_t hri_mpu_read_TYPE_IREGION_bf(const void *const hw) -{ - return (((Mpu *)hw)->TYPE.reg & MPU_TYPE_IREGION_Msk) >> 16; -} - -static inline hri_mpu_type_reg_t hri_mpu_get_TYPE_reg(const void *const hw, hri_mpu_type_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->TYPE.reg; - tmp &= mask; - return tmp; -} - -static inline hri_mpu_type_reg_t hri_mpu_read_TYPE_reg(const void *const hw) -{ - return ((Mpu *)hw)->TYPE.reg; -} - -static inline void hri_mpu_set_CTRL_reg(const void *const hw, hri_mpu_ctrl_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->CTRL.reg |= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_ctrl_reg_t hri_mpu_get_CTRL_reg(const void *const hw, hri_mpu_ctrl_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->CTRL.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_mpu_write_CTRL_reg(const void *const hw, hri_mpu_ctrl_reg_t data) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->CTRL.reg = data; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_clear_CTRL_reg(const void *const hw, hri_mpu_ctrl_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->CTRL.reg &= ~mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_toggle_CTRL_reg(const void *const hw, hri_mpu_ctrl_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->CTRL.reg ^= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_ctrl_reg_t hri_mpu_read_CTRL_reg(const void *const hw) -{ - return ((Mpu *)hw)->CTRL.reg; -} - -static inline void hri_mpu_set_RNR_reg(const void *const hw, hri_mpu_rnr_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RNR.reg |= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rnr_reg_t hri_mpu_get_RNR_reg(const void *const hw, hri_mpu_rnr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->RNR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_mpu_write_RNR_reg(const void *const hw, hri_mpu_rnr_reg_t data) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RNR.reg = data; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_clear_RNR_reg(const void *const hw, hri_mpu_rnr_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RNR.reg &= ~mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_toggle_RNR_reg(const void *const hw, hri_mpu_rnr_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RNR.reg ^= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rnr_reg_t hri_mpu_read_RNR_reg(const void *const hw) -{ - return ((Mpu *)hw)->RNR.reg; -} - -static inline void hri_mpu_set_RBAR_reg(const void *const hw, hri_mpu_rbar_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR.reg |= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rbar_reg_t hri_mpu_get_RBAR_reg(const void *const hw, hri_mpu_rbar_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->RBAR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_mpu_write_RBAR_reg(const void *const hw, hri_mpu_rbar_reg_t data) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR.reg = data; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_clear_RBAR_reg(const void *const hw, hri_mpu_rbar_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR.reg &= ~mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_toggle_RBAR_reg(const void *const hw, hri_mpu_rbar_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR.reg ^= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rbar_reg_t hri_mpu_read_RBAR_reg(const void *const hw) -{ - return ((Mpu *)hw)->RBAR.reg; -} - -static inline void hri_mpu_set_RASR_reg(const void *const hw, hri_mpu_rasr_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR.reg |= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rasr_reg_t hri_mpu_get_RASR_reg(const void *const hw, hri_mpu_rasr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->RASR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_mpu_write_RASR_reg(const void *const hw, hri_mpu_rasr_reg_t data) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR.reg = data; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_clear_RASR_reg(const void *const hw, hri_mpu_rasr_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR.reg &= ~mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_toggle_RASR_reg(const void *const hw, hri_mpu_rasr_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR.reg ^= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rasr_reg_t hri_mpu_read_RASR_reg(const void *const hw) -{ - return ((Mpu *)hw)->RASR.reg; -} - -static inline void hri_mpu_set_RBAR_A1_reg(const void *const hw, hri_mpu_rbar_a1_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A1.reg |= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rbar_a1_reg_t hri_mpu_get_RBAR_A1_reg(const void *const hw, hri_mpu_rbar_a1_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->RBAR_A1.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_mpu_write_RBAR_A1_reg(const void *const hw, hri_mpu_rbar_a1_reg_t data) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A1.reg = data; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_clear_RBAR_A1_reg(const void *const hw, hri_mpu_rbar_a1_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A1.reg &= ~mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_toggle_RBAR_A1_reg(const void *const hw, hri_mpu_rbar_a1_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A1.reg ^= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rbar_a1_reg_t hri_mpu_read_RBAR_A1_reg(const void *const hw) -{ - return ((Mpu *)hw)->RBAR_A1.reg; -} - -static inline void hri_mpu_set_RASR_A1_reg(const void *const hw, hri_mpu_rasr_a1_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A1.reg |= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rasr_a1_reg_t hri_mpu_get_RASR_A1_reg(const void *const hw, hri_mpu_rasr_a1_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->RASR_A1.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_mpu_write_RASR_A1_reg(const void *const hw, hri_mpu_rasr_a1_reg_t data) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A1.reg = data; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_clear_RASR_A1_reg(const void *const hw, hri_mpu_rasr_a1_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A1.reg &= ~mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_toggle_RASR_A1_reg(const void *const hw, hri_mpu_rasr_a1_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A1.reg ^= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rasr_a1_reg_t hri_mpu_read_RASR_A1_reg(const void *const hw) -{ - return ((Mpu *)hw)->RASR_A1.reg; -} - -static inline void hri_mpu_set_RBAR_A2_reg(const void *const hw, hri_mpu_rbar_a2_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A2.reg |= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rbar_a2_reg_t hri_mpu_get_RBAR_A2_reg(const void *const hw, hri_mpu_rbar_a2_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->RBAR_A2.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_mpu_write_RBAR_A2_reg(const void *const hw, hri_mpu_rbar_a2_reg_t data) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A2.reg = data; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_clear_RBAR_A2_reg(const void *const hw, hri_mpu_rbar_a2_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A2.reg &= ~mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_toggle_RBAR_A2_reg(const void *const hw, hri_mpu_rbar_a2_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A2.reg ^= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rbar_a2_reg_t hri_mpu_read_RBAR_A2_reg(const void *const hw) -{ - return ((Mpu *)hw)->RBAR_A2.reg; -} - -static inline void hri_mpu_set_RASR_A2_reg(const void *const hw, hri_mpu_rasr_a2_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A2.reg |= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rasr_a2_reg_t hri_mpu_get_RASR_A2_reg(const void *const hw, hri_mpu_rasr_a2_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->RASR_A2.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_mpu_write_RASR_A2_reg(const void *const hw, hri_mpu_rasr_a2_reg_t data) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A2.reg = data; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_clear_RASR_A2_reg(const void *const hw, hri_mpu_rasr_a2_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A2.reg &= ~mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_toggle_RASR_A2_reg(const void *const hw, hri_mpu_rasr_a2_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A2.reg ^= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rasr_a2_reg_t hri_mpu_read_RASR_A2_reg(const void *const hw) -{ - return ((Mpu *)hw)->RASR_A2.reg; -} - -static inline void hri_mpu_set_RBAR_A3_reg(const void *const hw, hri_mpu_rbar_a3_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A3.reg |= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rbar_a3_reg_t hri_mpu_get_RBAR_A3_reg(const void *const hw, hri_mpu_rbar_a3_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->RBAR_A3.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_mpu_write_RBAR_A3_reg(const void *const hw, hri_mpu_rbar_a3_reg_t data) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A3.reg = data; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_clear_RBAR_A3_reg(const void *const hw, hri_mpu_rbar_a3_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A3.reg &= ~mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_toggle_RBAR_A3_reg(const void *const hw, hri_mpu_rbar_a3_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RBAR_A3.reg ^= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rbar_a3_reg_t hri_mpu_read_RBAR_A3_reg(const void *const hw) -{ - return ((Mpu *)hw)->RBAR_A3.reg; -} - -static inline void hri_mpu_set_RASR_A3_reg(const void *const hw, hri_mpu_rasr_a3_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A3.reg |= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rasr_a3_reg_t hri_mpu_get_RASR_A3_reg(const void *const hw, hri_mpu_rasr_a3_reg_t mask) -{ - uint32_t tmp; - tmp = ((Mpu *)hw)->RASR_A3.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_mpu_write_RASR_A3_reg(const void *const hw, hri_mpu_rasr_a3_reg_t data) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A3.reg = data; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_clear_RASR_A3_reg(const void *const hw, hri_mpu_rasr_a3_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A3.reg &= ~mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_mpu_toggle_RASR_A3_reg(const void *const hw, hri_mpu_rasr_a3_reg_t mask) -{ - MPU_CRITICAL_SECTION_ENTER(); - ((Mpu *)hw)->RASR_A3.reg ^= mask; - MPU_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_mpu_rasr_a3_reg_t hri_mpu_read_RASR_A3_reg(const void *const hw) -{ - return ((Mpu *)hw)->RASR_A3.reg; -} - -#ifdef __cplusplus -} -#endif - -#endif /* _HRI_MPU_E54_H_INCLUDED */ -#endif /* _SAME54_MPU_COMPONENT_ */ diff --git a/sysmoOCTSIM/hri/hri_nvic_e54.h b/sysmoOCTSIM/hri/hri_nvic_e54.h deleted file mode 100644 index ce7d41f..0000000 --- a/sysmoOCTSIM/hri/hri_nvic_e54.h +++ /dev/null @@ -1,319 +0,0 @@ -/** - * \file - * - * \brief SAM NVIC - * - * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. - * - * \asf_license_start - * - * \page License - * - * Subject to your compliance with these terms, you may use Microchip - * software and any derivatives exclusively with Microchip products. - * It is your responsibility to comply with third party license terms applicable - * to your use of third party software (including open source software) that - * may accompany Microchip software. - * - * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, - * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, - * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE - * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL - * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE - * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE - * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT - * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY - * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, - * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. - * - * \asf_license_stop - * - */ - -#ifdef _SAME54_NVIC_COMPONENT_ -#ifndef _HRI_NVIC_E54_H_INCLUDED_ -#define _HRI_NVIC_E54_H_INCLUDED_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include <stdbool.h> -#include <hal_atomic.h> - -#if defined(ENABLE_NVIC_CRITICAL_SECTIONS) -#define NVIC_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER() -#define NVIC_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE() -#else -#define NVIC_CRITICAL_SECTION_ENTER() -#define NVIC_CRITICAL_SECTION_LEAVE() -#endif - -typedef uint32_t hri_nvic_iabr_reg_t; -typedef uint32_t hri_nvic_icer_reg_t; -typedef uint32_t hri_nvic_icpr_reg_t; -typedef uint32_t hri_nvic_iser_reg_t; -typedef uint32_t hri_nvic_ispr_reg_t; -typedef uint32_t hri_nvic_stir_reg_t; -typedef uint8_t hri_nvic_ip_reg_t; - -static inline void hri_nvic_set_ISER_reg(const void *const hw, uint8_t index, hri_nvic_iser_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ISER[index].reg |= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_iser_reg_t hri_nvic_get_ISER_reg(const void *const hw, uint8_t index, hri_nvic_iser_reg_t mask) -{ - uint32_t tmp; - tmp = ((Nvic *)hw)->ISER[index].reg; - tmp &= mask; - return tmp; -} - -static inline void hri_nvic_write_ISER_reg(const void *const hw, uint8_t index, hri_nvic_iser_reg_t data) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ISER[index].reg = data; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_clear_ISER_reg(const void *const hw, uint8_t index, hri_nvic_iser_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ISER[index].reg &= ~mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_toggle_ISER_reg(const void *const hw, uint8_t index, hri_nvic_iser_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ISER[index].reg ^= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_iser_reg_t hri_nvic_read_ISER_reg(const void *const hw, uint8_t index) -{ - return ((Nvic *)hw)->ISER[index].reg; -} - -static inline void hri_nvic_set_ICER_reg(const void *const hw, uint8_t index, hri_nvic_icer_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ICER[index].reg |= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_icer_reg_t hri_nvic_get_ICER_reg(const void *const hw, uint8_t index, hri_nvic_icer_reg_t mask) -{ - uint32_t tmp; - tmp = ((Nvic *)hw)->ICER[index].reg; - tmp &= mask; - return tmp; -} - -static inline void hri_nvic_write_ICER_reg(const void *const hw, uint8_t index, hri_nvic_icer_reg_t data) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ICER[index].reg = data; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_clear_ICER_reg(const void *const hw, uint8_t index, hri_nvic_icer_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ICER[index].reg &= ~mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_toggle_ICER_reg(const void *const hw, uint8_t index, hri_nvic_icer_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ICER[index].reg ^= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_icer_reg_t hri_nvic_read_ICER_reg(const void *const hw, uint8_t index) -{ - return ((Nvic *)hw)->ICER[index].reg; -} - -static inline void hri_nvic_set_ISPR_reg(const void *const hw, uint8_t index, hri_nvic_ispr_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ISPR[index].reg |= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_ispr_reg_t hri_nvic_get_ISPR_reg(const void *const hw, uint8_t index, hri_nvic_ispr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Nvic *)hw)->ISPR[index].reg; - tmp &= mask; - return tmp; -} - -static inline void hri_nvic_write_ISPR_reg(const void *const hw, uint8_t index, hri_nvic_ispr_reg_t data) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ISPR[index].reg = data; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_clear_ISPR_reg(const void *const hw, uint8_t index, hri_nvic_ispr_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ISPR[index].reg &= ~mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_toggle_ISPR_reg(const void *const hw, uint8_t index, hri_nvic_ispr_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ISPR[index].reg ^= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_ispr_reg_t hri_nvic_read_ISPR_reg(const void *const hw, uint8_t index) -{ - return ((Nvic *)hw)->ISPR[index].reg; -} - -static inline void hri_nvic_set_ICPR_reg(const void *const hw, uint8_t index, hri_nvic_icpr_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ICPR[index].reg |= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_icpr_reg_t hri_nvic_get_ICPR_reg(const void *const hw, uint8_t index, hri_nvic_icpr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Nvic *)hw)->ICPR[index].reg; - tmp &= mask; - return tmp; -} - -static inline void hri_nvic_write_ICPR_reg(const void *const hw, uint8_t index, hri_nvic_icpr_reg_t data) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ICPR[index].reg = data; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_clear_ICPR_reg(const void *const hw, uint8_t index, hri_nvic_icpr_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ICPR[index].reg &= ~mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_toggle_ICPR_reg(const void *const hw, uint8_t index, hri_nvic_icpr_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->ICPR[index].reg ^= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_icpr_reg_t hri_nvic_read_ICPR_reg(const void *const hw, uint8_t index) -{ - return ((Nvic *)hw)->ICPR[index].reg; -} - -static inline void hri_nvic_set_IABR_reg(const void *const hw, uint8_t index, hri_nvic_iabr_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->IABR[index].reg |= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_iabr_reg_t hri_nvic_get_IABR_reg(const void *const hw, uint8_t index, hri_nvic_iabr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Nvic *)hw)->IABR[index].reg; - tmp &= mask; - return tmp; -} - -static inline void hri_nvic_write_IABR_reg(const void *const hw, uint8_t index, hri_nvic_iabr_reg_t data) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->IABR[index].reg = data; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_clear_IABR_reg(const void *const hw, uint8_t index, hri_nvic_iabr_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->IABR[index].reg &= ~mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_toggle_IABR_reg(const void *const hw, uint8_t index, hri_nvic_iabr_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->IABR[index].reg ^= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_iabr_reg_t hri_nvic_read_IABR_reg(const void *const hw, uint8_t index) -{ - return ((Nvic *)hw)->IABR[index].reg; -} - -static inline void hri_nvic_set_IP_reg(const void *const hw, uint8_t index, hri_nvic_ip_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->IP[index].reg |= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_ip_reg_t hri_nvic_get_IP_reg(const void *const hw, uint8_t index, hri_nvic_ip_reg_t mask) -{ - uint8_t tmp; - tmp = ((Nvic *)hw)->IP[index].reg; - tmp &= mask; - return tmp; -} - -static inline void hri_nvic_write_IP_reg(const void *const hw, uint8_t index, hri_nvic_ip_reg_t data) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->IP[index].reg = data; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_clear_IP_reg(const void *const hw, uint8_t index, hri_nvic_ip_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->IP[index].reg &= ~mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_nvic_toggle_IP_reg(const void *const hw, uint8_t index, hri_nvic_ip_reg_t mask) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->IP[index].reg ^= mask; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_nvic_ip_reg_t hri_nvic_read_IP_reg(const void *const hw, uint8_t index) -{ - return ((Nvic *)hw)->IP[index].reg; -} - -static inline void hri_nvic_write_STIR_reg(const void *const hw, hri_nvic_stir_reg_t data) -{ - NVIC_CRITICAL_SECTION_ENTER(); - ((Nvic *)hw)->STIR.reg = data; - NVIC_CRITICAL_SECTION_LEAVE(); -} - -#ifdef __cplusplus -} -#endif - -#endif /* _HRI_NVIC_E54_H_INCLUDED */ -#endif /* _SAME54_NVIC_COMPONENT_ */ diff --git a/sysmoOCTSIM/hri/hri_systemcontrol_e54.h b/sysmoOCTSIM/hri/hri_systemcontrol_e54.h deleted file mode 100644 index 000ef90..0000000 --- a/sysmoOCTSIM/hri/hri_systemcontrol_e54.h +++ /dev/null @@ -1,992 +0,0 @@ -/** - * \file - * - * \brief SAM SystemControl - * - * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. - * - * \asf_license_start - * - * \page License - * - * Subject to your compliance with these terms, you may use Microchip - * software and any derivatives exclusively with Microchip products. - * It is your responsibility to comply with third party license terms applicable - * to your use of third party software (including open source software) that - * may accompany Microchip software. - * - * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, - * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, - * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE - * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL - * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE - * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE - * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT - * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY - * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, - * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. - * - * \asf_license_stop - * - */ - -#ifdef _SAME54_SystemControl_COMPONENT_ -#ifndef _HRI_SystemControl_E54_H_INCLUDED_ -#define _HRI_SystemControl_E54_H_INCLUDED_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include <stdbool.h> -#include <hal_atomic.h> - -#if defined(ENABLE_SystemControl_CRITICAL_SECTIONS) -#define SystemControl_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER() -#define SystemControl_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE() -#else -#define SystemControl_CRITICAL_SECTION_ENTER() -#define SystemControl_CRITICAL_SECTION_LEAVE() -#endif - -typedef uint32_t hri_systemcontrol_actlr_reg_t; -typedef uint32_t hri_systemcontrol_adr_reg_t; -typedef uint32_t hri_systemcontrol_afsr_reg_t; -typedef uint32_t hri_systemcontrol_aircr_reg_t; -typedef uint32_t hri_systemcontrol_bfar_reg_t; -typedef uint32_t hri_systemcontrol_ccr_reg_t; -typedef uint32_t hri_systemcontrol_cfsr_reg_t; -typedef uint32_t hri_systemcontrol_cpacr_reg_t; -typedef uint32_t hri_systemcontrol_cpuid_reg_t; -typedef uint32_t hri_systemcontrol_dfr_reg_t; -typedef uint32_t hri_systemcontrol_dfsr_reg_t; -typedef uint32_t hri_systemcontrol_hfsr_reg_t; -typedef uint32_t hri_systemcontrol_icsr_reg_t; -typedef uint32_t hri_systemcontrol_ictr_reg_t; -typedef uint32_t hri_systemcontrol_isar_reg_t; -typedef uint32_t hri_systemcontrol_mmfar_reg_t; -typedef uint32_t hri_systemcontrol_mmfr_reg_t; -typedef uint32_t hri_systemcontrol_pfr_reg_t; -typedef uint32_t hri_systemcontrol_scr_reg_t; -typedef uint32_t hri_systemcontrol_shcsr_reg_t; -typedef uint32_t hri_systemcontrol_shpr1_reg_t; -typedef uint32_t hri_systemcontrol_shpr2_reg_t; -typedef uint32_t hri_systemcontrol_shpr3_reg_t; -typedef uint32_t hri_systemcontrol_vtor_reg_t; - -static inline hri_systemcontrol_ictr_reg_t hri_systemcontrol_get_ICTR_INTLINESNUM_bf(const void *const hw, - hri_systemcontrol_ictr_reg_t mask) -{ - return (((Systemcontrol *)hw)->ICTR.reg & SystemControl_ICTR_INTLINESNUM(mask)) >> 0; -} - -static inline hri_systemcontrol_ictr_reg_t hri_systemcontrol_read_ICTR_INTLINESNUM_bf(const void *const hw) -{ - return (((Systemcontrol *)hw)->ICTR.reg & SystemControl_ICTR_INTLINESNUM_Msk) >> 0; -} - -static inline hri_systemcontrol_ictr_reg_t hri_systemcontrol_get_ICTR_reg(const void *const hw, - hri_systemcontrol_ictr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->ICTR.reg; - tmp &= mask; - return tmp; -} - -static inline hri_systemcontrol_ictr_reg_t hri_systemcontrol_read_ICTR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->ICTR.reg; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_get_CPUID_REVISION_bf(const void *const hw, - hri_systemcontrol_cpuid_reg_t mask) -{ - return (((Systemcontrol *)hw)->CPUID.reg & SystemControl_CPUID_REVISION(mask)) >> 0; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_read_CPUID_REVISION_bf(const void *const hw) -{ - return (((Systemcontrol *)hw)->CPUID.reg & SystemControl_CPUID_REVISION_Msk) >> 0; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_get_CPUID_PARTNO_bf(const void *const hw, - hri_systemcontrol_cpuid_reg_t mask) -{ - return (((Systemcontrol *)hw)->CPUID.reg & SystemControl_CPUID_PARTNO(mask)) >> 4; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_read_CPUID_PARTNO_bf(const void *const hw) -{ - return (((Systemcontrol *)hw)->CPUID.reg & SystemControl_CPUID_PARTNO_Msk) >> 4; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_get_CPUID_CONSTANT_bf(const void *const hw, - hri_systemcontrol_cpuid_reg_t mask) -{ - return (((Systemcontrol *)hw)->CPUID.reg & SystemControl_CPUID_CONSTANT(mask)) >> 16; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_read_CPUID_CONSTANT_bf(const void *const hw) -{ - return (((Systemcontrol *)hw)->CPUID.reg & SystemControl_CPUID_CONSTANT_Msk) >> 16; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_get_CPUID_VARIANT_bf(const void *const hw, - hri_systemcontrol_cpuid_reg_t mask) -{ - return (((Systemcontrol *)hw)->CPUID.reg & SystemControl_CPUID_VARIANT(mask)) >> 20; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_read_CPUID_VARIANT_bf(const void *const hw) -{ - return (((Systemcontrol *)hw)->CPUID.reg & SystemControl_CPUID_VARIANT_Msk) >> 20; -} - -static inline hri_systemcontrol_cpuid_reg_t -hri_systemcontrol_get_CPUID_IMPLEMENTER_bf(const void *const hw, hri_systemcontrol_cpuid_reg_t mask) -{ - return (((Systemcontrol *)hw)->CPUID.reg & SystemControl_CPUID_IMPLEMENTER(mask)) >> 24; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_read_CPUID_IMPLEMENTER_bf(const void *const hw) -{ - return (((Systemcontrol *)hw)->CPUID.reg & SystemControl_CPUID_IMPLEMENTER_Msk) >> 24; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_get_CPUID_reg(const void *const hw, - hri_systemcontrol_cpuid_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->CPUID.reg; - tmp &= mask; - return tmp; -} - -static inline hri_systemcontrol_cpuid_reg_t hri_systemcontrol_read_CPUID_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->CPUID.reg; -} - -static inline hri_systemcontrol_dfr_reg_t hri_systemcontrol_get_DFR_reg(const void *const hw, - hri_systemcontrol_dfr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->DFR.reg; - tmp &= mask; - return tmp; -} - -static inline hri_systemcontrol_dfr_reg_t hri_systemcontrol_read_DFR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->DFR.reg; -} - -static inline hri_systemcontrol_adr_reg_t hri_systemcontrol_get_ADR_reg(const void *const hw, - hri_systemcontrol_adr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->ADR.reg; - tmp &= mask; - return tmp; -} - -static inline hri_systemcontrol_adr_reg_t hri_systemcontrol_read_ADR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->ADR.reg; -} - -static inline hri_systemcontrol_mmfr_reg_t hri_systemcontrol_get_MMFR_reg(const void *const hw, uint8_t index, - hri_systemcontrol_mmfr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->MMFR[index].reg; - tmp &= mask; - return tmp; -} - -static inline hri_systemcontrol_mmfr_reg_t hri_systemcontrol_read_MMFR_reg(const void *const hw, uint8_t index) -{ - return ((Systemcontrol *)hw)->MMFR[index].reg; -} - -static inline hri_systemcontrol_isar_reg_t hri_systemcontrol_get_ISAR_reg(const void *const hw, uint8_t index, - hri_systemcontrol_isar_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->ISAR[index].reg; - tmp &= mask; - return tmp; -} - -static inline hri_systemcontrol_isar_reg_t hri_systemcontrol_read_ISAR_reg(const void *const hw, uint8_t index) -{ - return ((Systemcontrol *)hw)->ISAR[index].reg; -} - -static inline void hri_systemcontrol_set_ACTLR_reg(const void *const hw, hri_systemcontrol_actlr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->ACTLR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_actlr_reg_t hri_systemcontrol_get_ACTLR_reg(const void *const hw, - hri_systemcontrol_actlr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->ACTLR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_ACTLR_reg(const void *const hw, hri_systemcontrol_actlr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->ACTLR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_ACTLR_reg(const void *const hw, hri_systemcontrol_actlr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->ACTLR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_ACTLR_reg(const void *const hw, hri_systemcontrol_actlr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->ACTLR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_actlr_reg_t hri_systemcontrol_read_ACTLR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->ACTLR.reg; -} - -static inline void hri_systemcontrol_set_ICSR_reg(const void *const hw, hri_systemcontrol_icsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->ICSR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_icsr_reg_t hri_systemcontrol_get_ICSR_reg(const void *const hw, - hri_systemcontrol_icsr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->ICSR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_ICSR_reg(const void *const hw, hri_systemcontrol_icsr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->ICSR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_ICSR_reg(const void *const hw, hri_systemcontrol_icsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->ICSR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_ICSR_reg(const void *const hw, hri_systemcontrol_icsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->ICSR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_icsr_reg_t hri_systemcontrol_read_ICSR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->ICSR.reg; -} - -static inline void hri_systemcontrol_set_VTOR_reg(const void *const hw, hri_systemcontrol_vtor_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->VTOR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_vtor_reg_t hri_systemcontrol_get_VTOR_reg(const void *const hw, - hri_systemcontrol_vtor_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->VTOR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_VTOR_reg(const void *const hw, hri_systemcontrol_vtor_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->VTOR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_VTOR_reg(const void *const hw, hri_systemcontrol_vtor_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->VTOR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_VTOR_reg(const void *const hw, hri_systemcontrol_vtor_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->VTOR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_vtor_reg_t hri_systemcontrol_read_VTOR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->VTOR.reg; -} - -static inline void hri_systemcontrol_set_AIRCR_reg(const void *const hw, hri_systemcontrol_aircr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->AIRCR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_aircr_reg_t hri_systemcontrol_get_AIRCR_reg(const void *const hw, - hri_systemcontrol_aircr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->AIRCR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_AIRCR_reg(const void *const hw, hri_systemcontrol_aircr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->AIRCR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_AIRCR_reg(const void *const hw, hri_systemcontrol_aircr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->AIRCR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_AIRCR_reg(const void *const hw, hri_systemcontrol_aircr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->AIRCR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_aircr_reg_t hri_systemcontrol_read_AIRCR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->AIRCR.reg; -} - -static inline void hri_systemcontrol_set_SCR_reg(const void *const hw, hri_systemcontrol_scr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SCR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_scr_reg_t hri_systemcontrol_get_SCR_reg(const void *const hw, - hri_systemcontrol_scr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->SCR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_SCR_reg(const void *const hw, hri_systemcontrol_scr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SCR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_SCR_reg(const void *const hw, hri_systemcontrol_scr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SCR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_SCR_reg(const void *const hw, hri_systemcontrol_scr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SCR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_scr_reg_t hri_systemcontrol_read_SCR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->SCR.reg; -} - -static inline void hri_systemcontrol_set_CCR_reg(const void *const hw, hri_systemcontrol_ccr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CCR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_ccr_reg_t hri_systemcontrol_get_CCR_reg(const void *const hw, - hri_systemcontrol_ccr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->CCR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_CCR_reg(const void *const hw, hri_systemcontrol_ccr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CCR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_CCR_reg(const void *const hw, hri_systemcontrol_ccr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CCR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_CCR_reg(const void *const hw, hri_systemcontrol_ccr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CCR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_ccr_reg_t hri_systemcontrol_read_CCR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->CCR.reg; -} - -static inline void hri_systemcontrol_set_SHPR1_reg(const void *const hw, hri_systemcontrol_shpr1_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR1.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_shpr1_reg_t hri_systemcontrol_get_SHPR1_reg(const void *const hw, - hri_systemcontrol_shpr1_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->SHPR1.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_SHPR1_reg(const void *const hw, hri_systemcontrol_shpr1_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR1.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_SHPR1_reg(const void *const hw, hri_systemcontrol_shpr1_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR1.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_SHPR1_reg(const void *const hw, hri_systemcontrol_shpr1_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR1.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_shpr1_reg_t hri_systemcontrol_read_SHPR1_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->SHPR1.reg; -} - -static inline void hri_systemcontrol_set_SHPR2_reg(const void *const hw, hri_systemcontrol_shpr2_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR2.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_shpr2_reg_t hri_systemcontrol_get_SHPR2_reg(const void *const hw, - hri_systemcontrol_shpr2_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->SHPR2.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_SHPR2_reg(const void *const hw, hri_systemcontrol_shpr2_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR2.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_SHPR2_reg(const void *const hw, hri_systemcontrol_shpr2_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR2.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_SHPR2_reg(const void *const hw, hri_systemcontrol_shpr2_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR2.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_shpr2_reg_t hri_systemcontrol_read_SHPR2_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->SHPR2.reg; -} - -static inline void hri_systemcontrol_set_SHPR3_reg(const void *const hw, hri_systemcontrol_shpr3_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR3.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_shpr3_reg_t hri_systemcontrol_get_SHPR3_reg(const void *const hw, - hri_systemcontrol_shpr3_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->SHPR3.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_SHPR3_reg(const void *const hw, hri_systemcontrol_shpr3_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR3.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_SHPR3_reg(const void *const hw, hri_systemcontrol_shpr3_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR3.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_SHPR3_reg(const void *const hw, hri_systemcontrol_shpr3_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHPR3.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_shpr3_reg_t hri_systemcontrol_read_SHPR3_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->SHPR3.reg; -} - -static inline void hri_systemcontrol_set_SHCSR_reg(const void *const hw, hri_systemcontrol_shcsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHCSR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_shcsr_reg_t hri_systemcontrol_get_SHCSR_reg(const void *const hw, - hri_systemcontrol_shcsr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->SHCSR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_SHCSR_reg(const void *const hw, hri_systemcontrol_shcsr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHCSR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_SHCSR_reg(const void *const hw, hri_systemcontrol_shcsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHCSR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_SHCSR_reg(const void *const hw, hri_systemcontrol_shcsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->SHCSR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_shcsr_reg_t hri_systemcontrol_read_SHCSR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->SHCSR.reg; -} - -static inline void hri_systemcontrol_set_CFSR_reg(const void *const hw, hri_systemcontrol_cfsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CFSR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_cfsr_reg_t hri_systemcontrol_get_CFSR_reg(const void *const hw, - hri_systemcontrol_cfsr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->CFSR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_CFSR_reg(const void *const hw, hri_systemcontrol_cfsr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CFSR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_CFSR_reg(const void *const hw, hri_systemcontrol_cfsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CFSR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_CFSR_reg(const void *const hw, hri_systemcontrol_cfsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CFSR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_cfsr_reg_t hri_systemcontrol_read_CFSR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->CFSR.reg; -} - -static inline void hri_systemcontrol_set_HFSR_reg(const void *const hw, hri_systemcontrol_hfsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->HFSR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_hfsr_reg_t hri_systemcontrol_get_HFSR_reg(const void *const hw, - hri_systemcontrol_hfsr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->HFSR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_HFSR_reg(const void *const hw, hri_systemcontrol_hfsr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->HFSR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_HFSR_reg(const void *const hw, hri_systemcontrol_hfsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->HFSR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_HFSR_reg(const void *const hw, hri_systemcontrol_hfsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->HFSR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_hfsr_reg_t hri_systemcontrol_read_HFSR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->HFSR.reg; -} - -static inline void hri_systemcontrol_set_DFSR_reg(const void *const hw, hri_systemcontrol_dfsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->DFSR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_dfsr_reg_t hri_systemcontrol_get_DFSR_reg(const void *const hw, - hri_systemcontrol_dfsr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->DFSR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_DFSR_reg(const void *const hw, hri_systemcontrol_dfsr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->DFSR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_DFSR_reg(const void *const hw, hri_systemcontrol_dfsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->DFSR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_DFSR_reg(const void *const hw, hri_systemcontrol_dfsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->DFSR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_dfsr_reg_t hri_systemcontrol_read_DFSR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->DFSR.reg; -} - -static inline void hri_systemcontrol_set_MMFAR_reg(const void *const hw, hri_systemcontrol_mmfar_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->MMFAR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_mmfar_reg_t hri_systemcontrol_get_MMFAR_reg(const void *const hw, - hri_systemcontrol_mmfar_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->MMFAR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_MMFAR_reg(const void *const hw, hri_systemcontrol_mmfar_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->MMFAR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_MMFAR_reg(const void *const hw, hri_systemcontrol_mmfar_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->MMFAR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_MMFAR_reg(const void *const hw, hri_systemcontrol_mmfar_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->MMFAR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_mmfar_reg_t hri_systemcontrol_read_MMFAR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->MMFAR.reg; -} - -static inline void hri_systemcontrol_set_BFAR_reg(const void *const hw, hri_systemcontrol_bfar_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->BFAR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_bfar_reg_t hri_systemcontrol_get_BFAR_reg(const void *const hw, - hri_systemcontrol_bfar_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->BFAR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_BFAR_reg(const void *const hw, hri_systemcontrol_bfar_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->BFAR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_BFAR_reg(const void *const hw, hri_systemcontrol_bfar_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->BFAR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_BFAR_reg(const void *const hw, hri_systemcontrol_bfar_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->BFAR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_bfar_reg_t hri_systemcontrol_read_BFAR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->BFAR.reg; -} - -static inline void hri_systemcontrol_set_AFSR_reg(const void *const hw, hri_systemcontrol_afsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->AFSR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_afsr_reg_t hri_systemcontrol_get_AFSR_reg(const void *const hw, - hri_systemcontrol_afsr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->AFSR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_AFSR_reg(const void *const hw, hri_systemcontrol_afsr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->AFSR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_AFSR_reg(const void *const hw, hri_systemcontrol_afsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->AFSR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_AFSR_reg(const void *const hw, hri_systemcontrol_afsr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->AFSR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_afsr_reg_t hri_systemcontrol_read_AFSR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->AFSR.reg; -} - -static inline void hri_systemcontrol_set_PFR_reg(const void *const hw, uint8_t index, hri_systemcontrol_pfr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->PFR[index].reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_pfr_reg_t hri_systemcontrol_get_PFR_reg(const void *const hw, uint8_t index, - hri_systemcontrol_pfr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->PFR[index].reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_PFR_reg(const void *const hw, uint8_t index, - hri_systemcontrol_pfr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->PFR[index].reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_PFR_reg(const void *const hw, uint8_t index, - hri_systemcontrol_pfr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->PFR[index].reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_PFR_reg(const void *const hw, uint8_t index, - hri_systemcontrol_pfr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->PFR[index].reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_pfr_reg_t hri_systemcontrol_read_PFR_reg(const void *const hw, uint8_t index) -{ - return ((Systemcontrol *)hw)->PFR[index].reg; -} - -static inline void hri_systemcontrol_set_CPACR_reg(const void *const hw, hri_systemcontrol_cpacr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CPACR.reg |= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_cpacr_reg_t hri_systemcontrol_get_CPACR_reg(const void *const hw, - hri_systemcontrol_cpacr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systemcontrol *)hw)->CPACR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systemcontrol_write_CPACR_reg(const void *const hw, hri_systemcontrol_cpacr_reg_t data) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CPACR.reg = data; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_clear_CPACR_reg(const void *const hw, hri_systemcontrol_cpacr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CPACR.reg &= ~mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systemcontrol_toggle_CPACR_reg(const void *const hw, hri_systemcontrol_cpacr_reg_t mask) -{ - SystemControl_CRITICAL_SECTION_ENTER(); - ((Systemcontrol *)hw)->CPACR.reg ^= mask; - SystemControl_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systemcontrol_cpacr_reg_t hri_systemcontrol_read_CPACR_reg(const void *const hw) -{ - return ((Systemcontrol *)hw)->CPACR.reg; -} - -#ifdef __cplusplus -} -#endif - -#endif /* _HRI_SystemControl_E54_H_INCLUDED */ -#endif /* _SAME54_SystemControl_COMPONENT_ */ diff --git a/sysmoOCTSIM/hri/hri_systick_e54.h b/sysmoOCTSIM/hri/hri_systick_e54.h deleted file mode 100644 index 11a9224..0000000 --- a/sysmoOCTSIM/hri/hri_systick_e54.h +++ /dev/null @@ -1,219 +0,0 @@ -/** - * \file - * - * \brief SAM SysTick - * - * Copyright (c) 2016-2018 Microchip Technology Inc. and its subsidiaries. - * - * \asf_license_start - * - * \page License - * - * Subject to your compliance with these terms, you may use Microchip - * software and any derivatives exclusively with Microchip products. - * It is your responsibility to comply with third party license terms applicable - * to your use of third party software (including open source software) that - * may accompany Microchip software. - * - * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES, - * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE, - * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, - * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE - * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL - * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE - * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE - * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT - * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY - * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, - * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE. - * - * \asf_license_stop - * - */ - -#ifdef _SAME54_SysTick_COMPONENT_ -#ifndef _HRI_SysTick_E54_H_INCLUDED_ -#define _HRI_SysTick_E54_H_INCLUDED_ - -#ifdef __cplusplus -extern "C" { -#endif - -#include <stdbool.h> -#include <hal_atomic.h> - -#if defined(ENABLE_SysTick_CRITICAL_SECTIONS) -#define SysTick_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER() -#define SysTick_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE() -#else -#define SysTick_CRITICAL_SECTION_ENTER() -#define SysTick_CRITICAL_SECTION_LEAVE() -#endif - -typedef uint32_t hri_systick_calib_reg_t; -typedef uint32_t hri_systick_csr_reg_t; -typedef uint32_t hri_systick_cvr_reg_t; -typedef uint32_t hri_systick_rvr_reg_t; - -static inline bool hri_systick_get_CALIB_SKEW_bit(const void *const hw) -{ - return (((Systick *)hw)->CALIB.reg & SysTick_CALIB_SKEW) >> 30; -} - -static inline bool hri_systick_get_CALIB_NOREF_bit(const void *const hw) -{ - return (((Systick *)hw)->CALIB.reg & SysTick_CALIB_NOREF) >> 31; -} - -static inline hri_systick_calib_reg_t hri_systick_get_CALIB_TENMS_bf(const void *const hw, hri_systick_calib_reg_t mask) -{ - return (((Systick *)hw)->CALIB.reg & SysTick_CALIB_TENMS(mask)) >> 0; -} - -static inline hri_systick_calib_reg_t hri_systick_read_CALIB_TENMS_bf(const void *const hw) -{ - return (((Systick *)hw)->CALIB.reg & SysTick_CALIB_TENMS_Msk) >> 0; -} - -static inline hri_systick_calib_reg_t hri_systick_get_CALIB_reg(const void *const hw, hri_systick_calib_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systick *)hw)->CALIB.reg; - tmp &= mask; - return tmp; -} - -static inline hri_systick_calib_reg_t hri_systick_read_CALIB_reg(const void *const hw) -{ - return ((Systick *)hw)->CALIB.reg; -} - -static inline void hri_systick_set_CSR_reg(const void *const hw, hri_systick_csr_reg_t mask) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->CSR.reg |= mask; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systick_csr_reg_t hri_systick_get_CSR_reg(const void *const hw, hri_systick_csr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systick *)hw)->CSR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systick_write_CSR_reg(const void *const hw, hri_systick_csr_reg_t data) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->CSR.reg = data; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systick_clear_CSR_reg(const void *const hw, hri_systick_csr_reg_t mask) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->CSR.reg &= ~mask; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systick_toggle_CSR_reg(const void *const hw, hri_systick_csr_reg_t mask) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->CSR.reg ^= mask; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systick_csr_reg_t hri_systick_read_CSR_reg(const void *const hw) -{ - return ((Systick *)hw)->CSR.reg; -} - -static inline void hri_systick_set_RVR_reg(const void *const hw, hri_systick_rvr_reg_t mask) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->RVR.reg |= mask; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systick_rvr_reg_t hri_systick_get_RVR_reg(const void *const hw, hri_systick_rvr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systick *)hw)->RVR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systick_write_RVR_reg(const void *const hw, hri_systick_rvr_reg_t data) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->RVR.reg = data; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systick_clear_RVR_reg(const void *const hw, hri_systick_rvr_reg_t mask) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->RVR.reg &= ~mask; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systick_toggle_RVR_reg(const void *const hw, hri_systick_rvr_reg_t mask) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->RVR.reg ^= mask; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systick_rvr_reg_t hri_systick_read_RVR_reg(const void *const hw) -{ - return ((Systick *)hw)->RVR.reg; -} - -static inline void hri_systick_set_CVR_reg(const void *const hw, hri_systick_cvr_reg_t mask) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->CVR.reg |= mask; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systick_cvr_reg_t hri_systick_get_CVR_reg(const void *const hw, hri_systick_cvr_reg_t mask) -{ - uint32_t tmp; - tmp = ((Systick *)hw)->CVR.reg; - tmp &= mask; - return tmp; -} - -static inline void hri_systick_write_CVR_reg(const void *const hw, hri_systick_cvr_reg_t data) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->CVR.reg = data; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systick_clear_CVR_reg(const void *const hw, hri_systick_cvr_reg_t mask) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->CVR.reg &= ~mask; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline void hri_systick_toggle_CVR_reg(const void *const hw, hri_systick_cvr_reg_t mask) -{ - SysTick_CRITICAL_SECTION_ENTER(); - ((Systick *)hw)->CVR.reg ^= mask; - SysTick_CRITICAL_SECTION_LEAVE(); -} - -static inline hri_systick_cvr_reg_t hri_systick_read_CVR_reg(const void *const hw) -{ - return ((Systick *)hw)->CVR.reg; -} - -#ifdef __cplusplus -} -#endif - -#endif /* _HRI_SysTick_E54_H_INCLUDED */ -#endif /* _SAME54_SysTick_COMPONENT_ */ -- To view, visit https://gerrit.osmocom.org/c/osmo-ccid-firmware/+/14391 To unsubscribe, or for help writing mail filters, visit https://gerrit.osmocom.org/settings Gerrit-Project: osmo-ccid-firmware Gerrit-Branch: master Gerrit-Change-Id: Ib9017744644357ba9ec99eddbcc89d7f95068c34 Gerrit-Change-Number: 14391 Gerrit-PatchSet: 1 Gerrit-Owner: Kévin Redon <kredon at sysmocom.de> Gerrit-MessageType: newchange -------------- next part -------------- An HTML attachment was scrubbed... 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