[PATCH] osmo-ttcn3-hacks[master]: bts: Add test for SI1 scheduling

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Harald Welte gerrit-no-reply at lists.osmocom.org
Mon Mar 12 14:07:41 UTC 2018


Review at  https://gerrit.osmocom.org/7236

bts: Add test for SI1 scheduling

We so far only tested combinations without SI1 present, let's change
that.

Change-Id: I5a62901a9477a75dce12299a0b1359d7744f75f3
Related: OS#3051
---
M bts/BTS_Tests.ttcn
1 file changed, 9 insertions(+), 2 deletions(-)


  git pull ssh://gerrit.osmocom.org:29418/osmo-ttcn3-hacks refs/changes/36/7236/1

diff --git a/bts/BTS_Tests.ttcn b/bts/BTS_Tests.ttcn
index f4a5a48..32269e2 100644
--- a/bts/BTS_Tests.ttcn
+++ b/bts/BTS_Tests.ttcn
@@ -1625,8 +1625,14 @@
 
 testcase TC_si_sched_default() runs on test_CT {
 	f_init();
-	f_rsl_bcch_fill(RSL_SYSTEM_INFO_2, ts_SI2_default);
-	f_rsl_bcch_fill(RSL_SYSTEM_INFO_4, ts_SI4_default);
+	/* 2+3+4 are mandatory and set in f_init() */
+	f_TC_si_sched();
+}
+
+testcase TC_si_sched_1() runs on test_CT {
+	f_init();
+	si_cfg.si1_present := true;
+	f_rsl_bcch_fill_raw(RSL_SYSTEM_INFO_1, '5506198fb38000000000000000000000000000e504002b'O);
 	f_TC_si_sched();
 }
 
@@ -2244,6 +2250,7 @@
 	execute( TC_rsl_mand_ie_error() );
 	execute( TC_rsl_ie_content_error() );
 	execute( TC_si_sched_default() );
+	execute( TC_si_sched_1() );
 	execute( TC_si_sched_2bis() );
 	execute( TC_si_sched_2ter() );
 	execute( TC_si_sched_2ter_2bis() );

-- 
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Gerrit-MessageType: newchange
Gerrit-Change-Id: I5a62901a9477a75dce12299a0b1359d7744f75f3
Gerrit-PatchSet: 1
Gerrit-Project: osmo-ttcn3-hacks
Gerrit-Branch: master
Gerrit-Owner: Harald Welte <laforge at gnumonks.org>



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