[PATCH] osmo-pcu[master]: Simplify TS alloc: split off RX mask computation

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Max gerrit-no-reply at lists.osmocom.org
Wed Sep 20 17:01:20 UTC 2017


Hello Jenkins Builder,

I'd like you to reexamine a change.  Please visit

    https://gerrit.osmocom.org/3913

to look at the new patch set (#5).

Simplify TS alloc: split off RX mask computation

Move computation of RX mask into separate function and document it. This
allows to significantly shrink find_multi_slot() function and overall
improve code readability.

Since the test output requires cosmetic adjustment anyway due to change
in the sequence of log messages, use this opportunity to better group
and format log message.

Change-Id: I731726a096bba7ee97499e5cbe3e7401869d7392
Related: OS#2282
---
M src/gprs_rlcmac_ts_alloc.cpp
M tests/tbf/TbfTest.err
2 files changed, 58 insertions(+), 57 deletions(-)


  git pull ssh://gerrit.osmocom.org:29418/osmo-pcu refs/changes/13/3913/5

diff --git a/src/gprs_rlcmac_ts_alloc.cpp b/src/gprs_rlcmac_ts_alloc.cpp
index f4c4ef0..693a72a 100644
--- a/src/gprs_rlcmac_ts_alloc.cpp
+++ b/src/gprs_rlcmac_ts_alloc.cpp
@@ -604,6 +604,56 @@
 	return (win | win >> 8) & 0xFF;
 }
 
+enum { MASK_TT, MASK_TR };
+
+/*! Fill in RX mask table for a given MS Class
+ *
+ *  \param[in] ms_cl MS Class pointer
+ *  \param[in] num_tx Number of TX slots to consider
+ *  \param[out] rx_mask RX mask table
+ */
+static inline void fill_rx_mask(const struct gprs_ms_multislot_class *ms_cl, uint8_t num_tx, uint8_t *rx_mask)
+{
+	static const char *digit[10] = { "0", "1", "2", "3", "4", "5", "6", "7", "8", "9" };
+	uint8_t Tta = ms_cl->ta, Ttb = ms_cl->tb, Tra = ms_cl->ra, Trb = ms_cl->rb, /* Minimum Number of Slots */
+		Tx = ms_cl->tx, Sum = ms_cl->sum, /* Maximum Number of Slots: Tx, Sum = Rx + Tx */
+		Type = ms_cl->type; /* Type of Mobile */
+
+	/* MS_A maps to 0 if frequency hopping is disabled */
+	/* TODO: Set it to 1 if FH is implemented and enabled */
+	if (Ttb == MS_A)
+		Ttb = 0;
+	if (Trb == MS_A)
+		Trb = 0;
+
+	/* MS_A and MS_B are 0 iff FH is disabled and there is no Tx/Rx change.
+	 * This is never the case with the current implementation, so 1 will always be used. */
+	if (Ttb == MS_B)
+		Ttb = 1;
+	if (Trb == MS_C)
+		Trb = 1;
+
+	if (num_tx == 1) /* it's enough to log this once per TX slot set iteration */
+		LOGP(DRLCMAC, LOGL_DEBUG, " Rx=%u, Tx=%u, Sum Rx + Tx=%s [Tta=%s Ttb=%u] [Tra=%u Trb=%u] Type=%u\n",
+		     ms_cl->rx, Tx,
+		     (Sum == MS_NA) ? "N/A" : digit[Sum],
+		     (Tta == MS_NA) ? "N/A" : digit[Tta], Ttb, Tra, Trb, Type);
+
+	if (ms_cl->type == 1) {
+		rx_mask[MASK_TT] = (0x100 >> OSMO_MAX(Ttb, Tta)) - 1;
+		rx_mask[MASK_TT] &= ~((1 << (Trb + num_tx)) - 1);
+		rx_mask[MASK_TR] = (0x100 >> Ttb) - 1;
+		rx_mask[MASK_TR] &= ~((1 << (OSMO_MAX(Trb, Tra) + num_tx)) - 1);
+	} else {
+		/* Class type 2 MS have independant RX and TX */
+		rx_mask[MASK_TT] = 0xff;
+		rx_mask[MASK_TR] = 0xff;
+	}
+
+	rx_mask[MASK_TT] = (rx_mask[MASK_TT] << 3) | (rx_mask[MASK_TT] >> 5);
+	rx_mask[MASK_TR] = (rx_mask[MASK_TR] << 3) | (rx_mask[MASK_TR] >> 5);
+}
+
 /*! Find set of slots available for allocation while taking MS class into account
  *
  *  \param[in] trx Pointer to TRX object
@@ -615,17 +665,12 @@
 static int find_multi_slots(const struct gprs_rlcmac_trx *trx, const GprsMs *ms, uint8_t *ul_slots, uint8_t *dl_slots)
 {
 	const struct gprs_ms_multislot_class *ms_class;
-	uint8_t Tx, Sum;	/* Maximum Number of Slots: RX, Tx, Sum Rx+Tx */
-	uint8_t Tta, Ttb, Tra, Trb;	/* Minimum Number of Slots */
-	uint8_t Type; /* Type of Mobile */
 	uint8_t max_slots, num_tx, mask_sel, pdch_slots, ul_ts, dl_ts;
 	int16_t rx_window, tx_window;
-	static const char *digit[10] = { "0","1","2","3","4","5","6","7","8","9" };
 	char slot_info[9] = {0};
-	int max_capacity;
-	uint8_t max_ul_slots;
-	uint8_t max_dl_slots;
-	enum {MASK_TT, MASK_TR};
+	int max_capacity = -1;
+	uint8_t max_ul_slots = 0;
+	uint8_t max_dl_slots = 0;
 
 	if (ms->ms_class() >= 32) {
 		LOGP(DRLCMAC, LOGL_ERROR, "Multislot class %d out of range.\n",
@@ -646,33 +691,6 @@
 		return -EINVAL;
 	}
 
-	Tx = ms_class->tx;
-	Sum = ms_class->sum;
-	Tta = ms_class->ta;
-	Ttb = ms_class->tb;
-	Tra = ms_class->ra;
-	Trb = ms_class->rb;
-	Type = ms_class->type;
-
-	/* MS_A maps to 0 if frequency hopping is disabled */
-	/* TODO: Set it to 1 if FH is implemented and enabled */
-	if (Ttb == MS_A)
-		Ttb = 0;
-	if (Trb == MS_A)
-		Trb = 0;
-
-	/* MS_A and MS_B are 0 iff FH is disabled and there is no Tx/Rx change.
-	 * This is never the case with the current implementation, so 1 will
-	 * always be used. */
-	if (Ttb == MS_B)
-		Ttb = 1;
-	if (Trb == MS_C)
-		Trb = 1;
-
-	LOGP(DRLCMAC, LOGL_DEBUG, "- Rx=%d Tx=%d Sum Rx+Tx=%s  Tta=%s Ttb=%d  Tra=%d Trb=%d Type=%d\n", ms_class->rx, Tx,
-		(Sum == MS_NA) ? "N/A" : digit[Sum],
-		(Tta == MS_NA) ? "N/A" : digit[Tta], Ttb, Tra, Trb, Type);
-
 	max_slots = OSMO_MAX(ms_class->rx, ms_class->tx);
 
 	if (*dl_slots == 0)
@@ -691,29 +709,12 @@
 
 	/* Check for each UL (TX) slot */
 
-	max_capacity = -1;
-	max_ul_slots = 0;
-	max_dl_slots = 0;
-
 	/* Iterate through possible numbers of TX slots */
 	for (num_tx = 1; num_tx <= ms_class->tx; num_tx += 1) {
 		uint16_t tx_valid_win = (1 << num_tx) - 1;
+		uint8_t rx_mask[MASK_TR + 1];
 
-		uint8_t rx_mask[MASK_TR+1];
-		if (ms_class->type == 1) {
-			rx_mask[MASK_TT] = (0x100 >> OSMO_MAX(Ttb, Tta)) - 1;
-			rx_mask[MASK_TT] &= ~((1 << (Trb + num_tx)) - 1);
-			rx_mask[MASK_TR] = (0x100 >> Ttb) - 1;
-			rx_mask[MASK_TR] &=
-				~((1 << (OSMO_MAX(Trb, Tra) + num_tx)) - 1);
-		} else {
-			/* Class type 2 MS have independant RX and TX */
-			rx_mask[MASK_TT] = 0xff;
-			rx_mask[MASK_TR] = 0xff;
-		}
-
-		rx_mask[MASK_TT] = (rx_mask[MASK_TT] << 3) | (rx_mask[MASK_TT] >> 5);
-		rx_mask[MASK_TR] = (rx_mask[MASK_TR] << 3) | (rx_mask[MASK_TR] >> 5);
+		fill_rx_mask(ms_class, num_tx, rx_mask);
 
 	/* Rotate group of TX slots: UUU-----, -UUU----, ..., UU-----U */
 	for (ul_ts = 0; ul_ts < 8; ul_ts += 1, tx_valid_win <<= 1) {
diff --git a/tests/tbf/TbfTest.err b/tests/tbf/TbfTest.err
index 9016eb1..22b7746 100644
--- a/tests/tbf/TbfTest.err
+++ b/tests/tbf/TbfTest.err
@@ -3328,12 +3328,12 @@
 Searching for first unallocated TFI: TRX=0
  Found TFI=0.
 Slot Allocation (Algorithm B) for class 12
-- Rx=4 Tx=4 Sum Rx+Tx=5  Tta=2 Ttb=1  Tra=2 Trb=1 Type=1
 - Skipping TS 0, because not enabled
 - Skipping TS 1, because not enabled
 - Skipping TS 6, because not enabled
 - Skipping TS 7, because not enabled
 - Possible DL/UL slots: (TS=0)"..CCCC.."(TS=7)
+ Rx=4, Tx=4, Sum Rx + Tx=5 [Tta=2 Ttb=1] [Tra=2 Trb=1] Type=1
 - Selected DL slots: (TS=0)"..DDDD.."(TS=7)
 Using 4 slots for DL
 - Reserved DL/UL slots: (TS=0)"..DDCD.."(TS=7)
@@ -3367,12 +3367,12 @@
 Searching for first unallocated TFI: TRX=0
  Found TFI=0.
 Slot Allocation (Algorithm B) for class 12
-- Rx=4 Tx=4 Sum Rx+Tx=5  Tta=2 Ttb=1  Tra=2 Trb=1 Type=1
 - Skipping TS 0, because not enabled
 - Skipping TS 1, because not enabled
 - Skipping TS 6, because not enabled
 - Skipping TS 7, because not enabled
 - Possible DL/UL slots: (TS=0)"..CCCC.."(TS=7)
+ Rx=4, Tx=4, Sum Rx + Tx=5 [Tta=2 Ttb=1] [Tra=2 Trb=1] Type=1
 - Selected DL slots: (TS=0)"..DDDD.."(TS=7)
 Using 4 slots for DL
 - Reserved DL/UL slots: (TS=0)"..DDCD.."(TS=7)
@@ -6541,12 +6541,12 @@
 Searching for first unallocated TFI: TRX=0
  Found TFI=0.
 Slot Allocation (Algorithm B) for class 11
-- Rx=4 Tx=3 Sum Rx+Tx=5  Tta=3 Ttb=1  Tra=2 Trb=1 Type=1
 - Skipping TS 0, because not enabled
 - Skipping TS 1, because not enabled
 - Skipping TS 6, because not enabled
 - Skipping TS 7, because not enabled
 - Possible DL/UL slots: (TS=0)"..CCCC.."(TS=7)
+ Rx=4, Tx=3, Sum Rx + Tx=5 [Tta=3 Ttb=1] [Tra=2 Trb=1] Type=1
 - Selected DL slots: (TS=0)"..ddDd.."(TS=7), single
 Using single slot at TS 4 for DL
 - Reserved DL/UL slots: (TS=0)"...DC..."(TS=7)

-- 
To view, visit https://gerrit.osmocom.org/3913
To unsubscribe, visit https://gerrit.osmocom.org/settings

Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I731726a096bba7ee97499e5cbe3e7401869d7392
Gerrit-PatchSet: 5
Gerrit-Project: osmo-pcu
Gerrit-Branch: master
Gerrit-Owner: Max <msuraev at sysmocom.de>
Gerrit-Reviewer: Jenkins Builder



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