We need a bit more info to see what we can do to avoid at least
cooling fan as it is expensive.
1. Was that proper temperature chamber measurement or just Rx
on/off?
2. I think we are talking about two issues called phase error
here.
2.a IQ phase error caused by LMS Tx/Rx PLLs alone
2.b Modulation phase error
Item 2.a should not be affected by temperature so much In
900/1800MHz frequency region. If we want to get it even better we
can always make a look up table vs temperature to correct IQ phase
error from FPGA.
Item 2.b is affected by both 2.a and Tx DC cal. Tx DC cal has
already been addressed by Thomas.
Combining Thomas's idea of DC recalibration and, if necessary,
making look up table for IQ phase error correction vs temperature
should put us in good position to meet the specs.
Dr Srdjan MilenkovicOn 26/07/2012 06:03,
Alexander Chemeris wrote:
Hi all,
Thomas has discovered that DC offset calibration for LMS is drifting a
lot with temperature changes and this has detrimental effect on the
modulation accuracy:
http://code.google.com/p/umtrx/issues/detail?id=31
One solution proposed by Sylvain is to tune modulation a bit higher
using digital modulation, which should be straightforward with UHD
which has digital mixer in FPGA.
But I wonder what is a recommended solution for this temperature
compensation for LMS in general. Srdjan, could you comment on this?