Alex, please see my comments below.
I found this link: http://novelflash.com/wiki/index.php?title=USRP2_HDL_Primer
Is this information is correct?
Correct, but not for UmTRX. UmTRX architecture based on N2x0 USRP, wich haven't ram_loader and sd card.
I don't understand, how .rmi code processed, and how this code executed.
Build instructions for ZPU software (including bootloader.rmi) described
here.
mkdir <UHD-dir>/firmware/zpu_build
cd <UHD-dir>/firmware/zpu_build
export PATH=$PATH:<path-to-zpu-elf-gcc>
cmake ../zpu
make
After this, you need to update the ZPU bootloader in fpga project:
cp <UHD-dir>/firmware/zpu_build/usrp2p/bootloader/bootloader.rmi <UHD-path>/fpga/usrp2/top/N2x0/bootloader_umtrx.rmi
And now, you can compile fpga project:
cd <UHD-path>/fpga/usrp2/top/N2x0
make UmTRX
Where (*.v file)clock description i can found?
All clocks are forming in
u2plus.v file (pll_clk.xco and pll_rx.xco).
For which purposes ram needed?
RAM is needed to run programs by ZPU.