Hi Yaniv,
I'm not very familiar with Microblaze, but I'll try to help.
There are several possible reasons:
- SRAM cannot run at a higher frequency than Microblaze. So you need to reduce the SRAM Clock to 52 MHz or speed up Microblaze core to 104Mhz (for UmTRX boards).
-
Endianess. MicroBlaze is Big endian and SRAM (IS61NLP25672) follow little Endian so need to assign Buses in inverted order. e.g:: address11 to address0 and adress10 to adress1 and so on ... also applying this for data, bank and DQM busses.
- Issue of latching edge. SRAM datasheet says to latch data at positive edge.