laforge submitted this change.

View Change

errata 2.6.10

set wdt urow bits to ensure nvm cache is clear

Change-Id: Ifbc6a3dfe91462029fce50ed42f20440debaa552
---
M gcc/gcc/startup_same54.c
M hpl/nvmctrl/hpl_nvmctrl.c
M usb_flash_main.c
3 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/gcc/gcc/startup_same54.c b/gcc/gcc/startup_same54.c
index 7d8015e..3bdd4c4 100644
--- a/gcc/gcc/startup_same54.c
+++ b/gcc/gcc/startup_same54.c
@@ -627,7 +627,7 @@
  * \brief This is the code that gets called on processor reset.
  * To initialize the device, and call the main() routine.
  */
-void Reset_Handler(void)
+void _Reset_Handler(void)
 {
 	uint32_t *pSrc, *pDest;
 
@@ -668,6 +668,17 @@
 		;
 }
 
+__attribute__((naked,noreturn)) void Reset_Handler(void)
+{
+	// errata 2.6.10, do not remove this, ever.
+	// WDT->CTRLA.reg = 0;
+	__asm volatile("movs r0, #0\n"
+		       "ldr r1, =0x40002000\n"
+		       "strb r0, [r1]\n"
+		       "bl _Reset_Handler\n"
+		       ::: "r0", "r1", "memory");
+}
+
 /**
  * \brief Default interrupt handler for unused IRQs.
  */
diff --git a/hpl/nvmctrl/hpl_nvmctrl.c b/hpl/nvmctrl/hpl_nvmctrl.c
index 63f6145..05db578 100644
--- a/hpl/nvmctrl/hpl_nvmctrl.c
+++ b/hpl/nvmctrl/hpl_nvmctrl.c
@@ -74,6 +74,10 @@
 
 	ASSERT(device && (hw == NVMCTRL));
 
+	// errata 2.6.10, do not remove this, ever.
+	hri_nvmctrl_set_CTRLA_CACHEDIS1_bit(hw);
+	hri_nvmctrl_clear_CTRLA_CACHEDIS1_bit(hw);
+
 	device->hw = hw;
 	ctrla      = hri_nvmctrl_read_CTRLA_reg(hw);
 	ctrla &= ~(NVMCTRL_CTRLA_CACHEDIS0 | NVMCTRL_CTRLA_CACHEDIS1 | NVMCTRL_CTRLA_PRM_Msk);
diff --git a/usb_flash_main.c b/usb_flash_main.c
index b3e293b..19d447a 100644
--- a/usb_flash_main.c
+++ b/usb_flash_main.c
@@ -133,6 +133,14 @@
 	str_to_usb_desc(sernr_buf, sizeof(sernr_buf), sernr_buf_descr, sizeof(sernr_buf_descr));
 #endif
 
+	// errata 2.6.10, do not remove this, ever.
+	bool chiprev_lower_revG = ((DSU->DID.reg >> 8) & 0xf) < 0x6;
+	bool startup_wdt_inactive = _user_area_read_bits((void *)NVMCTRL_USER, 62, 1) != 1;
+	if (chiprev_lower_revG && startup_wdt_inactive) {
+		_user_area_write_bits((void *)NVMCTRL_USER, 50, 0, 4);
+		_user_area_write_bits((void *)NVMCTRL_USER, 62, 1, 1);
+	}
+
 	// set bootprot bits for (15-13)=2 x8192 byte
 	// hri_nvmctrl_write_CTRLB_reg(NVMCTRL, NVMCTRL_CTRLB_CMD_SBPDIS | NVMCTRL_CTRLB_CMDEX_KEY);
 	while (!hri_nvmctrl_get_STATUS_READY_bit(NVMCTRL)) {

To view, visit change 39435. To unsubscribe, or for help writing mail filters, visit settings.