lynxis lazus has uploaded this change for review.

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Improve comments on errata 2.6.10

Errata 2.6.10 affects Rev A, D, F: The cache lines
of AHB0 and AHB1 might not reset properly on Power up
resulting in courrupted data in rare cases.

The errata recommends fixing this by:
- for AHB0: WDT enable & disable
- for AHB1: disable and re-enable cache line

Change-Id: I3c35f590a4e43d778e70f2f377e0d470c3a652b2
---
M gcc/gcc/startup_same54.c
M hpl/nvmctrl/hpl_nvmctrl.c
M usb_flash_main.c
3 files changed, 13 insertions(+), 5 deletions(-)

git pull ssh://gerrit.osmocom.org:29418/osmo-asf4-dfu refs/changes/68/42168/1

diff --git a/gcc/gcc/startup_same54.c b/gcc/gcc/startup_same54.c
index 710efe8..66f7426 100644
--- a/gcc/gcc/startup_same54.c
+++ b/gcc/gcc/startup_same54.c
@@ -670,7 +670,9 @@
 
 __attribute__((naked, noreturn, weak)) void Reset_Handler(void)
 {
-	// errata 2.6.10, do not remove this, ever.
+	/* errata 2.6.10: Rev A, D, F: Cache lines of AHB0 & AHB1 might be not
+	 * reset properly on Power up and might return invalid data in rare cases.
+	 */
 	// WDT->CTRLA.reg = 0;
 	__asm volatile("movs r0, #0\n"
 		       "ldr r1, =0x40002000\n"
diff --git a/hpl/nvmctrl/hpl_nvmctrl.c b/hpl/nvmctrl/hpl_nvmctrl.c
index 05db578..8079193 100644
--- a/hpl/nvmctrl/hpl_nvmctrl.c
+++ b/hpl/nvmctrl/hpl_nvmctrl.c
@@ -74,7 +74,10 @@
 
 	ASSERT(device && (hw == NVMCTRL));
 
-	// errata 2.6.10, do not remove this, ever.
+	/* errata 2.6.10: Rev A, D, F: Cache lines of AHB1 might be not
+	 * reset properly on Power up and might return invalid data in rare cases.
+	 * Workaround: Disable and re-enable cache1
+	 */
 	hri_nvmctrl_set_CTRLA_CACHEDIS1_bit(hw);
 	hri_nvmctrl_clear_CTRLA_CACHEDIS1_bit(hw);
 
diff --git a/usb_flash_main.c b/usb_flash_main.c
index c78c55c..b228efb 100644
--- a/usb_flash_main.c
+++ b/usb_flash_main.c
@@ -136,12 +136,15 @@
 	str_to_usb_desc(product_buf, sizeof(product_buf) - 1, product_buf_descr, sizeof(product_buf_descr));
 #endif
 
-	// errata 2.6.10, do not remove this, ever.
+	/* errata 2.6.10: Rev A, D, F: Cache lines of AHB0 might be not
+	 * reset properly on Power up and might return invalid data in rare cases.
+	 * Workaround: Start low level priority watchdog.
+	 */
 	bool chiprev_lower_revG = ((DSU->DID.reg >> 8) & 0xf) < 0x6;
 	bool startup_wdt_inactive = _user_area_read_bits((void *)NVMCTRL_USER, 62, 1) != 1;
 	if (chiprev_lower_revG && startup_wdt_inactive) {
-		_user_area_write_bits((void *)NVMCTRL_USER, 50, 0, 4);
-		_user_area_write_bits((void *)NVMCTRL_USER, 62, 1, 1);
+		_user_area_write_bits((void *)NVMCTRL_USER, 50, 0, 4); /* Watchdog period 0 */
+		_user_area_write_bits((void *)NVMCTRL_USER, 62, 1, 1); /* Enable watchdog */
 	}
 
 	// set bootprot bits for (15-13)=2 x8192 byte

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