fixeria has uploaded this change for review.
BTS_Tests: send SACCH blocks in TC_rsl_ms_pwr_dyn_{up,ass_updown}()
We used to rely on trxcon sendig dummy RR Measurement Reports and
patching the L1 SACCH Header with the configured MS Power Level
and Timing Advance values. Recently TC_rsl_ms_pwr_dyn_ass_updown
started to fail because trxcon does not patch dummy MRs anymore.
Do not rely on dummy MRs, send SACCH blocks with the expected
MS Power Level and Timing Advance values from the testsuites.
Change-Id: I31dd6b9026d04403092256176f67785a0a6486ad
Related: OS#5635
---
M bts/BTS_Tests.ttcn
1 file changed, 11 insertions(+), 1 deletion(-)
git pull ssh://gerrit.osmocom.org:29418/osmo-ttcn3-hacks refs/changes/69/28869/1
diff --git a/bts/BTS_Tests.ttcn b/bts/BTS_Tests.ttcn
index ed5d316..47d7ce1 100644
--- a/bts/BTS_Tests.ttcn
+++ b/bts/BTS_Tests.ttcn
@@ -2965,6 +2965,9 @@
T2.start;
alt {
[] as_l1_sacch_l1h(l1h) {
+ var octetstring l2 := f_pad_oct('010349'O & '0615004001C0'O, 21, '00'O);
+ L1CTL.send(ts_L1CTL_DATA_REQ_SACCH(g_chan_nr, ts_RslLinkID_SACCH(0), l1h, l2));
+
if (l1h.ms_power_lvl < (pwr_var + 6)) {
repeat;
}
@@ -2984,6 +2987,9 @@
T4.start;
alt {
[] as_l1_sacch_l1h(l1h) {
+ var octetstring l2 := f_pad_oct('010349'O & '0615004001C0'O, 21, '00'O);
+ L1CTL.send(ts_L1CTL_DATA_REQ_SACCH(g_chan_nr, ts_RslLinkID_SACCH(0), l1h, l2));
+
if (l1h.ms_power_lvl > pwr_var) {
repeat;
}
@@ -3072,7 +3078,11 @@
timer T1 := 9.0 * 1.92 + 1.92;
T1.start;
alt {
- [] as_l1_sacch_l1h(l1h) { repeat; }
+ [] as_l1_sacch_l1h(l1h) {
+ var octetstring l2 := f_pad_oct('010349'O & '0615004001C0'O, 21, '00'O);
+ L1CTL.send(ts_L1CTL_DATA_REQ_SACCH(g_chan_nr, ts_RslLinkID_SACCH(0), l1h, l2));
+ repeat;
+ }
[] L1CTL.receive { repeat; }
[] T1.timeout {
if (not isbound(l1h)) {
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