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fake_trx: Allow setting sched RR priority for clckgen thread

Change-Id: I3c7f36c17fc7b9cae1023b4a0ed37f983dc286dc
---
M src/target/trx_toolkit/clck_gen.py
M src/target/trx_toolkit/fake_trx.py
2 files changed, 17 insertions(+), 2 deletions(-)

git pull ssh://gerrit.osmocom.org:29418/osmocom-bb refs/changes/15/39815/1

diff --git a/src/target/trx_toolkit/clck_gen.py b/src/target/trx_toolkit/clck_gen.py
index c6da8f6..e9dc3ea 100755
--- a/src/target/trx_toolkit/clck_gen.py
+++ b/src/target/trx_toolkit/clck_gen.py
@@ -24,6 +24,7 @@
 import threading
 import time
 import signal
+import os
 
 from app_common import ApplicationBase
 from udp_link import UDPLink
@@ -34,7 +35,7 @@
 	SEC_DELAY_US = 1000 * 1000
 	GSM_FRAME_US = 4615.0
 
-	def __init__(self, clck_links, clck_start = 0, ind_period = 102):
+	def __init__(self, clck_links, clck_start = 0, ind_period = 102, sched_prio_rr = None):
 		# This event is needed to control the thread
 		self._breaker = threading.Event()
 		self._thread = None
@@ -50,6 +51,9 @@
 		# (Optional) clock consumer
 		self.clck_handler = None
 
+		# RR Scheduler priority of thread. None = don't set it.
+		self.sched_prio_rr = sched_prio_rr
+
 	@property
 	def running(self):
 		if self._thread is None:
@@ -66,6 +70,7 @@
 		# Initialize and start a new thread
 		self._thread = threading.Thread(target = self._worker)
 		self._thread.daemon = True
+		self._thread.sched_prio_rr = self.sched_prio_rr
 		self._thread.start()
 
 	def stop(self):
@@ -83,6 +88,13 @@
 		self._breaker.clear()
 
 	def _worker(self):
+		if self.sched_prio_rr is not None:
+			sched_param = os.sched_param(self.sched_prio_rr)
+			try:
+				log.info("Setting real time process scheduler to SCHED_RR, priority %u" % (self.sched_prio_rr))
+				os.sched_setscheduler(0, os.SCHED_RR, sched_param)
+			except OSError:
+				log.error("Failed to set real time process scheduler to SCHED_RR, priority %u" % (self.sched_prio_rr))
 		# run .send_clck_ind() every .ctr_interval
 		# be careful not to accumulate timing error when organizing the clock loop
 		ns = 1e-9
diff --git a/src/target/trx_toolkit/fake_trx.py b/src/target/trx_toolkit/fake_trx.py
index 21bd189..033baec 100755
--- a/src/target/trx_toolkit/fake_trx.py
+++ b/src/target/trx_toolkit/fake_trx.py
@@ -397,7 +397,7 @@
 		self.trx_list = TRXList()
 
 		# Init shared clock generator
-		self.clck_gen = CLCKGen([])
+		self.clck_gen = CLCKGen([], sched_prio_rr = self.argv.sched_prio_rr)
 		# This method will be called on each TDMA frame
 		self.clck_gen.clck_handler = self.clck_handler
 
@@ -530,6 +530,9 @@
 		trx_group.add_argument("-p", "--bb-base-port",
 			dest = "bb_base_port", type = int, default = 6700,
 			help = "Set BB base port number (default %(default)s)")
+		trx_group.add_argument("-s", "--sched-prio-rr",
+			dest = "sched_prio_rr", type = int, default = None,
+			help = "Set Scheduler RR Priority (default None)")
 
 		mtrx_group = parser.add_argument_group("Additional transceivers")
 		mtrx_group.add_argument("--trx",

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