kirr has uploaded this change for review.

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trx_toolkit/fake_trx: Factor functionality to run IO loop out of Application

-> into Runner.

We will need to move this functionality to pyx (Cython) domain soon,
while Application will remain at py (Python) level.

Preparatory refactoring step for that.

Change-Id: I28613087f48c327763537b53b97cad1e67d91f1a
---
M src/target/trx_toolkit/fake_trx.py
1 file changed, 47 insertions(+), 35 deletions(-)

git pull ssh://gerrit.osmocom.org:29418/osmocom-bb refs/changes/50/40050/1

diff --git a/src/target/trx_toolkit/fake_trx.py b/src/target/trx_toolkit/fake_trx.py
index 12d5b77..9bf9efd 100755
--- a/src/target/trx_toolkit/fake_trx.py
+++ b/src/target/trx_toolkit/fake_trx.py
@@ -382,6 +382,51 @@
 		# Unhandled command
 		return None
 
+
+# Runner organizes execution of several FakeTRX instances with common clock.
+class Runner:
+	def __init__(self, clck_gen, trx_list):
+		self.clck_gen = clck_gen
+		self.trx_list = trx_list.trx_list
+
+		# This method will be called on each TDMA frame
+		self.clck_gen.clck_handler = self.clck_handler
+
+		self.burst_fwd = BurstForwarder(trx_list.trx_list)
+
+	# This method will be called by the clock generator
+	def clck_handler(self, fn):
+		# We assume that this list is immutable at run-time
+		for trx in self.trx_list:
+			trx.clck_tick(self.burst_fwd, fn)
+
+	# loops runs IO loop on specified CLCKGen and TRXes forever.
+	def loop(self):
+		sock_list = [self.clck_gen._timerfd]
+		for trx in self.trx_list:
+			sock_list.append(trx.ctrl_if.sock)
+			sock_list.append(trx.data_if.sock)
+
+		# Enter main loop
+		while True:
+			# Wait until we get any data on any socket
+			r_event, _, _ = select.select(sock_list, [], [])
+
+			# clock is priority
+			if self.clck_gen._timerfd in r_event:
+				self.clck_gen.tick()
+
+			# Iterate over all transceivers
+			for trx in self.trx_list:
+				# DATA interface
+				if trx.data_if.sock in r_event:
+					trx.recv_data_msg()
+
+				# CTRL interface
+				if trx.ctrl_if.sock in r_event:
+					trx.ctrl_if.handle_rx()
+
+
 class Application(ApplicationBase):
 	def __init__(self):
 		self.app_print_copyright(APP_CR_HOLDERS)
@@ -398,8 +443,6 @@
 
 		# Init shared clock generator
 		self.clck_gen = CLCKGen([])
-		# This method will be called on each TDMA frame
-		self.clck_gen.clck_handler = self.clck_handler
 
 		# Power measurement emulation
 		# Noise: -120 .. -105
@@ -419,9 +462,6 @@
 				(name, addr, port, idx) = trx_def
 				self.append_child_trx(addr, port, name = name, child_idx = idx)
 
-		# Burst forwarding between transceivers
-		self.burst_fwd = BurstForwarder(self.trx_list.trx_list)
-
 		log.info("Init complete")
 
 	def append_trx(self, remote_addr, base_port, **kwargs):
@@ -458,36 +498,8 @@
 			except OSError:
 				log.error("Failed to set real time process scheduler to SCHED_RR, priority %u" % (self.argv.sched_rr_prio))
 
-		# Compose list of to be monitored sockets
-		sock_list = [self.clck_gen._timerfd]
-		for trx in self.trx_list.trx_list:
-			sock_list.append(trx.ctrl_if.sock)
-			sock_list.append(trx.data_if.sock)
-
-		# Enter main loop
-		while True:
-			# Wait until we get any data on any socket
-			r_event, _, _ = select.select(sock_list, [], [])
-
-			# clock is priority
-			if self.clck_gen._timerfd in r_event:
-				self.clck_gen.tick()
-
-			# Iterate over all transceivers
-			for trx in self.trx_list.trx_list:
-				# DATA interface
-				if trx.data_if.sock in r_event:
-					trx.recv_data_msg()
-
-				# CTRL interface
-				if trx.ctrl_if.sock in r_event:
-					trx.ctrl_if.handle_rx()
-
-	# This method will be called by the clock generator
-	def clck_handler(self, fn):
-		# We assume that this list is immutable at run-time
-		for trx in self.trx_list.trx_list:
-			trx.clck_tick(self.burst_fwd, fn)
+		runner = Runner(self.clck_gen, self.trx_list)
+		runner.loop()
 
 	def shutdown(self):
 		log.info("Shutting down...")

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