Attention is currently required from: jolly.

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2 comments:

• File src/host/trxcon/src/sched_lchan_pdtch.c:

  • Patch Set #1, Line 164: lchan->prim = msg

    I will add an `ASSERT` to make sure `lchan->prim` is NULL here.

  • Patch Set #1, Line 191: }

    What happens to lchan->prim, if bid is not 3?

    `lchan->prim` should remain allocated and assigned until `bid == 3` (4th burst) - this is when we want to confirm sending UL BLOCK.req to the upper layers, because burst timing matters.

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