pespin submitted this change.

View Change


Approvals: osmith: Looks good to me, but someone else must approve Jenkins Builder: Verified fixeria: Looks good to me, but someone else must approve pespin: Looks good to me, approved 
rlcmac: ul_tbf: Implement TBF_Starting time (phase1)

This is unfortunately not yet working since lower layers are always
sending hardcoded fn=0 and hence ctx->tbf_starting_time calculated in
handle_imm_ass()->TBF_StartingTime_to_fn() is wrong.

Related: OS#6130
Change-Id: If6b7766ee1ba6667db4e54e897f376f5b27ad73d
---
M src/rlcmac/tbf_ul_ass_fsm.c
M tests/rlcmac/rlcmac_prim_test.err
2 files changed, 57 insertions(+), 22 deletions(-)

diff --git a/src/rlcmac/tbf_ul_ass_fsm.c b/src/rlcmac/tbf_ul_ass_fsm.c
index 35b6ca7..4fde6b7 100644
--- a/src/rlcmac/tbf_ul_ass_fsm.c
+++ b/src/rlcmac/tbf_ul_ass_fsm.c
@@ -152,8 +152,8 @@
 											d->fn);
 					ctx->phase1_alloc.ts[d->ts_nr].allocated = true;
 					ctx->phase1_alloc.num_ts = 1;
-					LOGPFSML(ctx->fi, LOGL_INFO, "ImmAss SingleBlock (2phase access) ts_nr=%u start_fn=%u\n", d->ts_nr, ctx->tbf_starting_time);
-					return -ENOTSUP;
+					LOGPFSML(ctx->fi, LOGL_INFO, "ImmAss SingleBlock (2phase access) cur_tn=%u cur_fn=%u start_fn=%u\n", d->ts_nr, d->fn, ctx->tbf_starting_time);
+					return 0;
 				case 1: /* d->iaro->u.hh.u.UplinkDownlinkAssignment.ul_dl.Packet_Uplink_ImmAssignment.Access.DynamicOrFixedAllocation.* (GPRS_DynamicOrFixedAllocation_t) */
 					ctx->phase1_alloc.ul_tfi = d->iaro->u.hh.u.UplinkDownlinkAssignment.ul_dl.Packet_Uplink_ImmAssignment.Access.DynamicOrFixedAllocation.TFI_ASSIGNMENT;
 					ctx->ul_tbf->tx_cs = d->iaro->u.hh.u.UplinkDownlinkAssignment.ul_dl.Packet_Uplink_ImmAssignment.Access.DynamicOrFixedAllocation.CHANNEL_CODING_COMMAND + 1;
@@ -161,8 +161,8 @@
 					if (ctx->tbf_starting_time_exists)
 						ctx->tbf_starting_time = TBF_StartingTime_to_fn(&d->iaro->u.hh.u.UplinkDownlinkAssignment.ul_dl.Packet_Uplink_ImmAssignment.Access.DynamicOrFixedAllocation.TBF_STARTING_TIME,
 												d->fn);
-					LOGPFSML(ctx->fi, LOGL_INFO, "ImmAss TFI=%u initCS=%s startTimeFN=%u\n",
-						 ctx->phase1_alloc.ul_tfi, gprs_rlcmac_mcs_name(ctx->ul_tbf->tx_cs), ctx->tbf_starting_time);
+					LOGPFSML(ctx->fi, LOGL_INFO, "ImmAss TFI=%u initCS=%s cur_tn=%u cur_fn=%u start_fn=%u\n",
+						 ctx->phase1_alloc.ul_tfi, gprs_rlcmac_mcs_name(ctx->ul_tbf->tx_cs), d->ts_nr, d->fn, ctx->tbf_starting_time);
 					switch (d->iaro->u.hh.u.UplinkDownlinkAssignment.ul_dl.Packet_Uplink_ImmAssignment.Access.DynamicOrFixedAllocation.UnionType) {
 					case 0: /* d->iaro->u.hh.u.UplinkDownlinkAssignment.ul_dl.Packet_Uplink_ImmAssignment.Access.DynamicOrFixedAllocation.Allocation.DynamicAllocation (DynamicAllocation_t) */
 						ctx->phase1_alloc.ts[d->ts_nr].allocated = true;
@@ -316,6 +316,16 @@
 	}
 }
 
+static void st_wait_tbf_starting_time1_on_enter(struct osmo_fsm_inst *fi, uint32_t prev_state)
+{
+	struct gprs_rlcmac_tbf_ul_ass_fsm_ctx *ctx = (struct gprs_rlcmac_tbf_ul_ass_fsm_ctx *)fi->priv;
+
+	/* Configure lower layers to submit an RTS tick starting at tbf_starting_time
+	 * and scheduler will send event  GPRS_RLCMAC_TBF_UL_ASS_EV_TBF_STARTING_TIME to us. */
+	gprs_rlcmac_ul_tbf_submit_configure_req(ctx->ul_tbf, &ctx->phase1_alloc,
+						ctx->tbf_starting_time_exists, ctx->tbf_starting_time);
+}
+
 static void st_wait_tbf_starting_time1(struct osmo_fsm_inst *fi, uint32_t event, void *data)
 {
 	struct gprs_rlcmac_tbf_ul_ass_fsm_ctx *ctx = (struct gprs_rlcmac_tbf_ul_ass_fsm_ctx *)fi->priv;
@@ -481,6 +491,7 @@
 			X(GPRS_RLCMAC_TBF_UL_ASS_ST_SCHED_PKT_RES_REQ) |
 			X(GPRS_RLCMAC_TBF_UL_ASS_ST_COMPL),
 		.name = "WAIT_TBF_STARTING_TIME1",
+		.onenter = st_wait_tbf_starting_time1_on_enter,
 		.action = st_wait_tbf_starting_time1,
 	},
 	[GPRS_RLCMAC_TBF_UL_ASS_ST_SCHED_PKT_RES_REQ] = {
@@ -651,13 +662,23 @@
 /* The scheduled ticks the new FN, which may trigger changes internally if TBF Starting Time is reached */
 void gprs_rlcmac_tbf_ul_ass_fn_tick(const struct gprs_rlcmac_ul_tbf *ul_tbf, uint32_t fn, uint8_t ts_nr)
 {
+	int res;
+
 	OSMO_ASSERT(gprs_rlcmac_tbf_ul_ass_waiting_tbf_starting_time(ul_tbf));
 	OSMO_ASSERT(ul_tbf->ul_ass_fsm.tbf_starting_time_exists);
 	OSMO_ASSERT(ul_tbf->ul_ass_fsm.phase1_alloc.num_ts > 0);
-	if (fn != ul_tbf->ul_ass_fsm.tbf_starting_time ||
-	    !ul_tbf->ul_ass_fsm.phase1_alloc.ts[ts_nr].allocated)
+	if (!ul_tbf->ul_ass_fsm.phase1_alloc.ts[ts_nr].allocated)
 		return;
-
+	res = fn_cmp(fn, ul_tbf->ul_ass_fsm.tbf_starting_time);
+	if (res < 0) {/* fn BEFORE tbf_starting_time */
+		LOGPTBFUL(ul_tbf, LOGL_DEBUG, "TS=%" PRIu8 " FN=%u Waiting for tbf_starting_time=%u\n",
+			  ts_nr, fn, ul_tbf->ul_ass_fsm.tbf_starting_time);
+		return;
+	}
+	if (res > 0) /* fn AFTER tbf_starting time */
+		LOGPTBFUL(ul_tbf, LOGL_ERROR, "TS=%" PRIu8 " FN=%u Received late tick for tbf_starting_time=%u!\n",
+			  ts_nr, fn, ul_tbf->ul_ass_fsm.tbf_starting_time);
+	/* fn == tbf_starting time */
 	osmo_fsm_inst_dispatch(ul_tbf->ul_ass_fsm.fi, GPRS_RLCMAC_TBF_UL_ASS_EV_TBF_STARTING_TIME, NULL);
 }
 
diff --git a/tests/rlcmac/rlcmac_prim_test.err b/tests/rlcmac/rlcmac_prim_test.err
index 21bd98e..0921266 100644
--- a/tests/rlcmac/rlcmac_prim_test.err
+++ b/tests/rlcmac/rlcmac_prim_test.err
@@ -13,7 +13,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -88,7 +88,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -112,7 +112,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -136,7 +136,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -160,7 +160,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -193,7 +193,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -231,7 +231,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -266,7 +266,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -301,7 +301,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -349,7 +349,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -495,7 +495,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -523,7 +523,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -591,7 +591,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -705,7 +705,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL
@@ -815,7 +815,7 @@
 DLGLOBAL DEBUG Rx from lower layers: L1CTL-CCCH_DATA.indication
 DLGLOBAL DEBUG Tx to lower layers: L1CTL-PDCH_ESTABLISH.request
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: Received Event RX_CCCH_IMM_ASS
-DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 startTimeFN=0
+DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss TFI=0 initCS=CS-2 cur_tn=7 cur_fn=0 start_fn=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: ImmAss DynamicAlloc (1phase access) ts_nr=7 usf=0
 DLGLOBAL INFO UL_TBF_ASS{WAIT_CCCH_IMM_ASS}: state_chg to COMPLETED
 DLGLOBAL INFO UL_TBF{ASSIGN}: Received Event UL_ASS_COMPL

To view, visit change 34046. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: libosmo-gprs
Gerrit-Branch: master
Gerrit-Change-Id: If6b7766ee1ba6667db4e54e897f376f5b27ad73d
Gerrit-Change-Number: 34046
Gerrit-PatchSet: 8
Gerrit-Owner: pespin <pespin@sysmocom.de>
Gerrit-Reviewer: Jenkins Builder
Gerrit-Reviewer: fixeria <vyanitskiy@sysmocom.de>
Gerrit-Reviewer: osmith <osmith@sysmocom.de>
Gerrit-Reviewer: pespin <pespin@sysmocom.de>
Gerrit-MessageType: merged