hi dieter,

i like to clean up and merge the sim reader code with master branch. while looking at the code i found a delay_ms(1) in interrupt handler:

-------
        /* Used by: calypso_sim_transmit() to transmit the data */
        if(regVal & REG_SIM_IT_SIM_TX)
        {
#if (SIM_DEBUG == 1)
                puts(" Waiting for transmit...\n");
#endif
                if(sim_tx_character_count >= sim_tx_character_length)
                {
                        txDoneFlag = 1;
                }
                else
                {
                        writew(*tx_buffer,REG_SIM_DTX);
                        tx_buffer++;
                        sim_tx_character_count++;

        #if 1 /* Dieter: set to 0 to get problems with some cards */
                        /* its essential to immediately switch to RX after TX is done */
                        if(sim_tx_character_count >= sim_tx_character_length)
                        {
                                /* TODO: set a proper delay here, 4 is to
                                   long if not debugging and no delay is too short */
                                delay_ms(1);
                                /* Switch I/O direction to input */
                                writew(readw(REG_SIM_CONF1) & ~REG_SIM_CONF1_CONFTXRX, REG_SIM_CONF1);
                        }
        #endif
                }
        }
---------

i removed the delay, and it works. i checked the tsm30 source code. it also sets the IO to input right after writing the last TX byte. (i guess that the controller will trigger the IO switching at the end of transmission.) so why do we need that delay? are there any problems?

regards,

andreas