Hi Alexander. I took a look at the schematic last night. Protel is hard for me to read, probably because I'm not used to it. Overall, the board looks very nice. I have a couple of questions/comments:<div><br></div>
<div>1) Is there a particular reason why there's an external SRAM on the board? I notice that there is one on the Ettus N210 board as well, but do guys have a particular purpose in mind for it? The Spartan-6 FPGA has ample on-board Block RAM resources. If it's not strictly necessary, it would remove an ~$10 part from the BOM.</div>
<div><br></div><div>2) Maybe it was just because it was really late, but I couldn't figure out what was happening to the 1 PPS GPS timing pulse. How are you planning to use GPS information to discipline the 26 MHz oscillator?</div>
<div><br></div><div>3) One general recommendation: add lots of test points, particularly around the DC power sources, clock signals, and digital signals of interest going to and from the FPGA. Probing BGAs is a pain without them. Also, strategically placed ground test posts that you can use to clip on a scope probe ground connection will make debugging much easier.</div>
<div><br></div><div>4) 6.5 V is kind of a weird voltage. I'd be inclined to go with a 12V connection to an external power source, which would enable the system to be powered off a car battery, but this point is a matter of opinion more than anything else.</div>
<div><br></div><div>-Robin</div><div><br></div><div><div class="gmail_quote">On Tue, Oct 4, 2011 at 5:45 PM, Alexander Chemeris <span dir="ltr"><<a href="mailto:alexander.chemeris@gmail.com" target="_blank">alexander.chemeris@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi all,<br>
<br>
Attached is a new version of our schematics and PCB layout (note, they<br>
may differ a bit with schematics being more recent).<br>
Btw, I found diffpdf tool very useful for schematics comparison:<br>
<a href="http://www.qtrac.eu/diffpdf.html" target="_blank">http://www.qtrac.eu/diffpdf.html</a><br>
It nicely highlights changes, so you don't miss something.<br>
<br>
Our current plan for hardware prototyping is like this:<br>
<br>
1. Most important parts of PCB layout should be done by the end of this week<br>
2. Then we have 1 week (maximum!) to do any small changes to layout we<br>
may want and fix bugs we (hopefully) find.<br>
3. Then 1 week for the final layout polishing, adding labels, etc.<br>
4. Final ACK for the layout and we push it to the fab for printing.<br>
Manufacturing and delivery to Moscow will take 2-3 weeks.<br>
5. 1 week for assembly<br>
<br>
This is about 5-7 weeks and then we will have a lot of fun with<br>
hardware and software debug.<br>
<br>
Robin, do you want to get an assembled board to participate in the<br>
hardware debug session? :)<br>
Btw, could you get a quote for the FPGA from Xilinx for 100pcs?<br>
<font color="#888888"><br>
--<br>
Regards,<br>
Alexander Chemeris.<br>
</font></blockquote></div><br><br clear="all"><div><br></div>-- <br>Robin Coxe | Close-Haul Communications, Inc. | Boston, MA <br><a href="tel:%2B1-617-470-8825" value="+16174708825" target="_blank">+1-617-470-8825</a><br>
</div>