UMTRX - SRAM
andrew.karpenkov at gmail.com
Tue May 21 07:11:56 UTC 2013
I'm not very familiar with Microblaze, but I'll try to help.
There are several possible reasons:
- SRAM cannot run at a higher frequency than Microblaze. So you need to
reduce the SRAM Clock to 52 MHz or speed up Microblaze core to 104Mhz (for
- Endianess. MicroBlaze is Big endian and SRAM (IS61NLP25672) follow
little Endian so need to assign Buses in inverted order. e.g:: address11 to
address0 and adress10 to adress1 and so on ... also applying this for data,
bank and DQM busses.
- Issue of latching edge. SRAM datasheet says to latch data at positive
2013/5/21 Yaniv Shiber <yanivshiber at gmail.com>
> Hi All,
> I wish to work with the Synchronize Sram and to connect it to the FPGA
> Does anyone was able to use and communicate with the SRAM?
> If so, can U help with the configuration of the EMC?
> I read the EMC datasheet and they describe different way for connecting
> the EMC with the SRAM. Maybe U know on a problem when working with SRAM?
> thanks in advance,
-------------- next part --------------
An HTML attachment was scrubbed...
More information about the UmTRX