FPGA project for UmTRX v2 board

Alexander Chemeris alexander.chemeris at gmail.com
Sun Oct 14 19:41:48 UTC 2012


What is your expectation - how much time do you need to debug this?

On Sun, Oct 14, 2012 at 11:22 PM, Andrew Karpenkov
<plddesigner at gmail.com> wrote:
> The problem is not in the registers, but the fact that the second unit does
> not give  the first unit to work, or vice versa.
> Somewhere I made a mistake. I think so ..
>
> Regards,
> Andrew Karpenkov
>
>
>
> 2012/10/14 Alexander Chemeris <alexander.chemeris at gmail.com>
>>
>> I thought it's the problem with
>> registers of the DSP block in FPGA.
>
>



-- 
Regards,
Alexander Chemeris.
CEO, Fairwaves LLC / ООО УмРадио
http://fairwaves.ru




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