LMS TxLO noise

Andrey Sviyazov andrey.sviyazov at fairwaves.ru
Tue Jul 24 21:56:31 UTC 2012

Hi Thomas.

Could you please make test again for LO integral phase noise and modulation
accuracy with PLL loop filter 100kHz and ICP=0.4mA (or above), as Srdjan
suggested us.
I've assembled 100kHz loop filter with the next components:
C82 = 100pF, C83=1500pF, C84=33pF, R106=2.2k, R109=3.3k.
To get good noises replace choke L6 by capacitor 10nF..22nF and remove C45.

I ask you because I have to send final BOM as soon as possible to avoid
delay of UmTRXv2 production due to changes for improvements.

Best regards,
Andrey Sviyazov.
P.S. Pictures attached just to be sure.

2012/7/23 Andrey Sviyazov <andrey.sviyazov at fairwaves.ru>

> > > Perhaps this is a silly question, but how do I calibrate the clock? or
> > > use an external reference signal?
> >
> > Andrey Sviyazov - does ClockIn works as external input in UmTRXv1?
> Yes, 5V cmos level required or smaller with DC offset to get 2.5V symmetry.
> Turn switches to MHz and slave positions.
> Best regards,
> Andrey Sviyazov.
> (Sent from my mobile client)
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